IRS2117PBF

Data Sheet No. PD60227 IRS2117/IRS2118(S)PbF Features • • • • • • • • Floating channel designed for bootstrap operation Fully operational to +600 V Tolerant to negative transient voltage, dV/dt immune Gate drive supply range from 10 V to 20V Undervoltage lockout CMOS Schmitt-triggered inputs with pull-down Output in phase with input (IRS2117) or out of phase with input (IRS2118) RoHS compliant SINGLE CHANNEL DRIVER Product Summary VOFFSET IO+/VOUT ton/off (typ.) 600 V max. 200 mA / 420 mA 10 V - 20 V 125 ns & 105 ns Description The IRS2117/IRS2118 are a high voltage, high speed power MOSFET and IGBT driver. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. The logic input is compatible with standard CMOS outputs. The output driver features a high pulse current buffer stage designed for minimum cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high-side or low-side configuration which operates up to 600 V. Packages 8-Lead PDIP IRS2117/IRS2118 8-Lead SOIC IRS2117S/IRS2118S Typical Connection up to 600 V V CC IN VCC IN COM VB HO VS TO LOAD IRS2117 up to 600 V VCC IN VCC IN COM VB HO VS TO LOAD (Refer to Lead Assignments for correct pin configuration). These diagrams show electrical connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout. IRS2118 www.irf.com 1 IRS2117/IRS2118(S)PbF Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Additional information is shown in Figs. 5 through 8. Symbol VB VS VHO VCC VIN dVs/dt PD RthJA TJ TS TL Definition High-side floating supply voltage High-side floating supply offset voltage High-side floating output voltage Logic supply voltage Logic input voltage Allowable offset supply voltage transient (Fig. 2) Package power dissipation @ TA ≤ +25 °C Thermal resistance, junction to ambient Junction temperature Storage temperature Lead temperature (soldering, 10 seconds) (8 lead PDIP) (8 lead SOIC) (8 lead PDIP) (8 lead SOIC) Min. - 0.3 VB - 25 VS - 0.3 -0.3 -0.3 — — — — — — -55 — Max. 625 VB + 0.3 VB + 0.3 25 VCC + 0.3 50 1.0 0.625 125 200 150 150 300 Units V V/ns W °C/W °C Recommended Operating Conditions The input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within the recommended conditions. The VS offset rating is tested with all supplies biased at 15 V differential. Symbol VB VS VHO VCC VIN TA Definition High-side floating supply absolute voltage High-side floating supply offset voltage High-side floating output voltage Logic supply voltage Logic input voltage Ambient temperature Min. VS + 10 Note 1 VS 10 0 -40 Max. VS + 20 600 VB 20 VCC 125 Units V °C Note 1: Logic operational for VS of -5 V to +600 V. Logic state held for VS of -5 V to -VBS. (Please refer to the Design Tip DT97-3 for more details). w ww.irf.com 2 PDF created with pdfFactory trial version www.pdffactory.com IRS2117/IRS2118(S)PbF Dynamic Electrical Characteristics VBIAS (VCC, VBS) = 15 V, CL = 1000 pF and TA = 25 °C unless otherwise specified. The dynamic electrical characteristics are measured using the test circuit shown in Fig. 3. Symbol ton toff tr tf Definition Turn-on propagation delay Turn-off propagation delay Turn-on rise time Turn-off fall time Min. Typ. Max. Units Test Conditions — — — — 125 105 75 35 200 180 130 65 ns VS = 0 V VS = 600 V Static Electrical Characteristics VBIAS (VCC, VBS) = 15 V and TA = 25 °C unless otherwise specified. The VIN, VTH, and IIN parameters are referenced to COM. The VO and IO parameters are referenced to COM and are applicable to the respective output leads: HO or LO. Symbol VIH VIL VOH VOL ILK IQBS IQCC IIN+ IINVBSUV+ VBSUVVCCUV+ VCCUVIO+ Definition Input voltage - logic “0” (IRS2117) logic “1” (IRS2118) High level output voltage, VBIAS - VO Low level output voltage, VO Offset supply leakage current Quiescent VBS supply current Quiescent VCC Supply Current Logic “1” input bias current Logic “0” input bias current (IRS2117) (IRS2118) (IRS2117) (IRS2118) Min. Typ. Max. Units Test Conditions — — 0.05 0.02 — 50 70 20 — 8.6 8.2 8.6 8.2 290 — 6.0 0.2 0.1 50 240 340 40 5.0 VIN = VCC 7.6 7.2 7.6 7.2 200 9.6 9.2 9.6 9.2 VO = 0V — mA VIN = Logic “1” PW ≤ 10 µs VO = 15V VIN = Logic “0” PW ≤ 10 µs V µA VIN = 0 V or VCC VIN = VCC VIN = 0 V — V IO = 2 mA VB = VS = 600 V — — — — — — — Input voltage - logic “1” (IRS2117) logic “0” (IRS2118) 9.5 VBS supply undervoltage positive going threshold VBS supply undervoltage negative going threshold VCC supply undervoltage positive going threshold VCC supply undervoltage negative going threshold Output high short circuit pulsed current IO- Output low short circuit pulsed current 420 600 — www.irf.com 3 PDF created with pdfFactory trial version www.pdffactory.com IRS2117/IRS2118(S)PbF Functional Block Diagram (IRS2117) VCC UV DETECT HV LEVEL SHIFT VB R R S Q HO PULSE FILTER IN PULSE GEN UV DETECT VS COM Functional Block Diagram (IRS2118) VCC UV DETECT HV LEVEL SHIFT VB R Q R S VS HO PULSE FILTER IN PULSE GEN UV DETECT COM www.irf.com 4 IRS2117(S)/IRS2118(S) Lead Definitions Symbol VCC IN IN COM VB HO VS Description Logic and gate drive supply Logic input for gate driver output (HO), in phase with HO (IRS2117) Logic input for gate driver output (HO), out of phase with HO (IRS2118) Logic ground High-side floating supply High-side gate drive output High-side floating supply return Lead Assignments 1 2 3 4 VCC IN COM VB HO VS 8 7 6 5 1 2 3 4 VCC IN COM VB HO VS 8 7 6 5 8 Lead PDIP 8 Lead SOIC IRS2117 IRS2117S 1 2 3 4 VCC IN COM VB HO VS 8 7 6 5 1 2 3 4 VCC IN COM VB HO VS 8 7 6 5 8 Lead PDIP 8 Lead SOIC IRS2118 IRS2118S www.irf.com 5 IRS2117/IRS2118(S)PbF IN (IRS2118) IN (IRS2117)