IRS2135JPBF

PRELIMINARY Data Sheet No. PD60275 revA IRS2133/IRS2135 (J&S)PbF 3-PHASE BRIDGE DRIVER Features • • • • • • • • • • • Floating channel designed for bootstrap operation Fully operational to +600 V Tolerant to negative transient voltage, dV/dt immune Gate drive supply range from 10 V /12 V to 20 V DC and up to 25 V for transient Undervoltage lockout for all channels Over-current shutdown turns off all six drivers Three Independent half-bridge drivers Matched propagation delay for all channels 2.5 V logic compatible Outputs out of phase with inputs All parts are LEAD-FREE Product Summary VOFFSET IO+/- (min.) VOUT ton/off (typ.) Deadtime (typ.) 600 V max. 200 mA / 420 mA 10 V – 20 V or 12 – 20 V 500 ns 230 ns Applications: *Motor Control *Air Conditioners/ Washing Machines *General Purpose Inverters *Micro/Mini Inverter Drives Description Packages The IRS213(3, 5) are high voltage, high speed power MOSFET and IGBT drivers with three independent high and low side referenced output channels for 3-phase applications. Proprietary HVIC technology enables ruggedized monolithic construction. Logic inputs are compatible with CMOS or LSTTL outputs, down to 2.5 V logic. An independent operational amplifier provides analog feedback of bridge 28-Lead SOIC 28-Lead PDIP current via an external current sense resistor. A current trip function which terminates all six outputs can also derived from this resistor. A shutdown function is available to terminate all six outputs. An open drain FAULT signal is provided to indicate that an over-current or undervoltage shutdown has occurred. Fault conditions are cleared with the FLT-CLR lead. 44-Lead PLCC w/o 12 Leads The output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. Propagation delays are matched to simplify use in high frequencies applications. The floating channels can be used to drive N-channel power MOSFETs or IGBTs in the high side configuration which operates up to 600 V. Typical Connection Absolute Maximum Ratings Absolute Maximum Ratings www.irf.com 1 IRS2133/IRS2135 (J&S)PbF PRELIMINARY Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Zener clamps are included between VCC & COM (25 V), VCC & VSS (20V), and VBx & VSx (20 V). Symbol VB1,2,3 VS1,2,3 VHO1,2,3 VCC VSS VLO1,2,3 VIN VIN,AMP VOUT,AMP VFLT dVS/dt PD Definition High side floating supply voltage High side floating offset voltage High side floating output voltage Fixed supply voltage Logic ground Low side output voltage Logic input voltage ( HIN, LIN ITRIP, SD & FLT-CLR) Operational amplifier input voltage (CA+ & CA-) Operational amplifier output voltage (CAO) FAULT output voltage Allowable offset supply voltage transient (28 lead PDIP) Package power dissipation @ TA ≤ +25 °C (28 lead SOIC) (44 lead PLCC) (28 lead PDIP) Min. -0.3 VB1,2,3 - 20 VS1,2,3 - 0.3 -0.3 VCC - 20 -0.3 VSS -0.3 VSS -0.3 VSS -0.3 VSS -0.3 — — — — — — — — -55 — Max. 625 VB1,2,3 + 0.3 VB1,2,3 + 0.3 25 VCC + 0.3 VCC + 0.3 VCC + 0.3 VCC +0.3 VCC +0.3 VCC +0.3 50 1.5 1.6 2.0 83 78 63 150 150 300 Units V V/ns W Rth,JA TJ TS TL Thermal resistance, junction to ambient Junction temperature Storage temperature Lead temperature (soldering, 10 seconds) (28 lead SOIC) (44 lead PLCC) °C/W °C Recommended Operating Conditions The input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within the recommended conditions. All voltage parameters are absolute voltage referenced to COM. The VS offset rating is tested with all supplies biased at a 15 V differential. Symbol VB1,2,3 VS1,2,3 VHO1,2,3 VCC VSS VLO1,2,3 VIN VIN,AMP VOUT,AMP VFLT Definition High side floating supply voltage High side floating offset voltage High side floating output voltage Fixed supply voltage Low side driver return Low side output voltage Logic input voltage (HIN, LIN ITRIP, SD & FLT-CLR) Operational amplifier input voltage (CA+ & CA-) Operational amplifier output voltage (CAO) FAULT output voltage Min. VS1,2,3 +10/12 Note 1 VS1,2,3 10 or 12 -5 0 VSS VSS VSS VSS Max. VS1,2,3 +20 600 VB1,2,3 20 5 VCC VSS + 5 VSS + 5 VSS + 5 VCC Units V Note 1: Logic operational for VS of (COM - 8 V) to (COM + 600 V). Logic state held for VS of (COM - 8 V) to (COM – VBS). (Please refer to the Design Tip DT97-3 for more details). Note 2: The CAO pin and all input pins (except CA+ & CA-) are internally clamped with a 5.2 V zener diode. www.irf.com 2 IRS2133/IRS2135 (J&S)PbF PRELIMINARY Static Electrical Characteristics VBIAS (VCC, VBS1,2,3) = 15 V, unless otherwise specified and TA = 25 °C. All static parameters other than IO and VO are referenced to VSS and are applicable to all six channels (HIN1,2,3 & LIN1,2,3). The VO and IO parameters are referenced to COM and VS1,2,3 and are applicable to the respective output leads: HO1,2,3 or LO1,2,3. Symbol VIH VIL VFCLR,IH VFCLR,IL VSD,TH+ VSD,THVIT,TH+ VIT,THVOH VOL ILK IQBS IQCC IIN+ IINISD+ ISDIITRIP+ IITRIPIFLTCLR+ IFLTCLRVBSUV+ VBSUVVBSUVH VCCUV+ VCCUVVCCUVH Ron, FLT IO+ IO- Definition Logic “0” input voltage (OUT = LO) Logic “1” input voltage (OUT = HI) Logic “0” fault clear input voltage Logic “1” fault clear input voltage SD input positive going threshold SD input negative going threshold ITRIP input positive going threshold ITRIP input negative going threshold High level output voltage, VBIAS - VO Low level output voltage, VO Offset supply leakage current IRS213(3,5) Quiescent VBS supply current Quiescent VCC supply current Logic “1” input bias current (OUT = HI) Logic “0” input bias current (OUT = LO) “High” shutdown bias current “Low” shutdown bias current “High” ITRIP bias current “Low” ITRIP bias current “High” fault clear input bias current “Low” fault clear input bias current IRS2133 VBS supply undervoltage positive going threshold IRS2135 IRS2133 VBS supply undervoltage negative going threshold IRS2135 IRS2133 VBS supply undervoltage lockout hysteresis IRS2135 IRS2133 VCC supply undervoltage positive going threshold IRS2135 IRS2133 VCC supply undervoltage negative going threshold IRS2135 IRS2133 VCC supply undervoltage lockout hysteresis IRS2135 FAULT low on-resistance Output high short circuit pulsed current Output low short circuit pulsed current Min. Typ. Max. Units Test Conditions 2.2 — 2.2 — 1.6 1.4 470 360 — — — — — — — — — — — — — 7.6 9.2 7.2 8.3 — — 7.6 9.2 7.2 8.3 — — — 200 420 — — — — 1.9 1.7 570 460 — — — 45 3 150 110 5 — 5 — 150 110 8.6 10.4 8.2 9.4 0.4 1 8.6 10.4 8.2 9.4 0.4 1 55 250 500 — 0.8 — 0.8 2.2 2.0 670 560 1 400 50 70 5 200 150 10 100 10 100 200 150 9.6 11.6 9.2 10.5 — — 9.6 11.6 9.2 10.5 — — 75 — mA — mA µA nA µA nA µA mV V mV µA VIN = 0 V, Io = 20 mA VIN = 5 V, Io = 20 mA VB1,2,3 = VS1,2,3 = 600 V VIN = 0 V or 5 V VIN = 0 V or 5 V VIN = 0 V VIN = 5 V SD = 5 V SD = 0 V ITRIP = 5 V ITRIP = 0 V FLT-CLR = 0 V FLT-CLR = 5 V V V Ω VOUT = 0 V, VIN = 0 V PW ≤ 10 µs VOUT = 15 V, VIN = 5 V PW ≤ 10 µs www.irf.com 3 IRS2133/IRS2135 (J&S)PbF PRELIMINARY Static Electrical Characteristics – (Continued) VBIAS (VCC, VBS1,2,3) = 15 V, unless otherwise specified and TA = 25 °C. All static parameters other than IO and VO are referenced to VSS and are applicable to all six channels (HIN1,2,3 & LIN1,2,3). The VO and IO parameters are referenced to COM and VS1,2,3 and are applicable to the respective output leads: HO1,2,3 or LO1,2,3. Symbol VOS IIN,AMP CMRR PSRR VOH,AMP VOL,AMP ISRC,AMP ISNK,AMP IO+,AMP IO-,AMP Definition Amplifier input offset voltage Amplifier input bias current Amplifier common mode rejection ratio Amplifier power supply rejection ratio Operational amplifier high level output voltage Operational amplifier low level output voltage Operational amplifier output source current Operational amplifier output sink current Operational amplifier output high short circuit current Operational amplifier output low short circuit current Min. Typ. Max. Units Test Conditions — — TBD TBD 4.9 — 4 1 — — — — 80 75 5.2 — 7 2.1 10 4 10 50 — dB — 5.4 30 — — mA — — V mV mV nA CA+ = 0.2 V, CA- = CAO CA+ = CA- = 2.5 V CA+ = 0.1 V & 5 V, CA- = CAO CA+ = 0.2 V, CA- = CAO, VCC = 10 V & 20 V CA+ = 1 V, CA- = 0 V CA+ = 0 V, CA- = 1 V CA+ = 1 V, CA- = 0 V, CAO = 4 V CA+ = 0 V, CA- = 1 V, CAO = 2 V CA+ = 5 V, CA- = 0 V, CAO = 0 V CA+ = 0 V, CA- = 5 V, CAO = 5 V Dynamic Electrical Characteristics VBIAS (VCC, VBS1,2,3) = 15 V, VS1,2,3 = VSS , TA = 25 °C and CL = 1000 pF unless otherwise specified. Symbol ton toff tr tf tsd titrip tbl tflt tflt, in tfltclr DT SR+ SR- Definition Turn-on propagation delay Turn-off propagation delay Turn-on rise time Turn-off fall time SD to output shutdown propagation delay ITRIP to output shutdown propagation delay ITRIP blanking time ITRIP to FAULT propagation delay Input filter time ( HIN, LIN, and SD) FLT-CLR to FAULT clear time Deadtime (LS turn-off to HS turn-on & HS turnoff to LS turn-on) Operational amplifier slew rate (+) Operational amplifier slew rate (-) Min. Typ. Max. Units Test Conditions 400 400 — — 400 400 — 350 — 600 150 5 2.4 500 500 80 35 550 660 400 550 325 850 230 10 3.2 700 700 125 55 750 920 — 870 — 1100 350 — — V/µs 1 V step input ns VIN = 0 V & 5 V VS1,2,3 = 0 V to 600 V NOTE: For high side PWM, HIN pulse width must be > 1 µs. www.irf.com 4 IRS2133/IRS2135 (J&S)PbF PRELIMINARY Fig. 1. Input/Output Timing Diagram Fig. 2. Deadtime Waveform Definitions Fig. 3. Input/Output Switching Time Waveform Definitions www.irf.com 5 IRS2133/IRS2135 (J&S)PbF PRELIMINARY Fig. 4. Overcurrent Shutdown Switching Time Waveform Definitions Fig. 5. Input Filter Function Fig. 6. Diagnostic Feedback Operational Amplifier Circuit www.irf.com 6 IRS2133/IRS2135 (J&S)PbF PRELIMINARY Lead Definitions Symbol HIN1,2,3 LIN1,2,3 FAULT VCC ITRIP FLT-CLR SD CAO CACA+ VSS Com VB1,2,3 HO1,2,3 VS1,2,3 LO1,2,3 Description Logic input for high side gate driver outputs (HO1,2,3), out of phase Logic input for low side gate driver outputs (LO1,2,3), out of phase Indicates over-current or undervoltage lockout (low side) has occurred, negative logic Logic and low side fixed supply Input for over-current shut down Logic input for fault clear, negative logic Logic input for shutdown Output of current amplifier Negative input of current amplifier Positive input of current amplifier Logic ground Low side return High side floating supplies High side gate drive outputs High side floating supply returns Low side gate drive outputs Lead Assignments www.irf.com 7 IRS2133/IRS2135 (J&S)PbF PRELIMINARY Functional Block Diagram www.irf.com 8 IRS2133/IRS2135 (J&S)PbF PRELIMINARY 1 PCB Layout Tips 1.1 Distance from H to L Voltage The IRS213(3,5)J package lacks some pins (see page 7) in order to maximizing the distance between the high voltage and low voltage pins. It’s strongly recommended to place the components tied to the floating voltage in the respective high voltage portions of the device (VB1,2,3, VS1,2,3) side. 1.2 Ground Plane To minimize noise coupling ground plane must not be placed under or near the high voltage floating side. 1.3 Gate Drive Loops Current loops behave like an antenna able to receive and transmit EM noise (see Fig. 7). In order to reduce EM coupling and improve the power switch turn on/off performances, gate drive loops must be reduced as much as possible. Moreover, current can be injected inside the gate drive loop via the IGBT collector-to-gate parasitic capacitance. The parasitic auto-inductance of the gate loop contributes to develop a voltage across the gate-emitter increasing the possibility of self turn-on effect. Fig. 7. Antenna Loops 1.4 Supply Capacitors Supply capacitors must be placed as close as possible to the device pins (VCC and VSS for the ground tied supply, VB and VS for the floating supply) in order to minimize parasitic inductance/resistance. 1.5 Routing and Placement Power stage PCB parasitic may generate dangerous voltage transients for the gate driver and the control logic. In particular it’s recommended to limit phase voltage negative transients. In order to avoid such undervoltage it is highly recommended to minimize high side emitter to low side collector distance and low side emitter to negative bus rail stray inductance. See DT04-4 at www.irf.com for more detailed information. www.irf.com 9 IRS2133/IRS2135 (J&S)PbF PRELIMINARY Figures 8-38 provide information on the experimental performance of the IRS2133S HVIC. The line plotted in each figure is generated from actual lab data. A large number of individual samples were tested at three temperatures (-40 ºC, 25 ºC, and 125 ºC) in order to generate the experimental (Exp.) curve. The line labeled Exp. consist of three data points (one data point at each of the tested temperatures) that have been connected together to illustrate the understood trend. The individual data points on the curve were determined by calculating the averaged experimental value of the parameter (for a given temperature). Turn-on Propagation Delay (ns) Turn-off Propagation Delay (ns ) 1500 1200 900 600 Exp. 1500 1200 900 600 300 0 -50 -25 0 25 50 75 100 125 Temperature (oC) Exp. 300 0 -50 -25 0 25 50 75 100 125 Temperature (oC) Fig. 8. Turn-On Propagation Delay vs. Temperature Fig. 9. Turn-Off Propagation Delay vs. Temperature Turn-On Rise Time (ns) Turn-Off Fall Time (ns) 250 200 150 100 50 0 -50 -25 0 25 50 o 150 125 100 75 50 25 0 Exp. Exp. 75 100 125 -50 -25 0 25 50 o 75 100 125 Temperature ( C) Temperature ( C) Fig. 10. Turn-On Rise Time vs. Temperature Fig. 11. Turn-Off Fall Time vs. Temperature www.irf.com 10 IRS2133/IRS2135 (J&S)PbF PRELIMINARY DT Propagation Delay (ns) 1500 1200 900 600 Exp. ITRIP Propagation Delay (ns ) 1800 1500 1200 900 Exp. 300 0 -50 -25 0 25 50 o 600 300 75 100 125 -50 -25 0 25 50 o 75 100 125 Temperature ( C) Temperature ( C) Fig. 12. DT Propagation Delay vs. Temperature Fig. 13. TITRIP Propagation Delay vs. Temperature ITRIP to FAULT Propagation Delay (ns) 1200 900 Exp. FAULT Low On Resistance ( Ohm) 1500 200 160 120 80 40 0 -50 -25 0 25 50 o Exp. 600 300 0 -50 -25 0 25 50 o 75 100 125 75 100 125 Temperature ( C) Temperature ( C) Fig. 14. ITRIP to FAULT Propagation Delay vs. Temperature VBS Quiescent Supply Current (uA) VCC Quiescent Current (mA) 20 16 12 8 4 0 -50 -25 0 25 50 o Exp. Fig. 15. FAULT Low On Resistance vs. Temperature 250 200 150 100 50 0 -50 -25 0 25 50 o Exp. 75 100 125 75 100 125 Temperature ( C) Temperature ( C) Fig. 16. VCC Quiescent Current vs. Temperature Fig. 17. VBS Quiescent Current vs. Temperature www.irf.com 11 IRS2133/IRS2135 (J&S)PbF PRELIMINARY 12 11 VCCUV+ Threshold (V) VCCUV- Threshold (V) 12 11 10 9 Exp. 10 9 8 7 6 -50 -25 0 25 50 o Exp. 8 7 6 75 100 125 -50 -25 0 25 50 o 75 100 125 Temperature ( C) Temperature ( C) Fig. 18. VCCUV+ Threshold vs. Temperature 12 11 VBSUV+ Threshold (V) Fig. 19. VCCUV- Threshold vs. Temperature 12 11 VBSUV- Threshold (V) 10 9 Exp. 10 9 Exp. 8 7 6 -50 -25 0 25 50 75 100 125 Temperature (oC) 8 7 6 -50 -25 0 25 50 o 75 100 125 Temperature ( C) Fig. 20. VBSUV+ Threshold vs. Temperature Fig. 21. VBSUV- Threshold vs. Temperature ITRIP Positive Going Threshold (mV) ITRIP Negative Going Threshold (mV) 1000 800 600 EXP. 900 700 500 Exp. 400 200 -50 -25 0 25 50 o 300 100 -50 -25 0 25 50 o 75 100 125 75 100 125 Temperature ( C) Temperature ( C) Fig. 22. ITRIP Positive Going Threshold vs. Temperature Fig. 23. ITRIP Negative Going Threshold vs. Temperature www.irf.com 12 IRS2133/IRS2135 (J&S)PbF PRELIMINARY Output High SC Pulsed Current (mA) Output Low SC Pulsed Current (mA) 500 400 300 Exp. 750 600 Exp. 450 300 150 0 -50 -25 0 25 50 o 200 100 0 -50 -25 0 25 50 75 100 125 Temperature (oC) 75 100 125 Temperature ( C) Fig. 24. Output High SC Pulsed Current vs. Temperature Fig. 25.Output Low SC Pulsed Current vs. Temperature "High" ITRIP Input Bias Current (uA) 20 15 10 5 Exp. "Low" ITRIP Bias Current (nA) 25 25 20 15 10 5 0 Exp. 0 -50 -25 0 25 50 75 100 125 Temperature (oC) -50 -25 0 25 50 o 75 100 125 Temperature ( C) Fig. 26. "High" ITRIP Bias Current vs. Temperature Fig. 27. "Low" ITRIP Bias Current vs. Temperature 8 6 VOH,AMP (V) 25 20 Exp. VOL,AMP (mV) 15 10 5 0 4 2 0 -50 -25 0 25 50 o Exp. 75 100 125 -50 -25 0 25 50 o 75 100 125 Temperature ( C) Temperature ( C) Fig. 28. VOH,AMP vs. Temperature Fig. 29. VOL,AMP vs. Temperature www.irf.com 13 IRS2133/IRS2135 (J&S)PbF PRELIMINARY 20 15 Exp. 5 4 SR-,AMP (V/us) 3 2 1 0 Exp. SR+,AMP (V/us) 10 5 0 -50 -25 0 25 50 o 75 100 125 -50 -25 0 25 50 o 75 100 125 Temperature ( C) Temperature ( C) Fig. 30. SR+,AMP vs. Temperature 5 4 ISRC,AMP (mA) 12 Fig. 31. SR-,AMP vs. Temperature Exp. 10 Exp. ISNK,AMP (mA) 3 2 1 0 -50 8 6 4 2 0 -25 0 25 50 o 75 100 125 -50 -25 0 25 50 o 75 100 125 Temperature ( C) Temperature ( C) Fig. 32. ISNK,AMP vs. Temperature Fig. 33. ISRC,AMP vs. Temperature 15 12 Exp. 20 16 Exp. IO+,AMP (mA) IO-,AMP (mA) 9 6 3 0 -50 -25 0 25 50 o 12 8 4 0 75 100 125 -50 -25 0 25 50 o 75 100 125 Temperature ( C) Temperature ( C) Fig. 34. IO-,AMP vs. Temperature Fig. 35. IO+,AMP vs. Temperature www.irf.com 14 IRS2133/IRS2135 (J&S)PbF PRELIMINARY 90 70 VOS,AMP (mV) 125 100 Exp. PSRR (dB) Exp. 50 30 10 -10 -50 -25 0 25 50 o 75 50 25 0 75 100 125 -50 -25 0 25 50 o 75 100 125 Temperature ( C) Temperature ( C) Fig. 36. VOS,AMP vs. Temperature Fig. 37. PSRR vs. Temperature 150 125 100 CMRR (dB) 75 50 25 0 -50 -25 0 25 50 o Exp. 75 100 125 Temperature ( C) Fig. 38. CMRR vs. Temperature www.irf.com 15 IRS2133/IRS2135 (J&S)PbF PRELIMINARY Case Outlines www.irf.com 16 IRS2133/IRS2135 (J&S)PbF PRELIMINARY Case Outlines www.irf.com 17 IRS2133/IRS2135 (J&S)PbF PRELIMINARY LOADED TAPE FEED DIRECTION B A H D F C NOTE : CONTROLLING DIM ENSION IN M M E G CARRIER TAPE DIMENSION FOR Metric Code Min Max A 11.90 12.10 B 3.90 4.10 C 23.70 24.30 D 11.40 11.60 E 10.80 11.00 F 18.20 18.40 G 1.50 n/a H 1.50 1.60 28SOICW Imperial Min Max 0.468 0.476 0.153 0.161 0.933 0.956 0.448 0.456 0.425 0.433 0.716 0.724 0.059 n/a 0.059 0.062 F D C E B A G H REEL DIMENSIONS FOR 28SOICW Metric Imperial Code Min Max Min Max A 329.60 330.25 12.976 13.001 B 20.95 21.45 0.824 0.844 C 12.80 13.20 0.503 0.519 D 1.95 2.45 0.767 0.096 E 98.00 102.00 3.858 4.015 F n/a 30.40 n/a 1.196 G 26.50 29.10 1.04 1.145 H 24.40 26.40 0.96 1.039 www.irf.com 18 IRS2133/IRS2135 (J&S)PbF PRELIMINARY LOADED TAPE FEED DIRECTION B A H D F C NOTE : CONTROLLING DIM ENSION IN M M E G CARRIER TAPE DIMENSION FOR Metric Code Min Max A 23.90 24.10 B 3.90 4.10 C 31.70 32.30 D 14.10 14.30 E 17.90 18.10 F 17.90 18.10 G 2.00 n/a H 1.50 1.60 44PLCC Imperial Min Max 0.94 0.948 0.153 0.161 1.248 1.271 0.555 0.562 0.704 0.712 0.704 0.712 0.078 n/a 0.059 0.062 F D C E B A G H REEL DIMENSIONS FOR 44PLCC Metric Code Min Max A 329.60 330.25 B 20.95 21.45 C 12.80 13.20 D 1.95 2.45 E 98.00 102.00 F n/a 38.4 G 34.7 35.8 H 32.6 33.1 Imperial Min Max 12.976 13.001 0.824 0.844 0.503 0.519 0.767 0.096 3.858 4.015 n/a 1.511 1.366 1.409 1.283 1.303 www.irf.com 19 IRS2133/IRS2135 (J&S)PbF PRELIMINARY ORDER INFORMATION 28-Lead PDIP IRS2133PbF 28-Lead PDIP IRS2135PbF 28-Lead SOIC IRS2133SPbF 28-Lead SOIC IRS2135SPbF 44-Lead PLCC IRS2133JPbF 44-Lead PLCC IRS2135JPbF 28-Lead SOIC Tape & Reel IRS2133STRPbF 28-Lead SOIC Tape & Reel IRS2135STRPbF 44-Lead PLCC Tape & Reel IRS2133JTRPbF 44-Lead PLCC Tape & Reel IRS2135JTRPbF WORLDWIDE HEADQUARTERS: 233 Kansas Street, El Segundo, CA 90245 Tel: (310) 252-7105 This part has been qualified per industrial level http://www.irf.com Data and specifications subject to change without notice. 5/15/2006 www.irf.com 20