IRS21844MPBF

August 9, 2011 IRS21844MPBF HALF-BRIDGE DRIVER Features • • • • • • • • • • Floating channel designed for bootstrap operation Fully operational to + 600 V Tolerant to negative transient voltage, dV/dt immune Gate drive supply range from 10 V to 20 V Undervoltage lockout for both channels 3.3 V and 5 V input logic compatible Matched propagation delay for both channels Logic and power ground +/- 5 V offset Lower di/dt gate driver for better noise immunity Output source/sink current capability 1.4 A/1.8 A Lead free, RoHS compliant Product Summary Topology VOFFSET VOUT Io+ & I o- (typical) ton & toff (typical) Deadtime (typical) Half-Bridge 600 V 10 V – 20 V 1.9 A & 2.3 A 680 ns & 270 ns 400 ns (RDT = 0 ) • 5 s (RDT = 200 k ) Package Options MLPQ4x4 16- Leads (Without 2 leads) Typical Connection * Qualification standards can be found at www.irf.com © 2008 International Rectifier IRS21844MPBF Description The IRS21844MPBF is a high voltage, high speed power MOSFET and IGBT drivers with dependent high and low-side referenced output channels. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. The logic input is compatible with standard CMOS or LSTTL output, down to 3.3 V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high-side configuration which operates up to 600 V. Feature Comparison: IRS2181(4)/IRS2183(4)/IRS2184(4) Part Input Logic CrossConduction Prevention logic no yes yes Dead-Time Ground Pins COM VSS/COM COM VSS/COM COM VSS/COM Ton/Toff 2181 21814 2183 21834 2184 21844 HIN/LIN HIN/LIN IN/SD none Internal 500ns Programmable 0.4 – 5 us Internal 500ns Programmable 0.4 – 5 us 180/220 ns 180/220 ns 680/270 ns Qualification Information † Qualification Level Moisture Sensitivity Level Machine Model ESD Human Body Model Charged Device Model IC Latch-Up Test RoHS Compliant † †† Industrial (per JEDEC JESD 47) Comments: This IC has passed JEDEC’s Industrial qualification. IR’s Consumer qualification level is granted by extension of the higher Industrial level. ††† MSL2 MLPQ4x4 14L (per IPC/JEDEC J-STD-020) Class A (+/-100V) (per JEDEC standard JESD22-A115) Class 1C (+/-1500V) (per EIA/JEDEC standard EIA/JESD22-A114) Class III (+/-1000V) (per JEDEC standard JESD22-C101) Class II, Level A (per JESD78A) Yes †† Qualification standards can be found at International Rectifier’s web site http://www.irf.com/ Higher qualification ratings may be available should the user have such requirements. Please contact your International Rectifier sales representative for further information. ††† Higher MSL ratings may be available for the specific package types listed here. Please contact your International Rectifier sales representative for further information. www.irf.com © 2008 International Rectifier 2 IRS21844MPBF Absolute Maximum Ratings Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Symbol Definition Min Max Units VB VS VHO VCC VLO DT VIN VSS dVS/dt PD RthJA TJ TS TL † High-side floating absolute voltage High-side floating supply offset voltage High-side floating output voltage Low-side and logic fixed supply voltage Low-side output voltage Programmable deadtime pin voltage Logic input voltage (IN & SD ) Logic ground -0.3 VB - 25 VS - 0.3 -0.3 -0.3 VSS -0.3 VSS -0.3 VCC - 20 — — — — -50 — 620 VB + 0.3 VB + 0.3 20 VCC + 0.3 VCC + 0.3 VCC + 0.3 VCC + 0.3 50 2.08 36 150 150 300 °C V/ns W °C/W † V Allowable offset supply voltage transient Package power dissipation @ TA ≤ 25°C Thermal resistance, junction to ambient Junction temperature Storage temperature Lead temperature (soldering, 10 seconds) All supplies are fully tested at 25 V and an internal 20 V clamp exists for each supply. Recommended Operating Conditions The input/output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the recommended conditions. The VS and VSS offset rating are tested with all supplies biased at a 15 V differential. Symbol VB VS VHO VCC VLO VIN DT VSS Definition High-side floating supply absolute voltage High-side floating supply offset voltage High-side floating output voltage Low-side and logic fixed supply voltage Low-side output voltage Logic input voltage (IN & SD ) Programmable deadtime pin voltage (†††) Min VS + 10 (††) VS 10 0 VSS VSS -5 Max VS + 20 600 VB 20 VCC VCC VCC 5 Units V Logic ground TA Ambient temperature -40 125 °C †† Logic operational for VS of -5 V to +600 V. Logic state held for VS of -5 V to –VBS. (Please refer to Design Tip DT97-3 for more details). ††† HIN and LIN are internally clamped with a 5.2 V zener diode. www.irf.com © 2008 International Rectifier 3 IRS21844MPBF Dynamic Electrical Characteristics VBIAS (VCC, VBS) = 15 V, VSS = COM, CL = 1000 pF, TA = 25°C, DT = VSS unless otherwise specified. Symbol ton toff tsd MTon MToff tr tf DT MDT Definition Turn-on propagation delay Turn-off propagation delay Shut-down propagation delay Delay matching, HS & LS turn-on Delay matching , HS & LS turn-off Turn-on rise time Turn-off fall time Deadtime: LO turn-off to HO turn-on (DTLO-HO) & HO turn-off to LO turn-on (DTHO-LO) Deadtime matching DTLO-HO - DTHO-LO Min Typ Max Units Test Conditions — — — — — — — 4 — — 680 900 270 400 180 270 0 0 40 20 5 0 0 90 40 60 35 6 50 600 s ns ns VS = 0 V RDT = 0 RDT = 200 k RDT = 0 RDT = 200 k VS = 0 V VS = 0 V or 600 V 280 400 520 Static Electrical Characteristics VBIAS (VCC, VBS) = 15 V, VSS = COM, DT = VSS and TA = 25°C unless otherwise specified. The VIL, VIH and IIN parameters are referenced to VSS/COM and are applicable to the respective input leads: IN and SD . The VO, IO and Ron parameters are referenced to COM and are applicable to the respective output leads: HO and LO. Symbol VIH VIL VSD,TH+ VSD,THVOH VOL ILK IQBS IQCC IIN+ IINVCCUV+ VBSUV+ VCCUVVBSUVVCCUVH VBSUVH IO+ IODefinition Logic “1” input voltage for HO & logic “0” for LO Logic “0” input voltage for HO & logic “1” for LO Min Typ Max Units Test Conditions 2.5 — 2.5 — — — — 20 0.4 — — 8.0 7.4 0.3 1.4 1.8 — — — — — — — 60 1.0 25 — 8.9 8.2 0.7 1.9 2.3 — 0.8 — 0.8 1.4 0.2 50 150 1.6 60 5.0 9.8 9.0 — — A Output low short circuit pulsed current — VO = 0 V, PW ≤ 10 s VO = 15 V, PW ≤ 10 s V A mA A V IO = 0 A IO = 20 mA VB = VS = 600 V VIN = 0 V or 5 V IN = 5 V, SD = 0 V IN = 0 V, SD = 5 V SD input positive going threshold SD input negative going threshold High level output voltage, VBIAS - VO Low level output voltage, VO Offset supply leakage current Quiescent VBS supply current Quiescent VCC supply current Logic “1” input bias current Logic “0” input bias current VCC and VBS supply undervoltage positive going threshold VCC and VBS supply undervoltage negative going threshold Hysteresis Output high short circuit pulsed current VCC = 10 V to 20 V www.irf.com © 2008 International Rectifier 4 IRS21844MPBF Functional Block Diagram: IRS21844 www.irf.com © 2008 International Rectifier 5 IRS21844MPBF Input/Output Pin Equivalent Circuit Diagrams: IRS21844 www.irf.com © 2008 International Rectifier 6 IRS21844MPBF Lead Definitions PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Symbol SD VSS DT COM LO NC VCC NC NC NC VS HO VB NC NC IN Description Logic input for shutdown (referenced to VSS) Logic ground Programmable deadtime lead, referenced to VSS Low-side return Low-side gate drive output No Connection Low-side and logic fixed supply No Connection No Connection No Connection (removed lead) High-side floating supply return High-side gate drive output High-side floating supply No Connection No Connection (removed lead) Logic input for high-side gate driver output (HO), in phase Lead Assignments: IRS21844 16 15 14 13 SD 1 12 HO IRS21844MPBF Vss 2 11 VS DT 3 COM 4 16L- MLPQ4x 4 with 2 leads removed 5 6 7 8 10 NC 9 NC = Removed lead IRS21844MPBF www.irf.com © 2008 International Rectifier 7 IRS21844MPBF Application Information and Additional Details SD Figure 1: Input/Output Timing Diagram Figure 2: Switching Time Waveform Definitions SD Figure 3: Shutdown Waveform Definitions Figure 4: Deadtime Waveform Definitions IN (LO) 50% IN (HO) 50% LO HO 10% MT 90% MT LO HO Figure 5: Delay Matching Waveform Definitions www.irf.com © 2008 International Rectifier 8 IRS21844MPBF www.irf.com © 2008 International Rectifier 9 IRS21844MPBF www.irf.com © 2008 International Rectifier 10 IRS21844MPBF www.irf.com © 2008 International Rectifier 11 IRS21844MPBF www.irf.com © 2008 International Rectifier 12 IRS21844MPBF www.irf.com © 2008 International Rectifier 13 IRS21844MPBF www.irf.com © 2008 International Rectifier 14 IRS21844MPBF www.irf.com © 2008 International Rectifier 15 IRS21844MPBF www.irf.com © 2008 International Rectifier 16 IRS21844MPBF www.irf.com © 2008 International Rectifier 17 IRS21844MPBF www.irf.com © 2008 International Rectifier 18 IRS21844MPBF www.irf.com © 2008 International Rectifier 19 IRS21844MPBF www.irf.com © 2008 International Rectifier 20 IRS21844MPBF www.irf.com © 2008 International Rectifier 21 IRS21844MPBF www.irf.com © 2008 International Rectifier 22 IRS21844MPBF www.irf.com © 2008 International Rectifier 23 IRS21844MPBF Package Details: MLPQ 4x4 -16L www.irf.com © 2008 International Rectifier 24 IRS21844MPBF Tape and Reel Details: MLPQ 4x4 www.irf.com © 2008 International Rectifier 25 IRS21844MPBF Part Marking Information Ordering Information Base Part Number Package Type Standard Pack Form Tube/Bulk IRS21844 MLPQ 4x4-16L Tape and Reel 3,000 Complete Part Number IRS21844MPBF IRS21844MTRPBF Quantity 92 The information provided in this document is believed to be accurate and reliable. However, International Rectifier assumes no responsibility for the consequences of the use of this information. International Rectifier assumes no responsibility for any infringement of patents or of other rights of third parties which may result from the use of this information. No license is granted by implication or otherwise under any patent or patent rights of International Rectifier. The specifications mentioned in this document are subject to change without notice. This document supersedes and replaces all information previously supplied. For technical support, please contact IR’s Technical Assistance Center http://www.irf.com/technical-info/ WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105 www.irf.com © 2008 International Rectifier 26