IRS21853SPBF

Data Sheet No. PD60294 IRS21853SPBF DUAL HIGH SIDE DRIVER IC Features • • • • • • Gate drive supply range from 10 V to 20 V Under voltage lockout for VCC & VBS1,2 5 V input logic compatible Tolerant to negative transient voltage Matched propagation delays for all channels RoHS compliant Product Summary VOFFSET VOUT ton/toff (typ) Io+/600 V max 10 V to 20 V 170 ns/170 ns 2 A/2 A 40 ns Descriptions The IRS21853 is a high voltage, high speed power MOSFET and IGBT dual high-side driver with propagation delay matched output channels. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. The floating logic input is compatible with standard CMOS or LSTTL output, down to 3.3 V logic and can be operated up to 600 V above the ground. The output driver features a high pulse current buffer stage designed for minimum driver crossconduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high-side configuration, which operates up to 600 V. Delay Matching Package 16-Lead SOIC (narrow body) Typical Connection Diagram 1 2 3 4 5 6 7 8 VCC COM H IN 1 H IN 2 V B1 HO1 V S1 16 15 14 13 12 11 10 9 +VDC1 IR S21853 S O N 16 V S2 HO2 V B2 +VD C 2 IRS21853SPBF Typical Connection Diagram for ER Circuit in PDP 1 2 3 4 5 6 7 8 VCC COM HIN1 HIN2 VB1 HO1 VS1 16 15 14 13 12 11 10 9 C ERC L ER C Cp IRS21853 SON16 VS2 HO2 VB2 2 IRS21853SPBF Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. parameters are absolute voltages referenced to COM. All voltage Symbol VCC VIN VB1,2 VS1,2 VHO1,2 dVS/dt PD RθJA TJ TS TL Note1: Definition Low side supply voltage Logic input voltage (HIN1,2) High side floating well supply voltage High side floating well supply return voltage Floating gate drive output voltage Allowable VS1,2 offset supply transient relative to COM Package power dissipation @ TA ≤+25 ºC Thermal resistance, junction to ambient Junction temperature Storage temperature Lead temperature (soldering, 10 seconds) Min -0.3 COM-0.3 -0.3 VB1,2-20 VS1,2-0.3 -55 - Max 20 (Note1) VCC +0.3 620 (Note1) VBn+0.3 VBn+0.3 50 1.25 100 150 300 Units V V/ns W ºC/W ºC All supplies are fully tested at 25 V. An internal 20 V clamp exists for each supply. Recommended Operating Conditions For proper operation, the device should be used within the recommended conditions. All voltage parameters are absolute voltages referenced to COM. The offset rating are tested with supplies of (VCC-COM)=(VB1,2-VS1,2)=15 V. Symbol VCC VIN VB1,2 VS1,2 VHO1,2 TA Note 2: Note 3: Definition Low side supply voltage HIN1, 2 input voltage High side floating well supply voltage High side floating well supply offset voltage Floating gate drive output voltage Ambient temperature Min 10 COM VS1,2+10 Note 2 VS1,2 -40 Max 20 VCC VS1,2+20 600 VB1,2 125 Units V ºC VS1,2 and VB1,2 voltages will be tolerant to short negative transient spikes. These will be defined and specified in the future. Logic operation for VS of –5 V to 600 V. Logic state held for VS of –5 V to –VBS1,2. (Please refer to Design Tip DT97-3 for more details). 3 IRS21853SPBF Static Electrical Characteristics (VCC-COM)=(VB1,2-VS1,2)=15 V. TA = 25 oC unless otherwise specified. The VIN, VIN,TH, and IIN parameters are referenced to COM. The VO and IO parameters are referenced to respective VS1,2 and are applicable to the respective output leads HO1,2. The VCCUV parameters are referenced to COM. The VBSUV1,2 parameters are referenced to VS1,2. Symbol VCCUV+ VCCUVVBSUV+ VBSUVILK1,2 IQBS IQCC VIH VIL VOH VOL IIN+ IINIo+ Io- Definition VCC supply undervoltage positive going threshold VCC supply undervoltage negative going threshold VBS1,2 supply undervoltage positive going threshold VBS1,2 supply undervoltage negative going threshold High-side floating well offset supply leakage current Quiescent VBS supply current Quiescent VCC supply current Logic “1” input voltage Logic “0” input voltage HO1,2 high level output voltage, VBIAS-VO HO1,2 low level output voltage, VO Logic “1” input bias current Logic “0” input bias current Output high short circuit pulsed current HO1,2 Output low short circuit pulsed current HO1,2 Min 8.0 7.4 8.0 7.4 ------3.5 --------------- Typ 8.9 8.2 8.9 8.2 --75 110 --------5 --2 2 Max Units 9.8 9.0 V 9.8 9.0 50 150 220 --0.6 1.4 0.0 6 20 µA 5 --A --V µA Test Conditions VB1,2 = VS1,2 = 600 V HIN1,2 = 0 V or 5 V Io= 0 A Io=20 mA VHIN1,2=5 V VHIN1,2=0 V VO=0 V,VIN=0 V, PW