January 16, 2009 Datasheet No. - PD97375
IRS21956S
Floating Input, High and Low(Dual mode) Side Driver Features
• • • • • • • • Low side programmable ramp gate drive Low side generic gate drive integrated using the same low side output pin High side generic gate driver Under voltage lockout for VDD, VCC & VBS Floating 5V input logic compatible Tolerant to negative transient voltage on Vs Shoot through prevention RoHS compliant
Product Summary
Topology VOFFSET LO SR+ Io+ & I o- (typical) tON & tOFF (typical) PDP ≤ 600 V 4.5V/us 0.5A & 0.5A 300ns & 280ns
Package Options
20-Lead SOIC
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IRS21956S
Table of Contents
Description Simplified Block Diagram Typical Application Diagram Qualification Information Absolute Maximum Ratings Recommended Operating Conditions Static Electrical Characteristics DV / Linear (Stepwise) Mode Dynamic Electrical Characteristics Timing Diagram and logic truth table Input/Output Pin Equivalent Circuit Diagram Lead Definitions Lead Assignments Package Details Tape and Reel Details Part Marking Information Ordering Information
Page
3 4 5 7 8 8 9 10 10 11 16 17 18 19 20 21 22
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IRS21956S
Description
The IRS21956 is high voltage and programmable ramp slope control gate driver for MOSFET and IGBT with single low side dual mode driver, high side driver and floating 5V input. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. The floating logic input is compatible with standard 5V CMOS or LSTTL output. The output driver features a programmable slope control by external R/C and input signals. The floating channels can be used to drive an N-channel power MOSFET or IGBT in the high side configuration, which operates up to 600 volts above the COM ground.
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IRS21956S
Simplified Block Diagram
VB VDD UVLO UVLO R LIN1 LIN2
Logic and Pulse Generator
Pulse Filter
R S
Q
HO3
VS HIN3 VSS Level Shift Down
VCC
Level Shift Up
UVLO
Shoot Through Prevention And Logic circuit
Conditioning And Op- amp Driving
LO
+
VSE
Reference Generating R Pulse Filter R S Q 10 V regulator
VREF COM
DV RES
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IRS21956S
Typical Connection Diagram
A) Linear Ramp driver’s connection diagram
B) Stepwise linear Ramp driver’s connection diagram
VSET
NC VB HO3 VS NC IRS21956 SOW20 NC VCC LO VSE RRES VREF DV RES COM
5 VDD
VDD LIN1 LIN2 HIN3 VSS NC NC
Panel
25 V Max
CREF
Optional Cc
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IRS21956S
C) Exponential Ramp driver’s connection diagram
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IRS21956S
Qualification Information†
Qualification Level
Moisture Sensitivity Level Machine Model ESD Human Body Model IC Latch-Up Test RoHS Compliant † ††
Industrial†† Comments: This family of ICs has passed JEDEC’s Industrial qualification. IR’s Consumer qualification level is granted by extension of the higher Industrial level. MSL3††† 260°C SOIC20W (per IPC/JEDEC J-STD-020) Class B (per JEDEC standard JESD22-A115) Class 2 (per EIA/JEDEC standard EIA/JESD22-A114) Class I, Level A (per JESD78) Yes
Qualification standards can be found at International Rectifier’s web site http://www.irf.com/ Higher qualification ratings may be available should the user have such requirements. Please contact your International Rectifier sales representative for further information. ††† Higher MSL ratings may be available for the specific package types listed here. Please contact your International Rectifier sales representative for further information.
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IRS21956S
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. Symbol Definition Min Max Units VDD VSS VIN VCC V DV, VVREF VVSE, VRES VLO VB VS VHO dVSS/dt dVS/dt PD RθJA TJ TS TL Floating Input Supply Voltage Floating Input Supply Return Voltage Logic input voltage (LIN1,LIN2,HIN3) Low side supply voltage Low side inputs voltage Low side inputs voltage Low side gate drive output voltage High side floating well supply voltage High side floating well supply return voltage Floating gate drive output voltage Allowable VSS offset supply transient relative to COM Allowable VS offset supply transient relative to COM Package Power Dissipation @ TA
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