July 09, 2008
IRS2530D(S)
DIM8 IC Features
• • • • • • • • • • • • • • • • • • • • Dimming ballast control plus half-bridge driver Closed-loop lamp current dimming control Internal non-ZVS protection Internal crest factor protection Programmable preheat time Fixed dead-time (2.0μs typ.) Lamp insert auto-restart Internal bootstrap MOSFET Internal 15.6V zener clamp diode on Vcc Micropower startup (250μA) Latch immunity and ESD protection
TM
DIMMING BALLAST CONTROL IC
Product Summary
Topology VOFFSET VOUT IO+ & IO- (typical) Deadtime (typical) Half-Bridge 600 V VCC 180mA & 260mA 2.0μs
Package Types
Ballast System Features
Single chip dimming solution Simple lamp current dimming control method Single lamp current sensing resistor required No half-bridge current-sensing resistor required No external protection circuits required (fully PDIP8 SO8 internal) Flash-free lamp start at all dimming levels Large reduction in component count Typical applications Easy to use for fast design cycle time • Linear dimming ballast (down to 10%) Increased manufacturability and reliability • 3-way dimming ballast • Multi-level switch dimming ballast
Typical Connection Diagram
L AC LINE INPUT N
F1
LF BR1
RVCC1
RVCC2
RLIM1 CF CBUS CVCC1 RLIM2
VCC
VB
1
8
RHO HO CBS CSNUB RLO MLS DCP2 RLMP2 RLMP1 CH2 CRES LRES:B CH1 MHS LRES:A CDC
IRS2530D
CVCC2 CDIM
COM
2
DIM
7 6 5
3
CVCO VCO
VS
SPIRAL CFL LAMP
4
CPH RVCO RDIM1 CFB
LO
(+) 1-10V DIM INPUT (-)
RFB DCP1 LRES:C
RDIM2 RCS
www.irf.com
© 2008 International Rectifier
1
IRS2530D(S)
Table of Contents
Description Qualification Information Absolute Maximum Ratings Recommended Operating Conditions Electrical Characteristics Input/Output Pin Equivalent Circuit Diagram Lead Definitions Lead Assignments State Diagram Application Information and Additional Details Package Details Tape and Reel Details Part Marking Information Ordering Information
Page
3 4 5 6 7 9 10 10 11 12 20 21 22 23
www.irf.com
© 2008 International Rectifier
2
IRS2530D(S)
Description
This IC takes full advantage of IR’s patented ballast and high-voltage technologies to realize a simple, highperformance dimming ballast solution. A single high-voltage pin senses the half-bridge current and voltage to perform necessary ballast protection functions. The DC dim input voltage reference and the AC lamp current feedback have been coupled together allowing a single pin to be used for dimming. Combining these high-voltage control algorithms together with a simple dimming method in a single 8-pin IC results in a large reduction in component count, an increase in manufacturability and reliability, a reduced design cycle time, while maintaining high dimming ballast system performance
Block Diagram
Bootstrap MOSFET
VCC 1 UVLO COM 2
Driver Logic
8 High-Side Half-bridge Driver 7 6
VB HO VS
1uA VCO 4 Voltage Controlled Oscillator Fault Logic Crest Factor Protection Half-bridge Voltage Sensing
Dimming Control
Non-ZVS Protection Low-Side Half-bridge Driver 5 LO
DIM
3
Restart Logic
www.irf.com
© 2008 International Rectifier
3
IRS2530D(S)
†
Qualification Information
Qualification Level
Moisture Sensitivity Level
Machine Model ESD Human Body Model IC Latch-Up Test RoHS Compliant † †† †††
Industrial†† Comments: This family of ICs has passed JEDEC’s Industrial qualification. IR’s Consumer qualification level is granted by extension of the higher Industrial level. MSL2††† SOIC8 (per IPC/JEDEC J-STD-020C) Not applicable PDIP8 (non-surface mount package style) Class C (per JEDEC standard EIA/JESD22-A115) Class 3A (per EIA/JEDEC standard JESD22-A114) Class I, Level A (per JESD78A) Yes
Qualification standards can be found at International Rectifier’s web site http://www.irf.com/ Higher qualification ratings may be available should the user have such requirements. Please contact your International Rectifier sales representative for further information. Higher MSL ratings may be available for the specific package types listed here. Please contact your International Rectifier sales representative for further information.
www.irf.com
© 2008 International Rectifier
4
IRS2530D(S)
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM, all currents are defined positive into any lead. The Thermal Resistance and Power Dissipation ratings are measured under board mounted and still air conditions. Symbol VB VS VHO VLO VVCO VDIM ICC IOMAX dVS/dt PD PD RθJA RθJA TJ TS TL † Definition High-Side Floating Supply Voltage High-Side Floating Supply Offset Voltage High-Side Floating Output Voltage Low-Side Output Voltage VCO Input Voltage DIM Input Voltage Supply Current Maximum allowable current at LO, HO and PFC due to external power transistor Miller effect. Allowable VS Pin Voltage Slew Rate Maximum Power Dissipation @ TA ≤ +25ºC, 8-Pin DIP Maximum Power Dissipation @ TA ≤ +25ºC, 8-Pin SOIC Thermal Resistance, Junction to Ambient, 8-Pin DIP Thermal Resistance, Junction to Ambient, 8-Pin SOIC Junction Temperature Storage Temperature Lead Temperature (Soldering, 10 seconds)
† ††
Min. -0.3 VB - 25 VS - 0.3 -0.3 -0.3 -0.3 ---500 -50 ---------55 -55 ---
Max. 625 VB + 0.3 VB + 0.3 VCC + 0.3 6 VCC + 0.3 20 500 50 1.0 0.625 85 128 150 150 300
Units
V
mA V/ns W ºC/W
ºC
This IC contains a zener clamp structure between the chip VCC and COM which has a nominal breakdown voltage of 15.6V. This supply pin should not be driven by a DC, low impedance power source greater than the VCLAMP specified in the Electrical Characteristics section. This IC contains a zener clamp structure between the chip VCO and COM which has a nominal breakdown voltage of 7.25V. This pin should not be driven by a DC, low impedance power source greater than the VVCOMAX specified in the Electrical Characteristics section.
††
www.irf.com
© 2008 International Rectifier
5
IRS2530D(S)
Recommended Operating Conditions
For proper operation the device should be used within the recommended conditions. Symbol VBS VS VCC ICC VVCO TJ ††† Definition High-Side Floating Supply Voltage Steady State High-Side Floating Supply Offset Voltage Supply Voltage Supply Current VCO Pin Voltage Junction Temperature Min. VCC - 0.7 -3.0
†††
Max. VCLAMP 600 VCLAMP 5 6 125
Units V V V mA V ºC
VCCUV+ + 0.1V --0 -40
Care should be taken to avoid output switching conditions where the VS node decreases below COM by more than 5V.
www.irf.com
© 2008 International Rectifier
6
IRS2530D(S)
Electrical Characteristics
VCC=VBS=14V, VS=0V, CVCC=CBS=0.1μF, CVCO=CDIM=10nF, CLO=CHO=1nF, and TA = 25°C unless otherwise specified. The output voltage and current (VO and IO) parameters are referenced to COM and are applicable to the respective HO and LO output leads. Symbol Definition Min Typ Max Units Test Conditions
Low Voltage Supply Characteristics VCLAMP VCCUV+ VCCUVVCCUVHY IQCCUV ICCDIM IQCCFLT VVCOMAX IBS IQBSUV VBSUV+ VBSUVILK fMIN fMAX d DT IVCO VLOSD+ VLOSDVZVSTH VVCOFLT+ CSCF VCC Zener Clamp Voltage Rising VCC UVLO+ Threshold Falling VCC UVLO- Threshold VCC Undervoltage Lockout Hysteresis Micropower Startup VCC Supply Current DIM Mode VCC Supply Current Fault Mode VCC Supply Current VCO Pin Zener Clamp Voltage VBS Supply Current UVLO Mode VBS Quiescent Current Rising VBS Supply Undervoltage Threshold Falling VBS Supply Undervoltage Threshold Offset Supply Leakage Current Minimum Output Frequency Maximum Output Frequency Duty Cycle Output Deadtime (HO or LO) VCO Pin Charging Current LO Pin Shutdown Threshold LO Pin Re-start Threshold VS Non-ZVS Detection Threshold VCO Fault Rising Threshold Crest factor peak-to-average fault factor 14.6 11.5 9.5 1.5 ------------8.0 7.0 --15.6 12.5 10.5 2.0 250 4.5 375 7.25 2 --9.0 8.0 --16.6 13.5 11.5 3.0 --------3 50 10.0 V 9.0 50 μA VB = VS = 600V VCO = 6V VCO = 0V MODE = ALL MODE = PH/IGN MODE = FAULT MODE = FAULT MODE = DIM, LO = HIGH MODE = PH/IGN N/A MODE = DIM VS offset = 0.5V µA mA µA V mA µA VCC = 8V MODE = DIM MODE = FAULT MODE = DIM MODE = DIM VBS = 7V V ICC = 10mA
Floating Supply Characteristics
Ballast Control Characteristics 32.0 ------------------34.2 115 50 2.0 1 8.75 8.5 4.5 4.0 5.5 36.4 ------------------kHz % µs µA V
V
www.irf.com
© 2008 International Rectifier
7
IRS2530D(S)
Electrical Characteristics
VCC=VBS=14V, VS=0V, CVCC=CBS=0.1µF, CVCO=CDIM=10nF, CLO=CHO=1nF, and TA = 25°C unless otherwise specified. The output voltage and current (VO and IO) parameters are referenced to COM and are applicable to the respective HO and LO output leads. Symbol Definition Min Typ Max Units Test Conditions
Dimming Control Characteristics VDIMREG DIM Regulation Threshold --0.0 --V MODE = DIM
Gate Driver Output Characteristics (HO and LO) VOH VOL VOL_UV tr tf tSD IO+ IOHigh-Level Output Voltage Low-Level Output Voltage UV-Mode Output Voltage Output Rise Time Output Fall Time Shutdown Propagation Delay Output source current Output sink current ----------------VCC COM COM 120 50 350 180 260 ------220 80 ------mA ns IO = 0A IO = 0A IO = 0A, VCC ≤ VCCUV-
Bootstrap FET Characteristics VB_ON IB_CAP IB_10V VB when the bootstrap FET is on VB source current when FET is on VB source current when FET is on --30 8 13.3 55 12 ------V mA CBS = 0.1µF VB = 10V
www.irf.com
© 2008 International Rectifier
8
IRS2530D(S)
I/O Pin Equivalent Circuit Diagrams
www.irf.com
© 2008 International Rectifier
9
IRS2530D(S)
Lead Definitions
Pin # 1 2 3 4 5 6 7 8 Symbol VCC COM DIM VCO LO VS HO VB I C power and signal ground D imming DC reference and AC lamp current feedback input V oltage-controlled oscillator (VCO) input Half-bridge low-side gate driver output High voltage floating supply return and half-bridge sensing input High-side gate driver output High-side gate driver floating supply Description L ogic and internal gate drive supply voltage
Lead Assignments
VCC
1
8
VB
IRS2530D
10
COM
2
7 HO
DIM
3
6 VS
VCO
4
5 LO
www.irf.com
© 2008 International Rectifier
IRS2530D(S)
State Diagram
Power Off
VCC > 0V
UVLO Mode
Half-Bridge Off
IQCCUV ≅ 250μA VCO = 0V HO Off LO Open Circuit VCC > 12.5V (VCCUV+) and LO < 8.5V (VLOSD-) (Lamp Inserted) VCC < 10.5V (VCCUV-)
VCC < 10.5V (VCCUV-) or LO > 8.75V (VLOSD+) (Lamp Removed)
FAULT Mode
Fault Latch Set Half-Bridge Off IQCCUV ≅ 250μA HO Off LO Open Circuit
VCO > 4.0V (VVCOFLT+) (Lamp non-strike)
PH/IGN Mode
Half-Bridge Oscillating Freq ramps from fMAX to fMIN VCO Charging (1μA) non-ZVS Disabled Crest Factor Disabled
Lamp Ignites
CF > 5.5 (lamp removal)
DIM Mode
non-ZVS
ZVS
freq = freq + df
ZVS OK
Half-Bridge Oscillating @fDIM Dimming Loop Enabled non-ZVS Enabled Crest Factor Enabled
www.irf.com
© 2008 International Rectifier
11
IRS2530D(S)
Application Information and Additional Details
Information regarding the following topics is included as subsections within this section of the datasheet: • • • • • • • • UVLO Mode and IC Supply Circuitry Preheat/Ignition (PH/IGN) Mode Dim Mode Non Zero-Voltage Switching (ZVS) Protection Crest Factor Over-current Protection Fault Mode and Lamp Reset Component Selection PCB Layout Guidelines
UVLO Mode and IC Supply Circuitry The Under-Voltage Lock-Out Mode (UVLO) is defined as the state the IC is in when VCC is below the turn-on threshold of the IC, VCCUV+ (12.5 V, typical), and LO is above the shutdown threshold, VLOSD+ (8.75 V, typical). The UVLO circuit is designed to maintain an ultra-low supply current IQCCUV (
很抱歉,暂时无法提供与“IRS2530DSPBF”相匹配的价格&库存,您可以联系我们找货
免费人工找货