IRS2552D

July 7, 2009 IRS2552D CCFL/EEFL BALLAST CONTROLLER IC Features • • • • • • • • • • • • • • • • • Drives up to two IGBT/MOSFET power devices Integrated programmable oscillator Soft start function 15.6 V voltage clamp on VCC Micro-power startup 0 V to 5 V input analog dimming Programmable ignition frequency Programmable ignition time Lamp current control Programmable deadtime Supports multi-lamp operation Burst dimming with soft start at every burst Latched open circuit protection Integrated bootstrap functionality Excellent latch immunity on all inputs & outputs Integrated ESD protection on all pins Product Summary Topology VOFFSET VOUT IO+ & IO- (typical) Deadtime (programmable) Half-Bridge 600 V VCC 300 mA & 450 mA 500ns ~ 2µs Package Options Typical Application CCFL/EEFL inverter 16-Lead PDIP 16-Lead SOIC (Narrow Body) Typical Application Diagram www.irf.com © 2009 International Rectifier 23 IRS2552D Table of Contents Typical Application Diagram Qualification Information Absolute Maximum Ratings Recommended Operating Conditions Electrical Characteristics Functional Block Diagram Lead Definitions Lead Assignments State Diagram Application Information and Additional Details Package Details Part Marking Information Ordering Information Page 1 4 5 6 7 10 12 13 14 15 29 30 32 www.irf.com © 2009 International Rectifier 2 IRS2552D Description The IRS2552D incorporates a high voltage half-bridge gate driver with a front end that incorporates full control functionality for CCFL/EEFL ballasts. Includes a programmable ignition and supports dimming via analog or PWM control voltage. HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. The output driver features a high pulse current buffer stage designed for minimum driver cross-conduction. Noise immunity is achieved with low di/dt peak of the gate drivers, and with an undervoltage lockout hysteresis of approximately 1 V. The IRS2552D also includes protection features for over-current and over-voltage of the lamps. www.irf.com © 2009 International Rectifier 3 IRS2552D Qualification Information† Qualification Level Industrial†† (per JEDEC JESD 47E) Comments: This family of ICs has passed JEDEC’s Industrial qualification. IR’s Consumer qualification level is granted by extension of the higher Industrial level. MSL3††† SOIC16 (per IPC/JEDEC J-STD-020C) Not applicable PDIP16 (non-surface mount package style) Class C (per JEDEC standard EIA/JESD22-A115-A) Class 3A (per EIA/JEDEC standard JESD22-A114-B) Class I, Level A (per JESD78A) Yes Moisture Sensitivity Level Machine Model ESD Human Body Model IC Latch-Up Test RoHS Compliant † †† Qualification standards can be found at International Rectifier’s web site http://www.irf.com/ Higher qualification ratings may be available should the user have such requirements. Please contact your International Rectifier sales representative for further information. ††† Higher MSL ratings may be available for the specific package types listed here. Please contact your International Rectifier sales representative for further information. www.irf.com © 2009 International Rectifier 4 IRS2552D Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM, all currents are defined positive into any lead. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Symbol VB VS VH VL VCO VCT VDT MIN DIM CR CD SD CS ICC dVS/dt PD RΘJA TJ TS TL † Definition High-side floating supply voltage High-side floating supply offset voltage High-side floating output voltage Low-side output voltage VCO pin voltage CT pin voltage DT pin voltage MIN pin voltage DIM pin voltage CR pin voltage CD pin voltage SD pin voltage CS pin voltage † Supply current Allowable offset voltage slew rate Package power dissipation @ TA ≤ +25 ºC Thermal resistance, junction to ambient Junction temperature Storage temperature Lead temperature (soldering, 10 seconds) Min. -0.3 VB - 25 VS – 0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 ---50 ---------55 -55 --Max. 625 VB + 0.3 VB + 0.3 VCC + 0.3 VCC + 0.3 VCC + 0.3 VCC + 0.3 VCC + 0.3 VCC + 0.3 VCC + 0.3 VCC + 0.3 VCC + 0.3 VCC + 0.3 25 50 1.3 1.4 70 82 150 150 300 Units V mA V/ns W ºC/W ºC 16L-PDIP 16L-SOIC 16L-PDIP 16L-SOIC This IC contains a voltage clamp structure between the chip VCC and COM which has a nominal breakdown voltage of 15.6 V. Please note that this supply pin should not be driven by a DC, low impedance power source greater than the VCLAMP specified in the Electrical Characteristics section. www.irf.com © 2009 International Rectifier 5 IRS2552D Recommended Operating Conditions For proper operation the device should be used within the recommended conditions. Symbol VBS VS VCC ICC TJ † †† Definition High-side floating supply voltage Steady-state high-side floating supply offset voltage Supply voltage Supply current Junction temperature Min. VCC – 0.7 -3.0 VCCUV+ +0.1V †† -40 † Max. VCLAMP 600 VCLAMP 10 125 Units V mA ºC Care should be taken to avoid output switching conditions where the VS node flies inductively below ground by more than 5 V. Enough current should be supplied to the VCC pin of the IC to keep the internal 15.6 V zener diode clamping the voltage at this pin. Recommended Component Values Symbol RMIN RMAX RDT CT CDT CR CD Component MIN pin resistor value MAX pin resistor value DT pin resistor value CT pin capacitor value DT pin capacitor value CR pin capacitor value CD pin capacitor value Min. 5 5 22 330 47 1 1 Max. ------Units kΩ pF nF www.irf.com © 2009 International Rectifier 6 IRS2552D Electrical Characteristics VBIAS (VCC, VBS) = 14 V, CT = 1 nF and TA = 25 °C unless otherwise specified. The input parameters are referenced to COM. The VO and IO parameters are referenced to COM and are applicable to the respective output leads: HO or LO. Symbol Definition Low Voltage Supply Characteristics VCCUV+ VCCUVVCCUVHYS IQCCUV IQCC IQCCFLT ICC,FMIN VCLAMP Rising VCC undervoltage lockout threshold Falling VCC undervoltage lockout threshold VCC undervoltage lockout hysteresis Micropower startup VCC supply current Quiescent VCC supply current VCC supply current VCC current @ fosc = fMIN VCC clamp voltage Min 9.5 8.5 0.5 --------14.6 Typ 10.5 9.5 1 300 4.0 0.9 4.7 15.6 Max 11.5 10.5 1.5 350 4.5 1.3 5.3 16.6 V mA µA VCC = VCCUV+ -100 mV rising RMIN = 12 kΩ, RUN MODE CT = 0 V Fault mode RMIN = 12 kΩ, RUN MODE ICC = 19 mA VCC ≤ VCCUV-, µA VCC = VBS HO oscillating V N/A Units Test Conditions Floating Supply Characteristics IQBSUV IBS VBSUV+ VBSUVILK Micropower startup VBS supply current VBS supply current VBS supply undervoltage positive going threshold VBS supply undervoltage negative going threshold Offset supply leakage current ----6.5 6.0 --6 1000 7.5 7.0 --20 1200 8.5 V 8.0 50 μA VB = VS = 600 V RMIN = 12 kΩ, RUN MODE RMAX = 6.8 kΩ, IGNITION MODE N/A RMIN =12 kΩ, RUN MODE N/A Oscillator I/O Characteristics fMIN fMAX VCT+ VCTICT VMIN VMAX VMIN,FLT VMAX,FLT Minimum oscillator frequency Maximum oscillator frequency Upper CT ramp voltage threshold Lower CT ramp voltage threshold CT pin source current VMIN pin voltage VMAX pin voltage VMIN voltage in fault mode VMAX voltage in fault mode 36.5 67 4.8 --350 4.8 4.8 ----39 69 5.0 0 410 5.0 5.0 0 0 42.5 kHz 71 5.2 --470 5.2 5.2 ----V N/A V μA www.irf.com © 2009 International Rectifier 7 IRS2552D Electrical Characteristics VBIAS (VCC, VBS) = 14 V, CT = 1 nF and TA = 25 °C unless otherwise specified. The input parameters are referenced to COM. The VO and IO parameters are referenced to COM and are applicable to the respective output leads: HO or LO. Symbol Ignition ICR,IGN VCS,IGN VOH VOL VOL,UV tR tF tD IO+ IOVB,ON IB,CAP IB,10V Shutdown VSD,TH ICD,source VCD,TH Shutdown threshold at SD pin CD pin source current Threshold at which CD triggers shutdown 1.9 3.7 4.8 2.0 4.5 5.0 2.1 5.3 5.2 V μA V N/A VSD>VSD,TH, RMIN = 12 kΩ VCC = 14 V Definition Min Typ Max Units Test Conditions RMIN = 12 kΩ, IGNITION MODE N/A Source current at CR pin in IGN mode Ignition detection threshold High-level output voltage, VBIAS – VO Low-level output voltage, VO UV-mode output voltage, VO Output rise time Output fall time Output deadtime (HO or LO) Output source current Output sink current VB when the bootstrap FET is on VB source current when FET is on VB source current when FET is on 3.7 0.57 ----------1.0 ----13.2 40 9 4.5 0.6 VCC COM COM 80 45 1.1 300 450 13.5 55 12 5.3 0.63 ------150 100 1.2 ----------- μA V V mV Gate Driver Output Characteristics IO = 0 A IO = 0 A, VCC ≤ VCCUVns μs mA N/A RDT = 2.2 kΩ, CDT = 1 nF N/A Bootstrap FET Characteristics V mA mA N/A CBS = 0.1 μF V B = 10 V www.irf.com © 2009 International Rectifier 8 IRS2552D Electrical Characteristics VBIAS (VCC, VBS) = 14 V, CT = 1 nF and TA = 25 °C unless otherwise specified. The input parameters are referenced to COM. The VO and IO parameters are referenced to COM and are applicable to the respective output leads: HO or LO. Symbol Definition Min Typ Max Units Test Conditions Over-Current Compensation VCS,TH ICD,OC VCD,oc DCMIN Dimming VCR+ VCRICR,RUN fCR Soft Start DCMIN VCR,SS VDIM,SS Enable VENATH VENAHYS Enable threshold Enable hysteresis 1.9 --2.2 200 2.5 --V mV N/A Minimum HO duty cycle End of soft start voltage Soft start disable threshold --0.88 --10% 0.96 4.8 --1.04 ----V VCR = 0 V, VDIM < VDIM,SS VDIM < VDIM,SS N/A CR pin upper threshold voltage CR pin lower threshold voltage Source current at CR pin in RUN mode Frequency at CR pin 4.8 --125 240 5.0 0.2 150 310 5.2 --175 370 V μA Hz N/A RMIN = 12 kΩ CR = 100 nF, RUN MODE, RMIN = 12 kΩ Current compensation threshold at CS pin Source current at CD pin when the IC is in current compensation mode Voltage on CD where duty cycle reaches minimum Minimum HO duty cycle 1.15 3.7 4.8 --1.21 4.5 5.0 10% 1.27 5.3 5.2 --V μA V --N/A VCS>VCS,TH, RMIN = 12 kΩ N/A VCD = 4.7 V, RUN MODE www.irf.com © 2009 International Rectifier 9 IRS2552D Functional Block Diagram IMIN 5V ICD ICR_IGN ICR_RUN 12 0.6V CS 1.21V MIN 5 5V IMAX IGNITION LOGIC OVER CURRENT CONTROL 5V BAND GAP REF MAX 6 CT 3 5V 0V S R1 Q SOFT START CONTROL VBG EN R2 Q DEAD TIME CONTROL DUTY CYCLE CONTROL DT 4 CD 10 SD 11 2V 5V PULSE FILTER & LATCH 16 LEVEL SHIFT VB HO VS 15 14 CR 9 DIM 7 Q Q S R UV BOOT STRAP DRIVE 1 5V UV OUTPUT LOGIC EN 15.6V VCC LO COM ENA 13 2 8 2.2V UVLO 0.2V www.irf.com © 2009 International Rectifier 10 IRS2552D Input/Output Pin Equivalent Circuit Diagrams: IRS2552D VB ESD Diode HO ESD Diode 25V VCC ESD Diode VS 600V VCC ESD Diode COM LO ESD Diode 25V CT ESD Diode RESD RESD COM VCC ESD Diode MIN, MAX ESD Diode RESD COM www.irf.com © 2009 International Rectifier 11 IRS2552D Lead Definitions Symbol VCC COM CT DT MIN MAX DIM ENA CR CD SD CS LO VS HO VB Description Logic and internal gate drive supply voltage IC power and signal ground Oscillator timing capacitor Independent dead time R and C RFMIN sets running frequency RFMAX sets ignition mode frequency 0 to 5 V DC burst mode dimming control input Chip Enable (2 V logic threshold) Burst dimming ramp Shutdown delay timing Open load detection Ignition detection (0.6 V threshold), over-current (1.2 V threshold) Low side output Half bridge High side output High side floating supply www.irf.com © 2009 International Rectifier 12 IRS2552D Lead Assignments 1 VCC 2 COM 3 CT 4 DT 5 MIN 6 MAX 7 DIM 8 ENA VB 16 HO 15 IRS2552D VS 14 LO 13 CS 12 SD 11 CD 10 CR 9 www.irf.com © 2009 International Rectifier 13 IRS2552D State Diagram† † All values are typical. Applies to application circuit on page 1. © 2009 International Rectifier www.irf.com 14 IRS2552D Application Information and Additional Details Information regarding the following topics is included as subsections within this section of the datasheet. • • • • • • • • • • • • IGBT/MOSFET Gate Drive Undervoltage Lockout Protection Oscillator Deadtime Ignition Run Mode Lamp Current Control Frequency, Current and Deadtime Calculation Dimming Function Soft Start PCB Layout Tips Additional Documentation IGBT/MOSFET Gate Drive The IRS2552D HVICs are designed to drive up to two MOSFET or IGBT power devices. Figures 1 and 2 illustrate several parameters associated with the gate drive functionality of the HVIC. The output current of the HVIC, used to drive the gate of the power switch, is defined as IO. The voltage that drives the gate of the external power switch is defined as VHO for the high-side power switch and VLO for the low-side power switch; this parameter is sometimes generically called VOUT and in this case does not differentiate between the high-side or low-side output voltage. VB (or VCC) IO+ HO (or LO) + VHO (or VLO) VS (or COM) - Figure 1: HVIC sourcing current Figure 2: HVIC sinking current Undervoltage Lock-Out The IRS2552D includes an under voltage lockout circuit such that it remains in micro-power mode until the voltage at VCC pin exceeds the VCCUV+ threshold. When VCC exceeds the VCCUV+ threshold the IRS2552D oscillator starts up and gate drive signals appear at the LO and HO outputs, provided the ENABLE pin is connected to a voltage source above VENATH. The LO output will always go high first in order to pre-charge the bootstrap capacitor before the IRS2552D begins normal operation. www.irf.com © 2009 International Rectifier 15 IRS2552D Oscillator During UVLO and shutdown and the voltage at the MIN and MAX pins remain at 0 V. When VCC is raised above VCCUV+ the oscillator will start and LO and HO will produce output drive waveforms at frequency FMAX. The MAX pin sources 5 V and the resistance connected from this point to COM determines the CT charging current and consequently the frequency. RMIN is always connected from the MIN pin to COM, which sets the RUN mode frequency. In IGNITION mode the MAX pin supplies 5 V to RMAX, which is connected to COM setting a higher CT charging current and consequently a higher ignition frequency, as RMAX is smaller than RMIN. In RUN mode the MAX pin is no longer active and the voltage will drop to 0V. CT charges until the voltage reaches the 5 V threshold and then it is discharged rapidly to VCT-. It then begins to charge again, repeating this sequence and producing a saw tooth waveform. The MIN pin sources 5 V during IGNITION and RUN modes. The current flowing through FMIN to COM determines the charging current of CT during RUN mode and also serves as a current reference for the currents supplied from the CD and CR pins. VCC VCCUV+ CT VCT+ VCT- DT 1/3*VCC LO HO Figure 3: Oscillator waveforms Deadtime In the IRS2552D the dead time is determined by an independent external timing circuit comprising of RDT and CDT and is not affected by the values of CT, RMIN or RMAX. The DT pin voltage is held at COM when LO or HO is high. CDT is charged through RDT, which is connected to VCC, when DT is internally disconnected from COM at the start of the dead time. The dead time ends when CDT has charged to 1/3 VCC. This allows the dead time to remain consistent over the working range of VCC, i.e. from UVLO+ to the clamp voltage of 15.6 V. Ignition During the IGNITION phase the CR capacitor is charged through an internal current source ICR_IGN. When CR reaches VCR+ then if the voltage at CS is greater than VCSIGN, the IRS2552D will enter RUN mode. If the voltage at the CS pin is less than VCSIGN the IRS2552D will enter FAULT mode whereby LO and HO will both go low and the IRS2552D will shut down until VCC is reduced below VCCUV- and then increased above VCCU+. The ignition function is achieved by applying a frequency somewhat above resonance to the output step up transformer and resonant load. This should develop sufficient voltage across the lamps to allow partial ignition and some arc current to flow. The combined lamp current is fed back to the CS pin through a suitable isolating network to determine whether the lamps have ignited successfully. If a successful ignition is detected after the voltage at CR has reached VCR+ then RMAX is disconnected inside the IRS2552D and the frequency will switch immediately to www.irf.com © 2009 International Rectifier 16 IRS2552D to FMIN, therefore applying maximum power to the lamps. At this point the burst mode dimming function will be enabled. Run Mode In RUN mode an additional current source ICR_RUN is also switched into the circuit. This causes CR to ramp up to VCR+ much more rapidly than before. The CR pin is used to provide ignition timing as well as the burst mode dimming low frequency ramp. If the output is open circuit a very large voltage develops at the output. This is fed back to the SD pin through some suitable isolated sensing network such that the voltage at the SD pin will exceed VSDTH during an overvoltage condition. At this stage the capacitor CD begins to charge through a current source. When VSD > VSDTH the burst mode dimming function is disabled and the output will be continuous. If the voltage at SD drops below VSDTH the capacitor CD will be discharged to 0V again. If SD remains above VSDTH long enough for the CD capacitor voltage to reach VCDMAX or about 5 V then the IRS2552D will shut down and go into fault mode. Lamp Current Control Additionally the half bridge current is monitored at the CS pin so that during running if too much power is supplied to the lamps the IRS2552D is able to compensate by reducing the oscillator duty cycle while maintaining the same run frequency. This prevents the lamps from being over driven preventing premature end of life. When VCS > VCSTH the CD capacitor will begin to charge and the CD pin voltage will rise. As this occurs the duty cycle will begin to adjust, i.e. the HO on time will become gradually shorter and the LO on time will become gradually longer. The dead time will remain constant at all times. In this way the power to the output will be reduced while the frequency remains at fMIN. As the CD voltage rises, the duty cycle will be further reduced. If VCS then drops below VCSTH then the duty cycle will be regulated at that point and thus the current will be maintained at this limit. If VCS remains above VCSTH then the voltage will continue to rise on CD until it reaches VCDMAX, at which point the duty cycle reaches its minimum limit DCMIN and the IRS2552D will enter FAULT mode, requiring VCC to fall below UVLO- and then rise above UVLO+ in order to re-start. Frequency, Current, and Dead Time Calculation The running frequency of the IRS2552D is given by the following formula: f MIN = 1 2.09 ⋅ CT ⋅ RMIN where VMIN = 5 V, i.e. When the ignition ramp is complete and RMAX has no further effect on the oscillator. The ignition frequency given by: f MAX = and the dead time is calculated by: 1 2.09 ⋅ CT ⋅ RMAX t DT = RDT ⋅ C DT ⋅ ln(1.5) t DT = 0.405 ⋅ RDT ⋅ C DT www.irf.com © 2009 International Rectifier 17 IRS2552D Maximum duty cycle DCMAX = 0.5 − (t DT * f ) The ICR charging current during ignition mode and the ICD charging current are given by: ICRIGN = ICD = 0.06 RMIN 0.06 RMIN The ICR charging current and frequency during run mode are given by: ICRRUN = f CR = 1.8 RMIN 0.36 RMIN ⋅ CCR Dimming Function The IRS2552D supports burst mode dimming, meaning that the output drive to the lamps is pulsed on and off at a low frequency and the burst duty cycle is adjusted to control the average current and therefore the light output of the lamps. The IRS2552D contains a low frequency oscillator that generates a ramp waveform at the CR pin from 0 V to 5 V. The ramp frequency is dependent on the value of the external CR capacitor. A DC dimming control voltage is fed into the DIM pin which is compared with the dimming ramp by means of an internal comparator, which generates the PWM signal that is used internally to switch the outputs on and off. Thus when the DIM voltage is at 5 V the outputs will be on all of the time and when it is at 0 V the outputs will be off all of the time. Alternatively a PWM dimming control signal from 0 V to 5 V can be fed directly into the DIM pin to allow external PWM control independent of the dimming ramp. During the off period the LO and HO outputs are both low. www.irf.com © 2009 International Rectifier 18 IRS2552D 5V DIM 1V 0.2V Soft Start Soft Start Soft Start CR LO HO Duty cycle increases from 10% to 50% Figure 4: Dimming waveform RUN MODE ICCRUN charges CR up to VCR+. CR oscillates at fCR (sawtooth) Half-bridge oscillates at FMIN. VDC reset to 0V SOFT START DC increases from DC min to DC max VDIM