IRU3027CW

Data Sheet No. PD94146 IRU3027 5-BIT PROGRAMMABLE SYNCHRONOUS BUCK CONTROLLER IC WITH TRIPLE LDO CONTROLLER FEATURES DESCRIPTION Designed to meet VRM 9.0 specification for next generation microprocessors On-Board 5-Bit DAC programs the output voltage from 1.075V to 1.850V in 25mV steps Linear Regulator Controller On-Board for 1.8V Provides single chip solution for Vcore, GTL+, AGP bus, and 1.8V Automatic Voltage Selection for AGP Slot VDDQ Supply Linear Regulator Controller On-Board for 1.5V GTL+ Supply Loss-less Short Circuit Protection for all Outputs Synchronous operation allows maximum efficiency Patented architecture allows fixed frequency operation as well as 100% duty cycle during dynamic load Minimum Part Count Soft-Start High current totem pole driver for direct driving of the external power MOSFET Power Good function monitors all outputs Over-Voltage Protection Circuitry protects the switcher output and generates a fault output The IRU3027 controller IC is specifically designed to meet VRM 9.0 specification for next generation microprocessor applications requiring multiple on-board regulators. The IRU3027 provides a single chip controller IC for the Vcore, three LDO controllers, one with an automatic select pin that connects to the Type Detect pin of the AGP slot for the AGP V DDQ supply, one for GTL+ and the other for the 1.8V chip set regulator as required for the next generation PC applications. The IRU3027 is designed to use either bipolar transistors for VOUT3(1.5V) and VOUT4(1.8V). No external resistor divider is necessary for any of the regulators. The switching regulator features a patented topology that in combination with a few external components as shown in the typical application circuit, will provide well in excess of 20A of output current for an on-board DC-DC converter while automatically providing the right output voltage via the 5-bit internal DAC. The IRU3027 also features loss-less current sensing for both switchers by using the RDS(ON) of the high side power MOSFET as the sensing resistor, an output under-voltage shutdown that detects short circuit condition for the linear outputs and latches the system off, and a Power Good window comparator that switches its open collector output low when any one of the outputs is outside of a pre-programmed window. APPLICATIONS Total power solution for next generation Intel processor application AMD K7 Low Cost Solution TYPICAL APPLICATION 5V 3.3V LINEAR CONTROL SWITCHER CONTROL VOUT1 VOUT 2 IRU3027 LINEAR CONTROL VOUT 3 LINEAR CONTROL VOUT4 Figure 1 - Typical application of IRU3027. PACKAGE ORDER INFORMATION TA (8C) 0 To 70 Rev. 1.5 07/17/02 DEVICE IRU3027CW www.irf.com PACKAGE 28-Pin Plastic SOIC WB 1 IRU3027 ABSOLUTE MAXIMUM RATINGS V5 Supply Voltage .................................................... V12 Supply Voltage .................................................. Storage Temperature Range ...................................... Operating Junction Temperature Range ..................... 7V 20V -65 To 150°C 0 To 125°C PACKAGE INFORMATION 28 PIN WIDE BODY PLASTIC SOIC (W) TOP VIEW Drive2 1 Fix 2 VID4 3 VID3 4 VID2 5 VID1 6 VID0 7 PGood 8 SD 9 V SEN2 10 Select 11 SS 12 Fault / Rt 13 V SEN4 14 28 V12 27 UGate 26 Phase 25 LGate 24 PGnd 23 OCSet 22 V SEN1 21 Fb 20 V5 19 V SEN3 18 Drive3 17 Gnd 16 NC 15 Drive4 uJA =808C/W ELECTRICAL SPECIFICATIONS Unless otherwise specified, these specifications apply over V12=12V, V5=5V and TA=0 to 70°C. Typical values refer to TA=25°C. Low duty cycle pulse testing is used which keeps junction and case temperatures equal to the ambient temperature. PARAMETER Supply UVLO Section UVLO Threshold-12V UVLO Hysteresis-12V UVLO Threshold-5V UVLO Hysteresis-5V Supply Current Operating Supply Current SYM TEST CONDITION Supply Ramping Up Supply Ramping Up MIN TYP 10 0.6 4.4 0.3 6 30 MAX UNITS V V V V mA V12 V5 Switching Controllers; Vcore (V SEN 1) and AGP (V SEN 2) VID Section (Vcore only) DAC Output Voltage (Note 1) DAC Output Line Regulation DAC Output Temp Variation VID Input LO VID Input HI VID Input Internal Pull-Up Resistor to V5 VSEN 2 Voltage Select 2V 0.99Vs Vs 0.1 0.5 1.01Vs 0.8 2 27 1.5 3.3 V % % V V KV V 2 www.irf.com Rev. 1.5 07/17/02 IRU3027 PARAMETER Error Comparator Section Input Bias Current Input Offset Voltage Delay to Outout Current Limit Section CS Threshold Set Current CS Comp Offset Voltage Hiccup Duty Cycle Output Drivers Section Rise Time Fall Time Dead Band Time Between High Side and Synch Drive (Vcore Switcher Only) Oscillator Section (Internal) Osc Frequency 1.8V Regulator (V SEN 4) VSEN Voltage VSEN Voltage Input Bias Current Output Drive Current 1.5V Regulator (V SEN 3) VSEN Voltage VSEN Voltage Input Bias Current Output Drive Current Power Good Section VSEN 1 UV Lower Trip Point VSEN 1 UV Upper Trip Point VSEN 1 UV Hysterises VSEN 1 HV Upper Trip Point VSEN 1 HV Lower Trip Point VSEN 1 HV Hysterises VSEN 2 Trip Point VSEN 3 Trip Point VSEN 4 Trip Point Power Good Output LO Power Good Output HI Fault (Overvoltage) Section Core OV Upper Trip Point Core OV Lower Trip Point Fault Output HI Soft-Start Section Pull-Up Resistor to 5V SYM TEST CONDITION MIN TYP MAX UNITS 2 +2 100 200 -5 Css=0.1m F CL=3000pF CL=3000pF CL=3000pF 10 70 70 200 +5 mA mV ns mA mV % ns ns ns -2 VDIFF=10mV Rt=Open VO4 TA=258C, Drive4=VSEN 4 217 1.800 1.800 2 50 KHz V V mA mA V V mA mA V V V V V V V V V V V V V V mA VO3 TA=258C, Drive3=VSEN 3 1.500 1.500 2 50 VSEN 1 Ramping Down VSEN 1 Ramping Up VSEN 1 Ramping Up VSEN 1 Ramping Down Select 2V Fix=Gnd Fix=Open Fix=Gnd Fix=Open RL=3mA RL=5K, Pull-Up to 5V VSEN 1 Ramping Up VSEN 1 Ramping Down Io=3mA OCSet=0V, Phase=5V 0.90Vs 0.92Vs 0.02Vs 1.10Vs 1.08Vs 0.02Vs 1.100 2.560 0.920 1.320 0.920 1.140 0.4 4.8 1.17Vs 1.15Vs 10 20 Note 1: Vs refers to the set point voltage given in Table 1. Rev. 1.5 07/17/02 www.irf.com 3 IRU3027 D4 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 D3 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 D2 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 D1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 D0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 Vs 1.075 1.100 1.125 1.150 1.175 1.200 1.225 1.250 1.275 1.300 1.325 1.350 1.375 1.400 1.425 1.450 D4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D3 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 D2 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 D1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 D0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 Vs 1.475 1.500 1.525 1.550 1.575 1.600 1.625 1.650 1.675 1.700 1.725 1.750 1.775 1.800 1.825 1.850 Table 1 - Set point voltage vs. VID codes. PIN DESCRIPTIONS PIN# 1 2 PIN SYMBOL Drive2 Fix PIN DESCRIPTION This pin controls the gate of an external MOSFET for the AGP linear regulator. Leaving this pin open provides fixed output voltages of the 1.5V and 1.8V for the #3 and #4 linear regulators. When this pin is grounded the reference to the linear regulators are set to 1.26V and therefore the output of the regulators can be programmed to any voltages above the 1.26V using: VOUT = 1.26 3 (1 + RTOP/RBOT) Where: RTOP=Top resistor connected from the output to the VSENSE pin RBOT=Bottom resistor connected from the VSENSE pin to ground. This pin selects a range of output voltages for the DAC. When in the LOW state the range is 1.3V to 2.05V and when it switches to HI state the range is 2V to 3.5V. This pin is TTL compatible that realizes a logic “1” as either HI or Open. When left open, this pin is pulled up internally by a 27K V resistor to 5V supply. MSB input to the DAC that programs the output voltage. This pin is TTL compatible that realizes a logic “1” as either HI or Open. When left open, this pin is pulled up internally by a 27K V resistor to 5V supply. Input to the DAC that programs the output voltage. This pin is TTL compatible that realizes a logic “1” as either HI or Open. When left open, this pin is pulled up internally by a 27K V resistor to 5V supply. Input to the DAC that programs the output voltage. This pin is TTL compatible that realizes a logic “1” as either HI or Open. When left open, this pin is pulled up internally by a 27K V resistor to 5V supply. LSB input to the DAC that programs the output voltage. This pin is TTL compatible that realizes a logic “1” as either HI or Open. When left open, this pin is pulled up internally by a 27K V resistor to 5V supply. This pin is an open collector output that switches LO when any of the outputs are outside of the specified under-voltage trip point. It also switches low when V SEN 1 pin is more than 10% above the DAC voltage setting. 3 VID4 4 VID3 5 VID2 6 VID1 7 VID0 8 PGood 4 www.irf.com Rev. 1.5 07/17/02 IRU3027 PIN# 9 PIN SYMBOL SD PIN DESCRIPTION This pin provides shutdown for all the regulators. A TTL compatible, logic level high applied to this pin disables all the outputs and discharges the soft-start capacitor. The SD signal turns off the synchronous allowing the body diode to conduct and discharge the output capacitor. This pin provides the feedback for the AGP linear regulator. The Select pin when connected to the "Type Detect" pin of the AGP slot automatically selects the right voltage for the AGP VDDQ. This pin provides automatic voltage selection for the AGP switching regulator. When it is pulled LO, the voltage is 1.5V and when left open or pulled to HI, the voltage is 3.3V. This pin provides the soft-start for all the regulators. An internal current source charges an external capacitor that is connected from this pin to ground which ramps up the outputs of the regulators, preventing the outputs from overshooting as well as limiting the input current. The second function of the Soft-Start cap is to provide long off time (HICCUP) for the synchronous MOSFET during current limiting. This pin has dual function. It acts as an output of the over-voltage protection circuitry or it can be used to program the frequency using an external resistor . When used as a fault detector, if any of the switcher outputs exceed the OVP trip point, the Fault pin switches to 12V and the soft-start cap is discharged. If the Fault pin is to be connected to any external circuitry, it needs to be buffered. This pin provides the feedback for the linear regulator that its output drive is Drive4. This pin controls the gate of an external MOSFET for the 1.8V chip set linear regulator. This pin has no connection. This pin serves as the ground pin and must be connected directly to the ground plane. This pin controls the gate of an external transistor for the 1.5V GTL+ linear regulator. This pin provides the feedback for the linear regulator that its output drive is Drive3. 5V supply voltage. A high frequency capacitor (0.1 to 1m F) must be placed close to this pin and connected from this pin to the ground plane for noise free operation. This pin provides the feedback for the synchronous switching regulator. Typically this pin can be connected directly to the output of the switching regulator. However, a resistor divider is recommended to be connected from this pin to VOUT1 and ground to adjust the output voltage for any drop in the output voltage that is caused by the trace resistance. The value of the resistor connected from VOUT1 to Fb1 must be less than 1000V. This pin is internally connected to the under-voltage and over-voltage comparators sensing the Vcore status. It must be connected directly to the Vcore supply. This pin is connected to the Drain of the power MOSFET of the Core supply and it provides the positive sensing for the internal current sensing circuitry. An external resistor programs the current sense threshold depending on the R of the power MOSFET. An DS external capacitor is placed in parallel with the programming resistor to provide high frequency noise filtering. This pin serves as the Power ground pin and must be connected directly to the ground plane close to the source of the synchronous MOSFET. A high frequency capacitor (typically 1m F) must be connected from V12 pin to this pin for noise free operation. Output driver for the synchronous power MOSFET for the Core supply. This pin is connected to the Source of the power MOSFET for the Core supply and it provides the negative sensing for the internal current sensing circuitry. Output driver for the high side power MOSFET for the Core supply. This pin is connected to the 12V supply and serves as the power Vcc pin for the output drivers. A high frequency capacitor (typically 1m F) must be placed close to this pin and PGnd pin and be connected directly from this pin to the ground plane for the noise free operation. 10 VSEN 2 11 12 Select SS 13 Fault / Rt 14 15 16 17 18 19 20 21 VSEN 4 Drive4 NC Gnd Drive3 VSEN 3 V5 Fb 22 23 VSEN 1 OCSet 24 PGnd 25 26 27 28 LGate Phase UGate V12 Rev. 1.5 07/17/02 www.irf.com 5 IRU3027 BLOCK DIAGRAM V12 V5 SD VSEN1 PGood VSEN3 VSEN4 28 20 9 22 8 19 14 1.1Vset Enable 21 1.17Vset Over Voltage Vset Enable V12 27 Fb UVLO UGate + Slope Comp PWM Control V12 25 LGate Phase OCSet PGnd Gnd Fault / Rt SS Osc 26 Fix 2 0.9Vset Enable Soft Start & Fault Logic Over Current 23 24 17 13 200uA Drive4 15 R 1.26V 3R Vset 7 1.5V 3.3V R 3R 3 6 12 Drive3 Select 18 11 VID0 VID1 VID2 VID3 VID4 5-Bit DAC 5 4 Drive2 VSEN2 1 10 Figure 2 - Simplified block diagram of the IRU3027. 6 www.irf.com Rev. 1.5 07/17/02 IRU3027 TYPICAL APPLICATION 12V C9 R2 C1 C19 V12 SD Fix Type Detect Select Phase R1 Q6 Vcc3 C22 Q10 C18 Drive2 NC LGate Q11 R14 PGnd V SEN1 V OUT 2 1.5V / 3.3V C25 V SEN2 R9 R17 C27 V5 OCSet UGate Q5 D1 C23 Q7 Q8 Q9 R8 R10 C24 C29 Vcore R4 C20 R3 L1 5V C15 C17 Q1 Q2 R5 Q3 Q4 L2 L3 C39 C43 C69 C77 U1 R15 Fb R18 VID0 IRU3027 Drive3 VID1 VID2 VSEN3 VID3 VID4 Vcc3 R19 PGOOD PGood C28 Q12 Drive4 V SEN4 Gnd Fault / Rt SS V OUT 4 1.8V C37 C38 Figure 3 - Typical application of IRU3027 for the AMD Slot A socket. Rev. 1.5 07/17/02 www.irf.com 7 IRU3027 IRU3027 APPLICATION PARTS LIST Dual Layout with HIP6019 Ref Desig Q1, 6 Q2, 3, 4 Q5, 11 Q7, 8, 9 Q10 Q12 D1 L1 L2, 3 C1 C9 C15 C16 C17, 18, 19, 21 C20 C22, 26 C23 C24, 27 C25, 37 C28, 38 C29 C39 C43 C69 C77 R1, 2, 3, 7, 16, 21 R4 R5, 9 R8 R10, 14 R11, 20 R12 R15 R17 R18 R19 Description Transistor MOSFET Transistor MOSFET MOSFET MOSFET Diode Inductor Inductor Capacitor, Ceramic Capacitor, Electrolytic Capacitor, Electrolytic Capacitor, Ceramic Capacitor, Ceramic Capacitor, Ceramic Capacitor, Electrolytic Capacitor, Ceramic Capacitor, Ceramic Capacitor, Electrolytic Capacitor, Ceramic Capacitor, Electrolytic Capacitor, Ceramic Capacitor, Ceramic Capacitor, Ceramic Capacitor, Ceramic Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Qty 2 3 2 3 1 1 1 1 2 8 6 1 1 4 1 2 1 2 2 2 8 4 26 8 8 6 1 4 1 2 2 1 1 1 1 1 Part # 2SD882, TO-226 package IRF3706S, TO-263 package 2SB772, TO-226 package IRL2203NS, TO-263 package IRLR3103S, TO-252 package IRLR024, TO-252 package MBR1535CT, TO-220 package L=1m H, 5052B core with 5 turns of triple 0.8mm wire L=1.8m H, 6018 core with 6 turns of triple 0.8mm wire 1m F, 0603 10MV1500GX, 1500m F, 10V 10MV1500GX, 1500m F, 10V 1m F, 0603 1m F, 0805 220pF, 0603 6MV1000GX, 1000m F, 6.3V 1000pF, 0805 1m F, 0603 6MV1500GX, 1500m F, 6.3V 0.1m F, 0603 6MV2200GX, 2200m F, 6.3V 4.7m F, 0805 1m F, 0603 0.01m F, 0603 39pF, 0603 10V, 5%, 0603 2K V, 5%, 0603 1V, 5%, 0805 4.7V, 5%, 0805 3.3K V, 1%, 0603 0V, 0603 47K V, 5%, 0603 2.2K V, 1%, 0603 1V, 0603 100K V, 1%, 0603 10K V, 5%, 0603 Manuf Fairchild IR Fairchild IR IR IR IR Micro Metal Micro Metal Sanyo Sanyo Sanyo Sanyo Sanyo IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information Data and specifications subject to change without notice. 02/01 8 www.irf.com Rev. 1.5 07/17/02 IRU3027 (W) SOIC Package 28-Pin Surface Mount, Wide Body H A B C R E DETAIL-A PIN NO. 1 D 0.516 0.020 x 458 L DETAIL-A K F T I G J SYMBOL A B C D E F G I J K L R T 28-PIN MIN MAX 17.73 17.93 1.27 BSC 0.66 REF 0.36 0.46 7.40 7.60 2.44 2.64 0.10 0.30 0.23 0.32 10.11 10.51 08 88 0.51 1.01 0.63 0.89 2.44 2.64 NOTE: ALL MEASUREMENTS ARE IN MILLIMETERS. Rev. 1.5 07/17/02 www.irf.com 9 IRU3027 PACKAGE SHIPMENT METHOD PKG DESIG W PACKAGE DESCRIPTION SOIC, Wide Body PIN COUNT 28 PARTS PER TUBE 27 PARTS PER REEL 1000 T&R Orientation Fig A 1 1 1 Feed Direction Figure A IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information Data and specifications subject to change without notice. 02/01 10 www.irf.com Rev. 1.5 07/17/02