IS31AP2036
HIGH EFFICIENCY, CLASS-K AUDIO POWER AMPLIFIER
WITH INTEGRATED CHARGE PUMP CONVERTER
July 2021
GENERAL DESCRIPTION
FEATURES
The IS31AP2036 is a Class-K audio power amplifier with
high efficiency and automatic gain control. It drives up to
2.0W (10% THD+N) into an 8Ω speaker from a 4.2V VCC
supply.
The IS31AP2036 integrates advanced high efficiency
charge pump and whole power amplifier efficiency can
be up to 75%. The output power will be maintained in
0.8W, 1.0W and 1.2W.
The IS31AP2036 provides low cost, space saving
solution for portable equipments which need audio
output with higher power by boosting up supply voltage.
Its external components just include a few capacitors
and resistors (no inductor).
The IS31AP2036 use fully differential design to reduce
RF noise. The IS31AP2036 integrates de-pop circuitry to
reduce pop and click noise during power on/off or
shutdown enable operation. The IS31AP2036 also
integrates thermal and short circuit protection function.
IS31AP2036 is available in FCQFN-16 (2mm × 2mm)
package. It operates from 3.0V to 5.0V over the
temperature range of -40°C to +85°C.
Operates from 3.0V to 5.0V
Ultra low output noise floor
Low EMI
-72dB (217Hz) high PSRR
0.05% low THD+N
AGC function
Pulse Count Control serial interface
Output power in 0.8W, 1W and 1.2W levels
Thermal and short-circuit protection
Integrated Click-and-Pop suppression circuitry
Available in FCQFN-16 (2mm × 2mm) package
APPLICATIONS
Smart phones
Cellular phones
PDAs
GPS
Portable electronics
TYPICAL APPLICATION CIRCUIT
VBattery
4.7 F
A3,B3
VCC
PVCC
0.1 F
4.7 F
C1N
A4
Mode Control
C1P
SDB
C2N
IS31AP2036
100k
C2P
OUT
CIN
15nF
Differential
Input
RIN
3k
220pF
CIN
15nF
D3
A1
A2
IN+
IN-
OUT
GND
C1
D2
2.2 F
B1,B2
D1
2.2 F
B4
D4
C2~C4
1nF
1nF
RIN
3k
Figure 1
Lumissil Microsystems – www.lumissil.com
Rev. E, 07/13/2021
Typical Application Circuit (Differential Input)
1
IS31AP2036
VBattery
A3,B3
4.7 F
VCC
PVCC
0.1 F
4.7 F
C1N
A4
Mode Control
C1P
SDB
C2N
IS31AP2036
100k
C2P
OUT
Single-ended
Input
CIN
15nF
RIN
3k
A1
220pF
CIN
15nF
D3
A2
IN+
IN-
OUT
GND
C1
D2
2.2 F
B1,B2
D1
2.2 F
B4
D4
C2~C4
1nF
1nF
RIN
3k
Figure 2
Typical Application Circuit (Single-ended Input)
Lumissil Microsystems – www.lumissil.com
Rev. E, 07/13/2021
2
IS31AP2036
PIN CONFIGURATION
Package
Pin Configuration (Top View)
FCQFN-16
IN+
C2N
C1N
C2P
A1
B1
C1
D1
IN-
C2N
GND
C1P
A2
B2
C2
D2
VCC
VCC
GND
PVCC
A3
B3
C3
D3
SDB
OUT+
GND
OUT-
A4
B4
C4
D4
PIN DESCRIPTION
No.
Pin
Description
A1
IN+
Positive audio input.
A2
IN-
Negative audio input.
A3, B3
VCC
Power supply.
A4
SDB
Shutdown pin. Active low.
B1, B2
C2N
Negative input for external flying cap 2.
B4
OUT+
Positive audio output.
C1
C1N
Negative input for external flying cap 1.
C2~C4
GND
Ground.
D1
C2P
Positive input for external flying cap 2.
D2
C1P
Positive input for external flying cap 1.
D3
PVCC
Charge pump output voltage.
D4
OUT-
Negative audio output.
Lumissil Microsystems – www.lumissil.com
Rev. E, 07/13/2021
3
IS31AP2036
ORDERING INFORMATION
Industrial Range: -40°C to +85°C
Order Part No.
Package
QTY/Reel
IS31AP2036-CLS2-TR
FCQFN-16, Lead-free
3000
Copyright © 2021 Lumissil Microsystems. All rights reserved. Lumissil Microsystems reserves the right to make changes to this specification and its
products at any time without notice. Lumissil Microsystems assumes no liability arising out of the application or use of any information, products or
services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and
before placing orders for products.
Lumissil Microsystems does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can
reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in
such applications unless Lumissil Microsystems receives written assurance to its satisfaction, that:
a.) the risk of injury or damage has been minimized;
b.) the user assume all such risks; and
c.) potential liability of Lumissil Microsystems is adequately protected under the circumstances
Lumissil Microsystems – www.lumissil.com
Rev. E, 07/13/2021
4
IS31AP2036
ABSOLUTE MAXIMUM RATINGS
Supply voltage, VCC
Voltage at IN+ and IN- pins
Maximum junction temperature, TJMAX
Storage temperature range, TSTG
Operating temperature range, TA
Thermal resistance, junction to ambient, θJA
ESD (HBM)
ESD (CDM)
-0.3V ~ +6.0V
-0.3V ~ VCC+0.3V
+125°C
-65°C ~ +150°C
-40°C ~ +85°C
69°C/W
±8kV
±1kV
Note: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other condition beyond those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
DC CHARACTERISTICS
TA = 25°C, VCC = 3.0V ~ 5.0V, unless otherwise noted. Typical value are TA = 25°C, VCC = 3.6V.
Symbol
Parameter
Condition
Min.
Typ.
3.0
Max. Unit
VCC
Supply voltage
ICC
Quiescent current
VCC = 3.6V, no load, no input
ISD
Shutdown current
VCC = 3.6V, VSDB = 0V
fOSC
Clock frequency
VCC = 3.0V ~ 5.0V
650
kHz
AV
Output gain
RIN = 3kΩ
16.3
V/V
tON
Turn on time
40
ms
13
mA
1
-50
0
V
50
µA
|VOS|
Output offset voltage
RINT
Internal input resistor
VIH
Input logic high voltage
1.3
VCC
V
VIL
Input logic low voltage
0
0.35
V
TAGC
VCC = 3.0V ~ 5.0V, no input
5.0
16.5
mV
kΩ
Thermal AGC threshold temperature (Note 1)
150
°C
TAGC_HYS Thermal AGC hysteresis temperature (Note 1)
20
°C
(Note 1)
160
°C
(Note 1)
30
°C
1.5VCC
V
5.8
V
1.05
MHz
TOTP
Over temperature protection
TTOP_HYS Hysteresis temperature
Charge Pump
PVCC
Charge pump output voltage
VCC = 3.0V~3.8V
VCC >3.8V
fCP
Charge pump frequency
tST
Soft start time
COUT = 4.7µF, no load
0.5
ms
IL
PVCC short to GND limit current
(Note 1)
350
mA
Lumissil Microsystems – www.lumissil.com
Rev. E, 07/13/2021
5
IS31AP2036
AC CHARACTERISTICS (NOTE 1)
TA = 25°C, VCC = 3.6V, unless otherwise noted.
Symbol
Po
PNCN
Parameter
Output power, Mode 4
NCN output power
Condition
Min.
THD+N = 10%, f = 1kHz,
RL = 8Ω+33µH
VCC = 3.6V
1.35
VCC = 4.2V
2.0
THD+N = 1%, f = 1kHz,
RL = 8Ω+33µH
VCC = 3.6V
1.1
VCC = 4.2V
1.55
THD+N = 10%, f = 1kHz,
RL = 4Ω+33µH
VCC = 3.6V
1.8
VCC = 4.2V
2.45
THD+N = 1%, f = 1kHz,
RL = 4Ω+33µH
VCC = 3.6V
1.55
VCC = 4.2V
2.1
Mode 1
1.2
VCC = 4.2V, RL =8Ω+33µH Mode 2
1.0
Mode 3
0.8
VCC = 4.2V, PO = 1W, RL = 8Ω+33µH
Total harmonic distortion f = 1kHz, Mode 1
THD+N
plus noise (Note 1)
VCC = 4.2V, PO = 1.2W, RL = 8Ω+33µH
f = 1kHz, Mode 4
tWU
Wake-up time from
shutdown
η
Efficiency (Note 1)
Output Noise
VNO
PSRR
Power supply rejection
ratio (Note 1)
Typ.
Max.
Unit
W
W
0.1
%
0.05
40
ms
VCC = 4.2V, PO = 1.2W, RL = 8Ω
75
%
VCC = 3.6V, RL = 8Ω
102
µV
VCC = 4.2V, VP-P = 200mV, RL = 8Ω, f =
217Hz
-72
VCC = 4.2V, VP-P = 200mV, RL = 8Ω, f =
1kHz
-72
dB
NCN
tAT
Attack time
(Note 1)
40
ms
tRL
Release time
(Note 1)
1.5
s
Max attenuation gain
(Note 1)
-13.5
dB
Amax
Pulse Count Control
tL
Mode control low time
VCC = 3.0V ~ 5.0V
0.75
2
10
μs
tH
Mode control high time
VCC = 3.0V ~ 5.0V
0.75
2
10
μs
tLAT
Mode latch up time
VCC = 3.0V ~ 5.0V (Note 1)
220
500
μs
tOFF
Shutdown time
VCC = 3.0V ~ 5.0V
220
500
μs
Note 1: Guaranteed by design.
Lumissil Microsystems – www.lumissil.com
Rev. E, 07/13/2021
6
IS31AP2036
TYPICAL PERFORMANCE CHARACTERISTICS
20
20
5
THD+N(%)
THD+N(%)
5
VCC = 4.2V
Mode 1
RL = 8Ω+33µH
Po = 1.2W
1
VCC = 4.2V
Mode 2
RL = 8Ω+33µH
Po = 1W
1
0.1
0.1
0.01
20
50
100
200
500
2k
1k
5k
0.01
20
20k
50
200
100
THD+N vs. Frequency
Figure 4
20
VCC = 4.2V
Mode 3
RL = 8Ω+33µH
Po = 0.8W
10
THD+N vs. Frequency
Mode 4
RL = 8Ω+33µH
f = 1kHz
VCC = 3.6V
1
0.1
1
VCC = 4.2V
0.1
.
0.01
20
50
100
200
500
2k
1k
5k
0.01
10m
20k
20m
50m
Frequency(Hz)
THD+N vs. Frequency
Figure 6
2
1
1
Output Power (W)
Output Power (W)
Figure 5
700m
500m
300m
Mode 1
VCC = 4.2V
RL = 8Ω+33µH
PO = 1.2W
100m
100m
200m
500m
700m
Output Power vs. VP
Lumissil Microsystems – www.lumissil.com
Rev. E, 07/13/2021
500m
1
2
3
1
2
THD+N vs. Output Power
500m
300m
Mode 2
VCC = 4.2V
RL = 8Ω+33µH
PO = 1W
100m
100m
200m
VP (Vrms)
Figure 7
200m
700m
200m
300m
100m
Output Power(W)
2
200m
20k
5k
20
THD+N(%)
THD+N(%)
5
2k
1k
Frequency(Hz)
Frequency(Hz)
Figure 3
500
300m
500m
700m
1
2
VP (Vrms)
Figure 8
Output Power vs. VP
7
IS31AP2036
2
100
RL = 8Ω+33μH
700m
500m
300m
200m
VCC = 3.3V
80
1
Efficiency(%）
Output Power (W)
90
70
VCC = 3.6V VCC = 4.2V
60
50
40
30
Mode 3
VCC = 4.2V
RL = 8Ω+33µH
PO = 0.8W
100m
100m
20
10
200m
300m
500m
700m
1
0
2
0
0.2
0.4
0.6
Figure 10
Output Power vs. VP
PSRR(dB)
PSRR(dB)
1.6
1.8
2
Efficiency vs. Output Power
-20
-20
-40
VCC = 3.6V
-60
VCC = 4.2V
-40
-60
VCC = 3.6V
VCC = 4.2V
-80
-80
50
100
200
500
1k
2k
5k
10k
-100
20
20k
50
100
200
Figure 11
500
1k
2k
5k
10k
20k
5k
10k
20k
Frequency(H z)
Frequency(H z)
Figure 12
PSRR vs. Frequency
PSRR vs. Frequency
+0
+0
Mode 4
RL = 8Ω+33μH
Mode 3
RL = 8Ω+33μH
-20
PSRR(dB)
-20
PSRR(dB)
1.4
Mode 2
RL = 8Ω+33μH
Mode 1
RL = 8Ω+33μH
-40
VCC = 3.6V
-60
VCC = 4.2V
-40
VCC = 3.6V
-60
VCC = 4.2V
-80
-80
-100
20
1.2
+0
+0
-100
20
1
Output Power(W)
VP (Vrms)
Figure 9
0.8
50
100
200
500
1k
2k
5k
10k
20k
-100
20
50
100
200
PSRR vs. Frequency
Lumissil Microsystems – www.lumissil.com
Rev. E, 07/13/2021
1k
2k
Frequency(Hz)
Frequency(Hz)
Figure 13
500
Figure 14
PSRR vs. Frequency
8
IS31AP2036
VCC
2V/Div
VCC
1V/Div
VOUT+ - VOUT2V/Div
VOUT+ - VOUT2V/Div
Time (200ms/Div)
Time (10ms/Div)
Figure 15
Release Time
Figure 16
Attack Time
SDB
2V/Div
SDB
2V/Div
VOUT
2V/Div
VOUT
2V/Div
Time (8ms/Div)
Time (100µs/Div)
Figure 17
Turn On
Figure 18
25
CIN = 1µF
RL = 8Ω+33µH
RL =8Ω+33µH
f =1kHz
Output Voltage(V)
20
Gain (V)
Turn Off
200u
15
10
150u
VCC = 4.2V
120u
100u
90u
VCC = 3.6V
80u
70u
5
50
100
200
500
1k
2k
5k
Frequency(Hz)
Figure 19
Gain vs. Frequency
Lumissil Microsystems – www.lumissil.com
Rev. E, 07/13/2021
20k
60u
20
50
100
200
500
1k
2k
5k
10k 20k
Frequency(H z)
Figure 20
Noise
9
IS31AP2036
FUNCTIONAL BLOCK DIAGRAM
Lumissil Microsystems – www.lumissil.com
Rev. E, 07/13/2021
10
IS31AP2036
APPLICATION INFORMATION
The IS31AP2036 is a Class-K audio power amplifier
with high efficiency and automatic gain control. It
drives up to 2.0W (10% THD+N) into an 8Ω speaker
from a 4.2V VCC supply.
The IS31AP2036 integrates advanced high efficiency
charge pump and whole power amplifier efficiency can
be up to 75%. The output power will be maintained in
0.8W, 1.0W and 1.2W.
The IS31AP2036 provides low cost, space saving
solution for portable equipments which need audio
output with higher power by boosting up supply voltage.
Its external components just include a few capacitors
and resistors (no inductor).
CONSTANT OUTPUT POWER
The output power will fall down by the drop of supply
voltage and decrease audio volume. IS31AP2036
provides advanced AGC function to maintain the
output power stable within 3.3V~4.35V supply voltage.
Even voltage of battery falls down in mobile application;
IS31AP2036 can still provide high-quality audio. There
are four operation modes for IS31AP2036 and three of
these have AGC function with output power as 1.2W,
1W and 0.8W.
AGC Function
This is the function to control the output in order to
obtain a maximum output level without distortion when
an excessive input is applied which would otherwise
cause clipping at the differential signal output. That is,
with the traditional AGC function, lowers the gain of the
digital amplifier to an appropriate value so as not to
cause clipping at the differential signal output (Figure
21).
VCC
Traditional AGC, VCC falls down, output signal has no
distortion, but output power decreases
Figure 22
Traditional AGC Function
Constant
output power
VCC
Advanced AGC, output signal has no distortion,
output power keeps constant
Figure 23
IS31AP2036 Advanced AGC Function
Attack and Release Time
The attack time is a time interval that gains falls down
with a big signal input enough. And the release time is
a time from target attenuation to no AGC attenuation.
Attack Time
Figure 24
Release Time
Attack and Release Time
K-CHARGEPUMP
VCC
No AGC, output has distortion
AGC, output has no distortion
VCC
IS31AP2036 adopts advanced K-CHARGEPUMP
techniques, which increases high efficiency and drive
power with 750kHz operation frequency and integrates
soft-start, over current and over voltage control circuit
to guarantee stable operation.
Soft-Start
No AGC, VCC falls down, output has distortion
Figure 21
AGC, output has no distortion
AGC Function
IS31AP2036 adopts advanced AGC function which
maintains constant output power without signal
distortion when the supply voltage falling down (Figure
22, 23).
Lumissil Microsystems – www.lumissil.com
Rev. E, 07/13/2021
To limit inrush current in charge pump start procedure,
the K-CHARGEPUMP adopts soft-start function. The
soft-start time is 0.7ms and limits the supply current
within 350mA.
Over Voltage Protection
K-CHARGEPUMP output voltage, PVCC is VCC of 1.5
times to provide high voltage for internal power
amplifier. K-CHARGEPUMP integrates over voltage
protection function. PVCC is not times VCC when supply
voltage is over 3.8V. The OVP circuit will keep PVCC in
5.8V (Typ.).
11
IS31AP2036
PULSE COUNT CONTROL
INPUT RESISTORS (RIN)
The operating mode and gain are controlled by Pulse
Count Control (PCC wire) serial interface. The
interface records rising edges of the SDB pin and
decodes them into 4 operating modes as below figure.
The total input resistors (RIN_T) set the gain of the
amplifier according to Equation (1). RIN_T =
RIN+16.5kΩ.
If the SDB pin is pulled to high, receiving one rising
edge, the IC starts up and operates in Mode 1. If the
SDB pin receives two rising edges, the IC operates in
Mode 2. If the SDB pin receives three rising edges, the
IC operates in Mode 3. If the SDB pin receives four
rising edges, the IC operates in Mode 4. IS31AP2036
only has 4 operation modes, the number of rising edge
is not allowed over 4.
Table 1 Mode Control (VCC=4.2V, RL = 8Ω)
Mode
Gain
Power
AGC
Mode 1
16.4
1.2W
Yes
Mode 2
16.4
1.0W
Yes
Mode 3
16.4
0.8W
Yes
Mode 4
16.4
1.55W@THD=1%
No
Mode 1
SDB
Gain
320k V
RIN _ T V
(1)
For example, in Figure 1,
RIN_T = 3kΩ+16.5kΩ=19.5kΩ,
So,
Gain
320k
V
16 .4
19 .5k
V
Resistor matching is very important in fully differential
amplifiers. The balance of the output on the reference
voltage depends on matched ratios of the resistors.
CMRR, PSRR, and cancellation of the second
harmonic distortion diminish if resistor mismatch
occurs. Therefore, it is recommended to use 1%
accuracy resistors or better to keep the performance
optimized. Matching is more important than overall
accuracy.
Place the input resistors close to the IS31AP2036 to
reduce noise injection on the high-impedance nodes.
INPUT CAPACITORS (CIN)
Mode 2
SDB
The input capacitors (CIN) and total input resistor (RIN_T)
form a high-pass filter with the corner frequency, fC,
determined in Equation (2). RIN_T = RIN+16.5kΩ.
Mode 3
1
f
c 2R
IN _ T C IN
SDB
(2)
Mode 4
For example, in Figure 1,
SDB
tHI
tLO
tOFF
CIN = 15nF, RIN_T = 3kΩ+16.5kΩ=19.5kΩ,
Shutdown
So,
SDB
Figure 25
Operating Mode Control
tHI and tLO are from 0.75μs to 10μs and 2μs is
recommended.
It should pull down the SDB pin low over tOFF
(recommended 1ms) to shut down the IC and send
pulse again to switch modes.
SDB
Figure 26
Mode Switch
1
544 Hz
f
c 2 19 .5k 15 nF
The capacitors should have a tolerance of 10% or
better, because any mismatch in capacitance causes
an impedance mismatch at the corner frequency and
below.
CLASS-D AMPLIFIER WITHOUT FLITER
Traditional Class-D amplifier output antiphase square
waves in idle state. The antiphase waves in speaker
load will generate switch current dissipation. To
resume analog audio signal, add LC filter on output is
necessary. But it will increase cost, PCB area and
power dissipation and decrease THD+N capability.
IS31AP2036 adopts no filter Class-D frame without
output LC filter. Two outputs (OUT+, OUT-) are
inphase square waves in idle state. It won’t generate
switch current on speaker load. When load input signal,
output duty cycle will change which OUT+ is bigger
Lumissil Microsystems – www.lumissil.com
Rev. E, 07/13/2021
12
IS31AP2036
Pop-and-Click is the noise which happens with
amplifier start and shutdown. IS31AP2036 integrates
Pop-and-Click suppression circuitry to decrease noise
effectively.
output gain. Thus, power dissipation will be decreased
and junction temperature stops rising. When the
junction temperature falls down to the operating
temperature (130°C), automatic control circuit will
resume output gain. If the junction temperature
continues rising to the OVP threshold (160°C), IC will
shut down untill junction temperature comes back to
130°C.
THERMAL AGC
OVER CURRENT PROTECTION
IS31AP2036 adopts Thermal AGC techniques which
adjust output gain automatically by IC junction
temperature to decrease power dissipation. When the
junction temperature is over threshold value (150°C),
the IC will start up automatic control circuit to decrease
IS31AP2036 integrates over current protection
function. IC will shut down when over current is
detected to prevent IC damage. As clean up
short-circuit, IC will resume operation without restart.
and OUT- is smaller. Then differential signal will be on
speaker.
POP-AND-CLICK SUPPRESSION
Lumissil Microsystems – www.lumissil.com
Rev. E, 07/13/2021
13
IS31AP2036
CLASSIFICATION REFLOW PROFILES
Profile Feature
Pb-Free Assembly
Preheat & Soak
Temperature min (Tsmin)
Temperature max (Tsmax)
Time (Tsmin to Tsmax) (ts)
150°C
200°C
60-120 seconds
Average ramp-up rate (Tsmax to Tp)
3°C/second max.
Liquidous temperature (TL)
Time at liquidous (tL)
217°C
60-150 seconds
Peak package body temperature (Tp)*
Max 260°C
Time (tp)** within 5°C of the specified
classification temperature (Tc)
Max 30 seconds
Average ramp-down rate (Tp to Tsmax)
6°C/second max.
Time 25°C to peak temperature
8 minutes max.
Figure 27
Classification Profile
Lumissil Microsystems – www.lumissil.com
Rev. E, 07/13/2021
14
IS31AP2036
PACKAGE INFORMATION
FCQFN-16
Lumissil Microsystems – www.lumissil.com
Rev. E, 07/13/2021
15
IS31AP2036
RECOMMENDED LAND PATTERN
Note:
1. Land pattern complies to IPC-7351.
2. All dimensions in MM.
3. This document (including dimensions, notes & specs) is a recommendation based on typical circuit board manufacturing parameters. Since
land pattern design depends on many factors unknown (eg. user’s board manufacturing specs), user must determine suitability for use.
Lumissil Microsystems – www.lumissil.com
Rev. E, 07/13/2021
16
IS31AP2036
REVISION HISTORY
Revision
Detail Information
Date
A
Initial release
2015.04.23
B
1. Revise tOFF and tLAT value in EC table
2. Add land pattern
3. Add revision history
2015.06.10
C
Update POD
2015.08.13
D
Update EC parameters
2016.02.03
E
Add “End of Life” watermark
2021.07.13
Lumissil Microsystems – www.lumissil.com
Rev. E, 07/13/2021
17
工商网监
湘ICP备2023018690号
