IS31FL3236
36 CHANNELS LED DRIVER
September 2016
GENERAL DESCRIPTION
IS31FL3236 is comprised of 36 constant current
channels each with independent PWM control,
designed for driving LEDs. The output current of each
channel can be set at up to 38mA (Max.) by an external
resistor and independently scaled by a factor of 1, 1/2,
1/3 and 1/4. The average LED current of each channel
can be changed in 256 steps by changing the PWM
duty cycle through an I2C interface.
The chip can be turned off by pulling the SDB pin low or
by using the software shutdown feature to reduce
power consumption.
IS31FL3236 is available in QFN-44 (5mm × 5mm) and
eTQFP-48 package. It operates from 2.7V to 5.5V over
the temperature range of -40°C to +85°C.
FEATURES
2.7V to 5.5V supply
I2C interface, automatic address increment
function
Internal reset register
Modulate LED brightness with 256 steps PWM
Each channel can be controlled independently
Each channel can be scaled independently by 1,
1/2, 1/3 and 1/4
-40°C to +85°C temperature range
QFN-44 (5mm × 5mm) and eTQFP-48 package
APPLICATIONS
Mobile phones and other hand-held devices for
LED display
LED in home appliances
TYPICAL APPLICATION CIRCUIT
Figure 1 Typical Application Circuit
Note 1: The maximum global output current is set up to 23mA when REXT = 3.3kΩ. The maximum global output current can be set by external
resistor, REXT. Please refer to the detail information in Page 11.
Note 2: The IC should be placed far away from the mobile antenna in order to prevent the EMI.
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Rev. F, 09/29/2016
1
IS31FL3236
PIN CONFIGURATION
Package
Pin Configuration (Top View)
QFN-44
OUT3 1
36 OUT34
OUT5 3
34 OUT32
OUT4 2
GND 4
eTQFP-48
OUT6 5
OUT7 6
OUT8 7
OUT9 8
OUT10 9
OUT11 10
OUT12 11
OUT13 12
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Rev. F, 09/29/2016
35 OUT33
33 GND
32 OUT31
31 OUT30
30 OUT29
29 OUT28
28 OUT27
27 OUT26
26 OUT25
25 OUT24
2
IS31FL3236
PIN DESCRIPTION
No.
QFN
eTQFP
1~3
1~3
17,39
4,18,19,
33,42,43
4~16
Pin
Description
OUT3 ~ OUT5
Output channel 3~5 for LEDs.
5~17
OUT6 ~ OUT18
Output channel 6~18 for LEDs.
18~30
20~32
OUT19 ~ OUT31
Output channel 19~31 for LEDs.
36
39
SDB
38
41
31~35
37
34~38
40
GND
OUT32 ~ OUT36
AD
VCC
40
44
R_EXT
41
45
SDA
43,44
47,48
OUT1, OUT2
42
46
SCL
Thermal Pad
Ground.
Output channel 32~36 for LEDs.
Shutdown the chip when pulled low.
I2C address setting.
Power supply.
Input terminal used to connect an external
resistor. This regulates the global output
current.
I2C serial data.
I2C serial clock.
Output channel 1, 2 for LEDs.
Connect to GND.
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3
IS31FL3236
ORDERING INFORMATION
Industrial Range: -40°C to +85°C
Order Part No.
Package
QTY
IS31FL3236-TQLS2
eTQFP-48, Lead-free
250/Tray
IS31FL3236-QFLS2-TR
QFN-44, Lead-free
2500/Reel
Copyright © 2016 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any
time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are
advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the
product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not
authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:
a.) the risk of injury or damage has been minimized;
b.) the user assume all such risks; and
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances
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Rev. F, 09/29/2016
4
IS31FL3236
ABSOLUTE MAXIMUM RATINGS
Supply voltage, VCC
Voltage at SCL, SDA, SDB, OUT1 to OUT36
Maximum junction temperature, TJMAX
Storage temperature range, TSTG
Operating temperature range, TA
Package thermal resistance (Mounted on JEDEC standard 4
layer(2s2p) PCB test board), RθJA
ESD (HBM)
ESD (CDM)
-0.3V ~ +6.0V
-0.3V ~ VCC+0.3V
150°C
-65°C ~ +150°C
−40°C ~ +85°C
32.65°C/W (QFN)
38.72°C/W (eTQFP)
±8kV
±1kV
Note:
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other condition beyond those indicated in the operational sections of the specifications is not
implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
Typical values are TA = 25°C, VCC = 3.6V.
Symbol
Parameter
VCC
Supply voltage
IOUT
Output current
ISD
Shutdown current
IMAX
ICC
IOZ
VEXT
Maximum global output current
Condition
VCC = 4.2V, VOUT = 0.8V
REXT = 2kΩ, SL = “00” (Note 1)
Output voltage of R-EXT pin
2.7
VOUT = 0.6V
REXT = 3.3kΩ, SL = “00”
Quiescent power supply current REXT = 3.3kΩ
Output leakage current
Min.
VSDB = 0V or software shutdown
TA = 25°C, VCC = 3.6V
VSDB = 0V or software shutdown,
VOUT = 5.5V
Logic “0” input voltage
IIL
Logic “0” input current
VIH
IIH
VCC = 2.7V
Logic “1” input voltage
VCC = 5.5V
Logic “1” input current
VINPUT = VCC
VINPUT = 0V
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Rev. F, 09/29/2016
38
Max.
5.5
23
2
9
3
1.3
Logic Electrical Characteristics (SDA, SCL, SDB)
VIL
Typ.
1.4
5
(Note 2)
5
(Note 2)
Unit
V
mA
mA
5
mA
μA
0.2
μA
0.4
V
V
V
nA
nA
5
IS31FL3236
DIGITAL INPUT SWITCHING CHARACTERISTICS (NOTE 2)
Symbol
fSCL
tBUF
tHD, STA
Parameter
Serial-Clock frequency
Bus free time between a STOP and a START
condition
Hold time (repeated) START condition
tSU, STA
Repeated START condition setup time
tHD, DAT
Data hold time
tSU, STO
tSU, DAT
tLOW
tHIGH
tR
tF
Condition
Min.
400
kHz
μs
0.6
μs
μs
0.6
100
SCL clock high period
0.7
SCL clock low period
Unit
1.3
Data setup time
Fall time of both SDA and SCL signals,
receiving
Max.
0.6
STOP condition setup time
Rise time of both SDA and SCL signals,
receiving
Typ.
0.9
1.3
μs
μs
ns
μs
μs
(Note 3)
20+0.1Cb
300
ns
(Note 3)
20+0.1Cb
300
ns
Note 1: The recommended minimum value of REXT is 2kΩ, or it may cause a large current.
Note 2: Guaranteed by design.
Note 3: Cb = total capacitance of one bus line in pF. ISINK ≤ 6mA. tR and tF measured between 0.3 × VCC and 0.7 × VCC.
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IS31FL3236
DETAILED DESCRIPTION
I2C INTERFACE
The IS31FL3236 uses a serial bus, which conforms to
the I2C protocol, to control the chip’s functions with two
wires: SCL and SDA. The IS31FL3236 has a 7-bit slave
address (A7:A1), followed by the R/W bit, A0. Since
IS31FL3236 only supports write operations, A0 must
always be “0”. The value of bits A1 and A2 are decided
by the connection of the AD pin.
The complete slave address is:
Table 1
Slave Address (Write only):
Bit
Value
A7:A3
01111
A2:A1
AD
AD connected to GND, AD = 00;
AD connected to VCC, AD = 11;
AD connected to SCL, AD = 01;
AD connected to SDA, AD = 10;
The 8-bit chip address is sent next, most significant bit
first. Each address bit must be stable while the SCL
level is high.
After the last bit of the chip address is sent, the master
checks for the IS31FL3236’s acknowledge. The
master releases the SDA line high (through a pull-up
resistor). Then the master sends an SCL pulse. If the
IS31FL3236 has received the address correctly, then it
holds the SDA line low during the SCL pulse. If the SDA
line is not low, then the master should send a “STOP”
signal (discussed later) and abort the transfer.
Following acknowledge of IS31FL3236, the register
address byte is sent, most significant bit first.
IS31FL3236 must generate another acknowledge
indicating that the register address has been received.
A0
0
The SCL line is uni-directional. The SDA line is
bi-directional (open-collector) with a pull-up resistor
(typically 4.7kΩ). The maximum clock frequency
specified by the I2C standard is 400kHz. In this
discussion, the master is the microcontroller and the
slave is the IS31FL3236.
The timing diagram for the I2C is shown in Figure 2.
The SDA is latched in on the stable high level of the
SCL. When there is no interface activity, the SDA line
should be held high.
The “START” signal is generated by lowering the SDA
signal while the SCL signal is high. The start signal will
alert all devices attached to the I2C bus to check the
incoming address against their own chip address.
Then 8-bit of data byte are sent next, most significant
bit first. Each data bit should be valid while the SCL
level is stable high. After the data byte is sent, the
IS31FL3236 must generate another acknowledge to
indicate that the data was received.
The “STOP” signal ends the transfer. To signal “STOP”,
the SDA signal goes high while the SCL signal is high.
ADDRESS AUTO INCREMENT
To write multiple bytes of data into IS31FL3236, load
the address of the data register that the first data byte
is intended for. During the IS31FL3236 acknowledge of
receiving the data byte, the internal address pointer will
increment by one. The next data byte sent to
IS31FL3236 will be placed in the new address, and so
on. The auto increment of the address will continue as
long as data continues to be written to IS31FL3236
(Figure 5).
Figure 2 Interface timing
Figure 3 Bit transfer
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Rev. F, 09/29/2016
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IS31FL3236
Figure 4 Writing to IS31FL3236(Typical)
Figure 5 Writing to IS31FL3236(Automatic address increment)
REGISTERS DEFINITIONS
Table 2 Register Function
Address
00h
Name
Function
Table
Shutdown Register
Set software shutdown mode
Update Register
Load PWM Register and LED Control Register’s
data
01h~24h
PWM Register
26h~49h
LED Control Register
Channel 1 to 36 enable bit and current setting
5
Reset Register
Reset all registers into default value
-
25h
4Ah
4Fh
Table 3
Bit
00h
Name
Default
Global Control Register
Shutdown Register
D7:D1
-
0000000
36 channels PWM duty cycle data register
3
Set all channels enable
D0
SSD
0
The Shutdown Register sets software shutdown mode
of IS31FL3236.
SSD
0
1
Software Shutdown Enable
Software shutdown mode
Normal operation
Table 4
01h~24h
Bit
Name
Default
4
-
6
Default
0000 0000
xxxx xxxx
0000 0000
xxxx xxxx
PWM Register(OUT1~OUT36)
D7:D0
PWM
0000 0000
The PWM Registers adjusts LED luminous intensity in
256 steps.
The value of a channel’s PWM Register decides the
average output current for each output, OUT1~OUT36.
The average output current may be computed using
the Formula (1):
I PWM
I OUT 7
D[n] 2 n
256 n0
(1)
Where “n” indicates the bit location in the respective
PWM register.
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IS31FL3236
For example: D7:D0 = 10110101,
IOUT = IMAX (20+22+24+25+27)/256
The IOUT of each channel is setting by the SL bit of LED
Control Register (26h~49h). Please refer to the detail
information in Page 11.
25h PWM Update Register
The data sent to the PWM Registers and the LED
Control Registers will be stored in temporary registers.
A write operation of “0000 0000” value to the Update
Register is required to update the registers (01h~24h,
26h~49h).
Table 5 26h~49h LED Control Register
(OUT1~OUT36)
Bit
D7:D3
D2:D1
Default
00000
00
Name
-
SL
D0
OUT
Table 6
Bit
Name
Default
4Ah Global Control Register
D7:D1
-
0000000
D0
G_EN
0
The Global Control Register set all channels enable.
G_EN
0
1
Global LED Enable
Normal operation
Shutdown all LEDs
4Fh Reset Register
Once user writes “0000 0000” data to the Reset
Register, IS31FL3236 will reset all registers to default
value. On initial power-up, the IS31FL3236 registers
are reset to their default values for a blank display.
0
The LED Control Registers store the on or off state of
each LED and set the output current.
SL
00
01
10
11
Output Current Setting (IOUT)
IMAX
IMAX/2
IMAX/3
IMAX/4
OUT
0
1
LED State
LED off
LED on
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IS31FL3236
FUNCTIONAL BLOCK DIAGRAM
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Rev. F, 09/29/2016
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IS31FL3236
TYPICAL APPLICATION
PWM CONTROL
The PWM Registers (01h~24h) can modulate LED
brightness of 36 channels with 256 steps. For example,
if the data in PWM Register is “0000 0100”, then the
PWM is the fourth step.
Writing new data continuously to the registers can
modulate the brightness of the LEDs to achieve a
breathing effect.
REXT
The maximum output current of OUT1~OUT36 can be
adjusted by the external resistor, REXT, as described in
Formula (2).
C(1)
C(2)
C(3)
C(4)
C(5)
C(6)
C(7)
C(8)
C(9)
C(10)
C(11)
C(12)
C(13)
C(14)
C(15)
C(16)
C(17)
C(18)
C(19)
C(20)
C(21)
C(22)
C(23)
C(24)
C(25)
C(26)
C(27)
C(28)
C(29)
C(30)
C(31)
0
22
78
161
In order to perform a better visual LED breathing effect
we recommend using a gamma corrected PWM value
to set the LED intensity. This results in a reduced
number of steps for the LED intensity setting, but
causes the change in intensity to appear more linear to
the human eye.
Gamma correction, also known as gamma
compression or encoding, is used to encode linear
luminance to match the non-linear characteristics of
display. Since the IS31FL3236 can modulate the
brightness of the LEDs with 256 steps, a gamma
correction function can be applied when computing
each subsequent LED intensity setting such that the
changes in brightness matches the human eye's
brightness curve.
173
39
96
106
186
199
10
46
53
116
126
212
226
13
18
61
69
138
149
240
255
160
128
96
32
0
0
4
8
12
16
20
24
Intensity Steps
28
32
Figure 6 Gamma Correction(32 Steps)
Choosing more gamma steps provides for a more
continuous looking breathing effect. This is useful for
very long breathing cycles. The recommended
configuration is defined by the breath cycle T. When
T=1s, choose 32 gamma steps, when T=2s, choose
64 gamma steps. The user must decide the final
number of gamma steps not only by the LED itself, but
also based on the visual performance of the finished
product.
Table 8 64 gamma steps with 256 PWM steps
C(0)
C(1)
C(2)
C(3)
C(4)
C(5)
C(6)
C(7)
C(8)
C(9)
C(10)
C(11)
C(12)
C(13)
C(14)
C(15)
C(16)
C(17)
C(18)
C(19)
C(20)
C(21)
C(22)
C(23)
C(24)
C(25)
C(26)
C(27)
C(28)
C(29)
C(30)
C(31)
C(32)
C(33)
C(34)
C(35)
C(36)
C(37)
C(38)
C(39)
C(40)
C(41)
C(42)
C(43)
C(44)
C(45)
C(46)
C(47)
C(48)
C(49)
C(50)
C(51)
C(52)
C(53)
C(54)
C(55)
C(56)
C(57)
C(58)
C(59)
C(60)
C(61)
C(62)
C(63)
0
8
24
47
77
114
158
209
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33
6
64
CURRENT SETTING
GAMMA CORRECTION
28
4
192
The recommended minimum value of REXT is 2kΩ.
For example, set REXT = 3.3kΩ then IMAX = 23mA. If
OUT1 drives two LEDs and OUT2 drives four LEDs, set
the SL bit of LED Control Register (26h) to “01” and SL
bit of LED Control Register (27h) to “00”. So the current
of OUT1 is IOUT1 = IMAX/2 = 11.5mA and the current of
OUT2 is IOUT2 = IMAX = 23mA. The average current of
each LED is the same.
2
224
x = 58.5, VOUT = 0.8V, VEXT = 1.3V.
When channels drive different quantity of LEDs, adjust
maximum output current according to quantity of LEDs
to ensure average current of each LED is the same.
1
256
(2)
The current of each LED can be set independently by
the SL bit of LED Control Register (26h~49h). The
maximum global current is set by the external register
REXT.
32 gamma steps with 256 PWM steps
C(0)
PWM Data
I MAX
V
x EXT
REXT
Table 7
1
10
26
50
81
119
164
216
2
12
29
53
85
124
170
223
3
14
32
57
89
129
176
230
4
16
35
61
94
134
182
237
5
18
38
65
99
140
188
244
6
20
41
69
104
146
195
251
7
22
44
73
109
152
202
255
11
IS31FL3236
SHUTDOWN MODE
256
Shutdown mode can be used as a means of reducing
power consumption. During shutdown mode all
registers retain their data.
224
PWM Data
192
160
SOFTWARE SHUTDOWN
128
By setting SSD bit of the Shutdown Register (00h) to
“0”, the IS31FL3236 will operate in software shutdown
mode. When the IS31FL3236 is in software shutdown
mode, all current sources are switched off.
96
64
32
0
0
8
Figure 7
16
24
32
40
Intensity Steps
48
56
Gamma Correction(64 Steps)
64
HARDWARE SHUTDOWN
The chip enters hardware shutdown mode when the
SDB pin is pulled low.
Note, the data of 32 gamma steps is the standard value and the data
of 64 gamma steps is the recommended value.
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Rev. F, 09/29/2016
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IS31FL3236
CLASSIFICATION REFLOW PROFILES
Profile Feature
Preheat & Soak
Temperature min (Tsmin)
Temperature max (Tsmax)
Time (Tsmin to Tsmax) (ts)
Pb-Free Assembly
150°C
200°C
60-120 seconds
Average ramp-up rate (Tsmax to Tp)
3°C/second max.
Peak package body temperature (Tp)*
Max 260°C
Liquidous temperature (TL)
Time at liquidous (tL)
Time (tp)** within 5°C of the specified
classification temperature (Tc)
Average ramp-down rate (Tp to Tsmax)
Time 25°C to peak temperature
Figure 8
217°C
60-150 seconds
Max 30 seconds
6°C/second max.
8 minutes max.
Classification profile
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Rev. F, 09/29/2016
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IS31FL3236
PACKAGE INFORMATION
QFN-44
Note:
1. Controlling dimension: MM
2. Reference document: na close tool
3. The pin’s sharp and thermal pad shows different sharp among different factories.
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Rev. F, 09/29/2016
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IS31FL3236
eTQFP-48
Note:
1. The thermal pad shows different shape among different factories.
2. All dimensions in MM.
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Rev. F, 09/29/2016
15
IS31FL3236
RECOMMENDED LAND PATTERN
QFN-44
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Rev. F, 09/29/2016
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IS31FL3236
eTQFP-48
Note:
1. Land pattern complies to IPC-7351.
2. All dimensions in MM.
3. This document (including dimensions, notes & specs) is a recommendation based on typical circuit board manufacturing parameters. Since
land pattern design depends on many factors unknown (eg. user’s board manufacturing specs), user must determine suitability for use.
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Rev. F, 09/29/2016
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IS31FL3236
REVISION HISTORY
Revision
A
Initial release
C
Add ESD value
B
D
E
F
Detail Information
1. Add relevant information about eTQFP package
2. IOZ max. change to 0.2µA
Date
2012.03.07
2012.07.16
2014.03.04
Update Absolute maximum rating
2014.09.10
Update TQFP48 POD
2016.09.29
1. Add package Rja data
2. Add land pattern and revision history
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2015.12.09
18
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