IS61LV5128AL-10KLI

IS61LV5128AL 512K x 8 HIGH-SPEED CMOS STATIC RAM ISSI APRIL 2005 ® FEATURES • High-speed access times: 10, 12 ns • High-performance, low-power CMOS process • Multiple center power and ground pins for greater noise immunity • Easy memory expansion with CE and OE options • CE power-down • Fully static operation: no clock or refresh required • TTL compatible inputs and outputs • Single 3.3V power supply • Packages available: – 36-pin 400-mil SOJ – 36-pin miniBGA – 44-pin TSOP (Type II) • Lead-free available DESCRIPTION The ISSI IS61LV5128AL is a very high-speed, low power, 524,288-word by 8-bit CMOS static RAM. The IS61LV5128AL is fabricated using ISSI's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields higher performance and low power consumption devices. When CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation can be reduced down to 250 µW (typical) with CMOS input levels. The IS61LV5128AL operates from a single 3.3V power supply and all inputs are TTL-compatible. The IS61LV5128AL is available in 36-pin 400-mil SOJ, 36pin mini BGA, and 44-pin TSOP (Type II) packages. FUNCTIONAL BLOCK DIAGRAM A0-A18 DECODER 512K X 8 MEMORY ARRAY VDD GND I/O DATA CIRCUIT I/O0-I/O7 COLUMN I/O CE OE WE Copyright © 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. CONTROL CIRCUIT Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. C 04/15/05 1 IS61LV5128AL PIN CONFIGURATION 36 mini BGA 44-Pin TSOP (Type II) ISSI 3 4 5 6 ® 1 2 A B C D E F G H A0 I/O4 I/O5 GND VDD I/O6 I/O7 A9 A1 A2 NC WE NC A3 A4 A5 A6 A7 A8 I/O0 I/O1 VDD GND A18 OE A10 CE A11 A17 A16 A12 A15 A13 I/O2 I/O3 A14 NC NC A0 A1 A2 A3 A4 CE I/O0 I/O1 VDD GND I/O2 I/O3 WE A5 A6 A7 A8 A9 NC NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 NC NC NC A18 A17 A16 A15 OE I/O7 I/O6 GND VDD I/O5 I/O4 A14 A13 A12 A11 A10 NC NC NC PIN DESCRIPTIONS A0-A18 CE OE WE I/O0-I/O7 VDD GND NC Address Inputs Chip Enable Input Output Enable Input Write Enable Input Bidirectional Ports Power Ground No Connection 36-Pin SOJ A0 A1 A2 A3 A4 CE I/O0 I/O1 VDD GND I/O2 I/O3 WE A5 A6 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 NC A18 A17 A16 A15 OE I/O7 I/O6 GND VDD I/O5 I/O4 A14 A13 A12 A11 A10 NC TRUTH TABLE Mode WE X H H L CE H L L L OE X H L X I/O Operation High-Z High-Z DOUT DIN VDD Current ISB1, ISB2 ICC ICC ICC Not Selected (Power-down) Output Disabled Read Write A7 A8 A9 2 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. C 04/15/05 IS61LV5128AL ISSI Value –0.5 to VDD + 0.5 –65 to +150 1.0 Unit V °C W ® ABSOLUTE MAXIMUM RATINGS(1) Symbol VTERM TSTG PT Parameter Terminal Voltage with Respect to GND Storage Temperature Power Dissipation Notes: 1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. OPERATING RANGE VDD Range Commercial Industrial Ambient Temperature 0°C to +70°C -40°C to +85°C 10ns 3.3V +10%, -5% 3.3V +10%, -5% 12ns 3.3V +10% 3.3V +10% CAPACITANCE(1,2) Symbol CIN CI/O Parameter Input Capacitance Input/Output Capacitance Conditions VIN = 0V VOUT = 0V Max. 6 8 Unit pF pF Notes: 1. Tested initially and after any design or process changes that may affect these parameters. 2. Test conditions: TA = 25°C, f = 1 MHz, VDD = 3.3V. Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. C 04/15/05 3 IS61LV5128AL ISSI Test Conditions VDD = Min., IOH = –4.0 mA VDD = Min., IOL = 8.0 mA Min. 2.4 — 2.0 –0.3 GND ≤ VIN ≤ VDD GND ≤ VOUT ≤ VDD, Outputs Disabled Com. Ind. Com. Ind. –2 –5 –2 –5 Max. — 0.4 VDD + 0.3 0.8 2 5 2 5 Unit V V V V µA µA ® DC ELECTRICAL CHARACTERISTICS (Over Operating Range) Symbol Parameter VOH VOL VIH VIL ILI ILO Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage Input Leakage Output Leakage (1) Note: 1. VIL = –3.0V for pulse width less than 10 ns. POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range) Symbol Parameter ICC ISB VDD Dynamic Operating Supply Current TTL Standby Current (TTL Inputs) TTL Standby Current (TTL Inputs) CMOS Standby Current (CMOS Inputs) Test Conditions VDD = Max., Com. IOUT = 0 mA, f = fMAX Ind. VDD = Max., VIN = VIH or VIL CE ≥ VIH, f = fMAX. VDD = Max., VIN = VIH or VIL CE ≥ VIH, f = 0 Com. Ind. Com. Ind. -10 Min. Max. — — — — — — — — 90 95 40 45 20 25 15 20 -12 Min. Max. — — — — — — — — 85 90 35 40 20 25 15 20 Unit mA mA ISB1 mA ISB2 VDD = Max., Com. CE ≥ VDD – 0.2V, Ind. VIN ≥ VDD – 0.2V, or VIN ≤ 0.2V, f = 0 mA Note: 1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change. 4 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. C 04/15/05 IS61LV5128AL READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range) Symbol Parameter Read Cycle Time Address Access Time Output Hold Time CE Access Time OE Access Time OE to High-Z Output OE to Low-Z Output CE to High-Z Output CE to Low-Z Output Power Up Time Power Down Time -10 Min. Max. 10 — 2 — — — 0 0 3 0 — — 10 — 10 4 4 — 4 — — 10 -12 Min. Max. 12 — 2 — — — 0 0 3 0 — — 12 — 12 5 5 — 6 — — 12 Unit ns ns ns ns ns ns ns ns ns ns ns ISSI ® tRC tAA tOHA tACE tDOE tHZOE(2) tLZOE(2) tHZCE(2 tLZCE(2) tPU tPD Notes: 1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0V to 3.0V and output loading specified in Figure 1. 2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. AC TEST CONDITIONS Parameter Input Pulse Level Input Rise and Fall Times Input and Output Timing and Reference Levels Output Load Unit 0V to 3.0V 3 ns 1.5V See Figures 1 and 2 AC TEST LOADS 319 Ω 3.3V 3.3V 319 Ω OUTPUT 30 pF Including jig and scope 353 Ω OUTPUT 5 pF Including jig and scope 353 Ω Figure 1 Figure 2 5 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. C 04/15/05 IS61LV5128AL AC WAVEFORMS READ CYCLE NO. 1(1,2) (Address Controlled) (CE = OE = VIL) t RC ADDRESS ISSI ® t AA t OHA DOUT PREVIOUS DATA VALID t OHA DATA VALID READ1.eps READ CYCLE NO. 2(1,3) (CE and OE Controlled) t RC ADDRESS t AA OE t OHA t DOE CE t HZOE t LZOE t ACE t LZCE t HZCE DATA VALID CE_RD2.eps DOUT HIGH-Z Notes: 1. WE is HIGH for a Read Cycle. 2. The device is continuously selected. OE, CE = VIL. 3. Address is valid prior to or coincident with CE LOW transitions. 6 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. C 04/15/05 IS61LV5128AL ISSI -10 Min. Max. 10 8 8 0 0 8 10 6 0 — 2 — — — — — — — — — 5 — -12 Min. Max. 12 8 8 0 0 8 12 6 0 — 2 — — — — — — — — — 6 — Unit ns ns ns ns ns ns ns ns ns ns ns ® WRITE CYCLE SWITCHING CHARACTERISTICS(1,3) (Over Operating Range) Symbol Parameter Write Cycle Time CE to Write End Address Setup Time to Write End Address Hold from Write End Address Setup Time WE Pulse Width WE Pulse Width (OE = LOW) Data Setup to Write End Data Hold from Write End WE LOW to High-Z Output WE HIGH to Low-Z Output tWC tSCE tAW tHA tSA tPWE1 tPWE2 tSD tHD tHZWE(2) tLZWE(2) Notes: 1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0V to 3.0V and output loading specified in Figure 1. 2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested. 3. The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that terminates the write. AC WAVEFORMS WRITE CYCLE NO. 1(1,2) (CE Controlled, OE = HIGH or LOW) t WC ADDRESS VALID ADDRESS t SA CE t SCE t HA WE t AW t PWE1 t PWE2 t HZWE t LZWE HIGH-Z DOUT DATA UNDEFINED t SD DIN t HD DATAIN VALID CE_WR1.eps Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. C 04/15/05 7 IS61LV5128AL WRITE CYCLE NO. 2(1,2) (WE Controlled: OE is HIGH During Write Cycle) t WC ADDRESS VALID ADDRESS ISSI ® t HA OE CE LOW t AW t PWE1 WE t SA DOUT DATA UNDEFINED t HZWE HIGH-Z t LZWE t SD DIN t HD DATAIN VALID CE_WR2.eps Notes: 1. The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that terminates the Write. 2. I/O will assume the High-Z state if OE > VIH. WRITE CYCLE NO. 3 (WE Controlled: OE is LOW During Write Cycle) t WC ADDRESS VALID ADDRESS OE CE LOW t HA LOW t AW t PWE2 WE t SA DOUT DATA UNDEFINED t HZWE HIGH-Z t LZWE t SD DIN t HD DATAIN VALID CE_WR3.eps 8 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. C 04/15/05 IS61LV5128AL ISSI Package 400-mil Plastic SOJ TSOP (Type II) 400-mil Plastic SOJ TSOP (Type II) ® ORDERING INFORMATION Commercial Range: 0°C to +70°C Speed (ns) 10 10 12 12 Order Part No. IS61LV5128AL-10K IS61LV5128AL-10T IS61LV5128AL-12K IS61LV5128AL-12T Industrial Range: –40°C to +85°C Speed (ns) 10 10 10 10 10 10 12 Order Part No. IS61LV5128AL-10KI IS61LV5128AL-10KLI IS61LV5128AL-10TI IS61LV5128AL-10TLI IS61LV5128AL-10BI IS61LV5128AL-10BLI IS61LV5128AL-12TI Package 400-mil Plastic SOJ 400-mil Plastic SOJ, Lead-free TSOP (Type II) TSOP (Type II), Lead-free mini BGA (8mmx10mm) mini BGA (8mmx10mm), Lead-free TSOP (Type II) Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. C 04/15/05 9 PACKAGING INFORMATION Mini Ball Grid Array Package Code: B (36-pin) Top View 1 2 3 4 56 6 ISSI Bottom View φ b (36x) ® 5 4 3 2 1 A B C D D E F G H D1 e A B C D E F G H e E E1 Notes: 1. Controlling dimensions are in millimeters. A2 SEATING PLANE A1 A mBGA - 6mm x 8mm MILLIMETERS Sym. N0. Leads A A1 A2 D D1 E E1 e b — 0.24 0.60 mBGA - 8mm x 10mm INCHES Min. Typ. Max. 36 MILLIMETER Sym. N0. Leads INCHES Min. Typ. Max. 36 Min. Typ. Max. 36 — — — 5.25BSC 5.90 6.00 3.75BSC 0.75BSC 0.30 0.35 0.40 6.10 1.20 0.30 — 8.10 Min. Typ. Max. 36 — 0.24 0.60 — — — 5.25BSC 7.90 8.00 8.10 3.75BSC 0.75BSC 0.30 0.35 0.40 1.20 0.30 — — 0.009 0.024 — — — 0.047 0.012 — A A1 A2 D D1 E E1 e b — 0.009 0.024 — — — 0.047 0.012 — 7.90 8.00 0.311 0.315 0.319 0.207BSC 0.232 0.236 0.240 0.148BSC 0.030BSC 0.012 0.014 0.016 9.90 10.00 10.10 0.390 0.394 0.398 .207BSC 0.311 0.315 0.319 0.148BSC 0.030BSC 0.012 0.014 0.016 Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. E 01/15/03 PACKAGING INFORMATION 400-mil Plastic SOJ Package Code: K ISSI Notes: 1. Controlling dimension: millimeters. 2. BSC = Basic lead spacing between centers. 3. Dimensions D and E1 do not include mold flash protrusions and should be measured from the bottom of the package. 4. Reference document: JEDEC MS-027. ® N N/2+1 E1 E 1 N/2 D A SEATING PLANE b C A2 e B A1 E2 Symbol No. Leads A A1 A2 B b C D E E1 E2 e Millimeters Inches Min Max Min Max (N) 28 3.25 3.75 0.128 0.148 0.64 — 0.025 — 2.08 — 0.082 — 0.38 0.51 0.015 0.020 0.66 0.81 0.026 0.032 0.18 0.33 0.007 0.013 18.29 18.54 0.720 0.730 11.05 11.30 0.435 0.445 10.03 10.29 0.395 0.405 9.40 BSC 0.370 BSC 1.27 BSC 0.050 BSC Millimeters Min Max 32 3.25 3.75 0.64 — 2.08 — 0.38 0.51 0.66 0.81 0.18 0.33 20.82 21.08 11.05 11.30 10.03 10.29 9.40 BSC 1.27 BSC Inches Min Max 0.128 0.148 0.025 — 0.082 — 0.015 0.020 0.026 0.032 0.007 0.013 0.820 0.830 0.435 0.445 0.395 0.405 0.370 BSC 0.050 BSC Millimeters Min Max 36 3.25 3.75 0.64 — 2.08 — 0.38 0.51 0.66 0.81 0.18 0.33 23.37 23.62 11.05 11.30 10.03 10.29 9.40 BSC 1.27 BSC Inches Min Max 0.128 0.148 0.025 — 0.082 — 0.015 0.020 0.026 0.032 0.007 0.013 0.920 0.930 0.435 0.445 0.395 0.405 0.370 BSC 0.050 BSC Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. F 10/29/03 PACKAGING INFORMATION ISSI Millimeters Min Max 42 3.25 3.75 0.64 — 2.08 — 0.38 0.51 0.66 0.81 0.18 0.33 27.18 27.43 11.05 11.30 10.03 10.29 9.40 BSC 1.27 BSC Inches Min Max 0.128 0.148 0.025 — 0.082 — 0.015 0.020 0.026 0.032 0.007 0.013 1.070 1.080 0.435 0.445 0.395 0.405 0.370 BSC 0.050 BSC Millimeters Min Max 44 3.25 3.75 0.64 — 2.08 — 0.38 0.51 0.66 0.81 0.18 0.33 28.45 28.70 11.05 11.30 10.03 10.29 9.40 BSC 1.27 BSC 0.128 0.148 0.025 — 0.082 — 0.015 0.020 0.026 0.032 0.007 0.013 1.120 1.130 0.435 0.445 0.395 0.405 0.370 BSC 0.050 BSC Inches Min Max ® Millimeters Inches Symbol Min Max Min Max No. Leads (N) 40 A 3.25 3.75 0.128 0.148 A1 0.64 — 0.025 — A2 2.08 — 0.082 — B 0.38 0.51 0.015 0.020 b 0.66 0.81 0.026 0.032 C 0.18 0.33 0.007 0.013 D 25.91 26.16 1.020 1.030 E 11.05 11.30 0.435 0.445 E1 10.03 10.29 0.395 0.405 E2 9.40 BSC 0.370 BSC e 1.27 BSC 0.050 BSC Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. 2 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. F 10/29/03 PACKAGING INFORMATION Plastic TSOP Package Code: T (Type II) ISSI Notes: 1. Controlling dimension: millimieters, unless otherwise specified. 2. BSC = Basic lead spacing between centers. 3. Dimensions D and E1 do not include mold flash protrusions and should be measured from the bottom of the package. 4. Formed leads shall be planar with respect to one another within 0.004 inches at the seating plane. ® N N/2+1 E1 E 1 D N/2 SEATING PLANE ZD A . e b L A1 α C Symbol Ref. Std. No. Leads A A1 b C D E1 E e L ZD α Millimeters Min Max Inches Min Max Plastic TSOP (T - Type II) Millimeters Inches Min Max Min Max 44 — 1.20 — 0.047 0.05 0.15 0.002 0.006 0.30 0.45 0.012 0.018 0.12 0.21 0.005 0.008 18.31 18.52 0.721 0.729 10.03 10.29 0.395 0.405 11.56 11.96 0.455 0.471 0.80 BSC 0.032 BSC 0.41 0.60 0.016 0.024 0.81 REF 0.032 REF 0° 5° 0° 5° Millimeters Min Max 50 — 1.20 0.05 0.15 0.30 0.45 0.12 0.21 20.82 21.08 10.03 10.29 11.56 11.96 0.80 BSC 0.40 0.60 0.88 REF 0° 5° Inches Min Max (N) 32 — 1.20 — 0.047 0.05 0.15 0.002 0.006 0.30 0.52 0.012 0.020 0.12 0.21 0.005 0.008 20.82 21.08 0.820 0.830 10.03 10.29 0.391 0.400 11.56 11.96 0.451 0.466 1.27 BSC 0.050 BSC 0.40 0.60 0.016 0.024 0.95 REF 0.037 REF 0° 5° 0° 5° — 0.047 0.002 0.006 0.012 0.018 0.005 0.008 0.820 0.830 0.395 0.405 0.455 0.471 0.031 BSC 0.016 0.024 0.035 REF 0° 5° Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. F 06/18/03