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IS61WV10248BLL-10MLI-TR

IS61WV10248BLL-10MLI-TR

  • 厂商:

    ISSI(芯成半导体)

  • 封装:

    TFBGA48

  • 描述:

    IC SRAM 8MBIT PARALLEL 48MINIBGA

  • 详情介绍
  • 数据手册
  • 价格&库存
IS61WV10248BLL-10MLI-TR 数据手册
IS61WV10248ALL IS61WV10248BLL IS64WV10248BLL ® 1M x 8 HIGH-SPEED CMOS STATIC RAM FEATURES • High-speed access times: 8, 10, 20 ns • High-performance, low-power CMOS process • Multiple center power and ground pins for greater noise immunity • Easy memory expansion with CE and OE options • CE power-down • Fully static operation: no clock or refresh required • TTL compatible inputs and outputs • Single power supply – Vdd 1.65V to 2.2V (IS61WV10248ALL) speed = 20ns for Vcc = 1.65V to 2.2V Long-term Support World Class Quality JANUARY 2019 DESCRIPTION The ISSI IS61WV10248ALL/BLL and IS64WV10248BLL are very high-speed, low power, 1M-word by 8-bit CMOS static RAM. The IS61WV10248ALL/BLL and IS64WV10248BLL are fabricated using ISSI's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields higher performance and low power consumption devices. When CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation can be reduced down with CMOS input levels. The IS61WV10248ALL/BLL and IS64WV10248BLL operate from a single power supply and all inputs are TTL-compatible. – Vdd 2.4V to 3.6V (IS61/64WV10248BLL) speed = 10ns for Vcc = 2.4V to 3.6V speed = 8ns for Vcc = 3.3V + 5% • Packages available: – 48-ball miniBGA (9mm x 11mm) – 44-pin TSOP (Type II) • Industrial and Automotive Temperature Support • Lead-free available The IS61WV10248ALL/BLL and IS64WV10248BLL are available in 48 ball mini BGA and 44-pin TSOP (Type II) packages. FUNCTIONAL BLOCK DIAGRAM A0-A19 DECODER 1M X 8 MEMORY ARRAY I/O DATA CIRCUIT COLUMN I/O VDD GND I/O0-I/O7 CE OE CONTROL CIRCUIT WE Copyright © 2019 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that: a.) the risk of injury or damage has been minimized; b.) the user assume all such risks; and c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 1 Rev. B3 01/30/2019 IS61WV10248ALL IS61WV10248BLL IS64WV10248BLL ® Long-term Support World Class Quality PIN CONFIGURATION 48-pin Mini BGA (M ) (9mm x 11mm) 1 2 3 4 5 44-pin TSOP (Type II ) 6 A NC OE A0 A1 A2 NC B NC NC A3 A4 CE I/O0 C NC NC A5 A6 I/O1 I/O2 D GND NC A17 A7 I/O3 VDD E VDD NC NC A16 I/O4 GND F NC NC A14 A15 I/O5 I/O6 G NC NC A12 A13 WE I/O7 H A18 A8 A9 A10 A11 A19 NC NC A0 A1 A2 A3 A4 CE I/O0 I/O1 VDD GND I/O2 I/O3 WE A5 A6 A7 A8 A9 NC NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 NC NC NC A18 A17 A16 A15 OE I/O7 I/O6 GND VDD I/O5 I/O4 A14 A13 A12 A11 A10 A19 NC NC PIN DESCRIPTIONS A0-A19 Address Inputs CE Chip Enable Input OE Output Enable Input WE Write Enable Input I/O0-I/O7 Data Input / Output Vdd Power GND Ground NC No Connection 2 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B3 01/30/2019 IS61WV10248ALL IS61WV10248BLL IS64WV10248BLL ® Long-term Support World Class Quality TRUTH TABLE Mode WE Not Selected X (Power-down) Output Disabled H Read H Write L CE H L L L OE I/O Operation Vdd Current X High-Z Isb1, Isb2 H L X High-Z Dout Din Icc Icc Icc ABSOLUTE MAXIMUM RATINGS(1) Symbol Parameter Vterm Terminal Voltage with Respect to GND Vdd Vdd Relates to GND Tstg Storage Temperature Pt Power Dissipation Value Unit –0.5 to Vdd + 0.5 V –0.3 to 4.0 V –65 to +150 °C 1.0 W Notes: 1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. CAPACITANCE(1,2) Symbol Cin CI/O Parameter Input Capacitance Input/Output Capacitance Conditions Vin = 0V Vout = 0V Max. 6 8 Unit pF pF Notes: 1. Tested initially and after any design or process changes that may affect these parameters. 2. Test conditions: Ta = 25°C, f = 1 MHz, Vdd = 3.3V. Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 3 Rev. B3 01/30/2019 IS61WV10248ALL IS61WV10248BLL IS64WV10248BLL ® Long-term Support World Class Quality OPERATING RANGE (Vdd) (IS61WV10248ALL) Range Ambient Temperature Commercial 0°C to +70°C Industrial –40°C to +85°C Automotive –40°C to +125°C Vdd (20 ns) 1.65V-2.2V 1.65V-2.2V 1.65V-2.2V OPERATING RANGE (Vdd) (IS61WV10248BLL)(1) Range Ambient Temperature Commercial 0°C to +70°C Industrial –40°C to +85°C Vdd (8 ns) 3.3V + 5% 3.3V + 5% Vdd (10 ns) 2.4V-3.6V 2.4V-3.6V Note: 1. When operated in the range of 2.4V-3.6V, the device meets 10ns. When operated in the range of 3.3V + 5%, the device meets 8ns. OPERATING RANGE (Vdd) (IS64WV10248BLL) Range Ambient Temperature Automotive –40°C to +125°C 4 Vdd (10 ns) 2.4V-3.6V Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B3 01/30/2019 IS61WV10248ALL IS61WV10248BLL IS64WV10248BLL ® Long-term Support World Class Quality DC ELECTRICAL CHARACTERISTICS (Over Operating Range) Vdd = 3.3V + 5% Symbol Voh Vol Vih Vil Ili Ilo Parameter Test Conditions Output HIGH Voltage Vdd = Min., Ioh = –4.0 mA Output LOW Voltage Vdd = Min., Iol = 8.0 mA Input HIGH Voltage Input LOW Voltage(1) Input Leakage GND ≤ Vin ≤ Vdd Output Leakage GND ≤ Vout ≤ Vdd, Outputs Disabled Min. Max. Unit 2.4 — V — 0.4 V 2 Vdd + 0.3 V –0.3 0.8 V –1 1 µA –1 1 µA Note: 1. Vil (min.) = –0.3V DC; Vil (min.) = –2.0V AC (pulse width ≤ 2 ns). Not 100% tested. Vih (max.) = Vdd + 0.3V DC; Vih (max.) = Vdd + 2.0V AC (pulse width ≤ 2 ns). Not 100% tested. DC ELECTRICAL CHARACTERISTICS (Over Operating Range) Vdd = 2.4V-3.6V Symbol Voh Vol Vih Vil Ili Ilo Parameter Test Conditions Output HIGH Voltage Vdd = Min., Ioh = –1.0 mA Output LOW Voltage Vdd = Min., Iol = 1.0 mA Input HIGH Voltage Input LOW Voltage(1) Input Leakage GND ≤ Vin ≤ Vdd Output Leakage GND ≤ Vout ≤ Vdd, Outputs Disabled Min. Max. Unit 1.8 — V — 0.4 V 2.0 Vdd + 0.3 V –0.3 0.8 V –1 1 µA –1 1 µA Note: 1. Vil (min.) = –0.3V DC; Vil (min.) = –2.0V AC (pulse width ≤ 2 ns). Not 100% tested. Vih (max.) = Vdd + 0.3V DC; Vih (max.) = Vdd + 2.0V AC (pulse width ≤ 2 ns). Not 100% tested. DC ELECTRICAL CHARACTERISTICS (Over Operating Range) Vdd = 1.65V-2.2V Symbol Voh Vol Vih Vil(1) Ili Ilo Parameter Test Conditions Vdd Min. Max. Unit Output HIGH Voltage Ioh = -0.1 mA 1.65-2.2V 1.4 — V Output LOW Voltage Iol = 0.1 mA 1.65-2.2V — 0.2 V Input HIGH Voltage 1.65-2.2V 1.4 Vdd + 0.2 V Input LOW Voltage 1.65-2.2V –0.2 0.4 V Input Leakage GND ≤ Vin ≤ Vdd –1 1 µA Output Leakage GND ≤ Vout ≤ Vdd, Outputs Disabled –1 1 µA Note: 1. Vil (min.) = –0.3V DC; Vil (min.) = –2.0V AC (pulse width ≤ 2 ns). Not 100% tested. Vih (max.) = Vdd + 0.3V DC; Vih (max.) = Vdd + 2.0V AC (pulse width ≤ 2 ns). Not 100% tested. Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 5 Rev. B3 01/30/2019 IS61WV10248ALL IS61WV10248BLL IS64WV10248BLL ® Long-term Support World Class Quality AC TEST CONDITIONS (HIGH SPEED) Parameter Input Pulse Level Input Rise and Fall Times Input and Output Timing and Reference Level (VRef) Output Load Unit Unit (2.4V-3.6V) (3.3V + 5%) 0.4V to Vdd-0.3V 0.4V to Vdd-0.3V 1.5ns 1.5ns Vdd/2 Vdd/2 + 0.05 See Figures 1 and 2 Unit (1.65V-2.2V) 0.4V to Vdd-0.2V 1.5ns Vdd/2 See Figures 1 and 2 See Figures 1 and 2 AC TEST LOADS 319 Ω ZO = 50Ω 50Ω 1.5V OUTPUT 30 pF Including jig and scope Figure 1. 6 3.3V OUTPUT 5 pF Including jig and scope 353 Ω Figure 2. Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B3 01/30/2019 IS61WV10248ALL IS61WV10248BLL IS64WV10248BLL ® Long-term Support World Class Quality POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range) -8 Symbol Parameter Test Conditions Min. Max. Icc Vdd Dynamic Operating Vdd = Max., Com. — 110 Supply Current Iout = 0 mA, f = fmax Ind. — 120 Auto. — — typ.(2) Icc1 Operating Vdd = Max., Com. — 30 Supply Current Iout = 0 mA, f = 0 Ind. — 35 Auto. — — Isb1 TTL Standby Current Vdd = Max., Com. — 30 (TTL Inputs) Vin = Vih or Vil Ind. — 35 CE ≥ Vih, f = 0 Auto. — — Isb2 CMOS Standby Vdd = Max., Com. — 20 Current (CMOS Inputs) CE ≥ Vdd – 0.2V, Ind. — 25 Vin ≥ Vdd – 0.2V, or Auto. — — Vin ≤ 0.2V, f = 0 typ.(2) -10 Min. Max. — 95 — 100 — 140 60 — 30 — 35 — 60 — 30 — 35 — 70 — 20 — 25 — 70 4 -20 Min. Max. Unit — 90 mA — 100 — 140 — — — — — — — — — 30 mA 35 70 30 mA 35 70 15 mA 20 70 Note: 1. At f = fmax, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change. 2. Typical values are measured at Vdd = 3.0V, Ta = 25oC and not 100% tested. Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B3 01/30/2019 7 IS61WV10248ALL IS61WV10248BLL IS64WV10248BLL ® Long-term Support World Class Quality READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range) -8 Symbol Parameter Min. Max. -10 Min. Max. Unit trc Read Cycle Time 8 — 10 — ns taa Address Access Time — 8 — 10 ns toha Output Hold Time 2 — 2 — ns tace CE Access Time — 8 — 10 ns tdoe OE Access Time — 5.5 — 6.5 ns thzoe(2) OE to High-Z Output — 3 — 4 ns tlzoe(2) OE to Low-Z Output 0 — 0 — ns thzce CE to High-Z Output 0 3 0 4 ns tlzce CE to Low-Z Output 3 — 3 — ns tpu Power Up Time 0 — 0 — ns tpd Power Down Time — 8 — 10 ns (2 (2) Notes: 1.  Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0V to 3.0V and output loading specified in Figure 1. 2.  Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. 8 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B3 01/30/2019 IS61WV10248ALL IS61WV10248BLL IS64WV10248BLL ® Long-term Support World Class Quality READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range) -20 ns Symbol Parameter Min. Max. Unit trc Read Cycle Time 20 — ns taa Address Access Time — 20 ns toha Output Hold Time 2.5 — ns tace CE Access Time — 20 ns tdoe OE Access Time — 8 ns thzoe(2) OE to High-Z Output 0 8 ns tlzoe(2) OE to Low-Z Output 0 — ns thzce CE to High-Z Output 0 8 ns tlzce CE to Low-Z Output 3 — ns tpu Power Up Time 0 — ns tpd Power Down Time — 20 ns (2 (2) Notes: 1.  Test conditions assume signal transition times of 1.5 ns or less, timing reference levels of 1.25V, input pulse levels of 0.4V to Vdd-0.3V and output loading specified in Figure 1. 2.  Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested. 3.  Not 100% tested. Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 9 Rev. B3 01/30/2019 IS61WV10248ALL IS61WV10248BLL IS64WV10248BLL ® Long-term Support World Class Quality AC WAVEFORMS READ CYCLE NO. 1(1,2) (Address Controlled) (CE = OE = Vil) t RC ADDRESS t OHA DOUT t AA t OHA DATA VALID PREVIOUS DATA VALID READ1.eps READ CYCLE NO. 2(1,3) (CE and OE Controlled) t RC ADDRESS t AA t OHA OE t HZOE t DOE t LZOE CE t LZCE DOUT t ACE HIGH-Z t HZCE DATA VALID CE_RD2.eps Notes: 1. WE is HIGH for a Read Cycle. 2. The device is continuously selected. OE, CE = Vil. 3. Address is valid prior to or coincident with CE LOW transitions. 10 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B3 01/30/2019 IS61WV10248ALL IS61WV10248BLL IS64WV10248BLL ® Long-term Support World Class Quality WRITE CYCLE SWITCHING CHARACTERISTICS(1,3) (Over Operating Range) -8 -10 Symbol Parameter Min. Max. Min. Max. Unit twc Write Cycle Time 8 — 10 — ns tsce CE to Write End 6.5 — 8 — ns taw Address Setup Time to Write End 6.5 — 8 — ns tha Address Hold from Write End 0 — 0 — ns tsa Address Setup Time 0 — 0 — ns tpwe1 WE Pulse Width (OE = HIGH) 6.5 — 8 — ns tpwe2 WE Pulse Width (OE = LOW) 8.0 — 10 — ns tsd Data Setup to Write End 5 — 6 — ns thd Data Hold from Write End 0 — 0 — ­ns (2) thzwe WE LOW to High-Z Output — 3.5 — 5 ns tlzwe(2) WE HIGH to Low-Z Output 2 — 2 — ns Notes: 1.  Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0V to 3.0V and output loading specified in Figure 1. 2.  Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested. 3.  The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that terminates the write. Shaded area product in development Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 11 Rev. B3 01/30/2019 IS61WV10248ALL IS61WV10248BLL IS64WV10248BLL ® Long-term Support World Class Quality WRITE CYCLE SWITCHING CHARACTERISTICS(1,2) (Over Operating Range) Symbol Parameter -20 ns Min. Max. Unit twc Write Cycle Time 20 — ns tsce CE to Write End 12 — ns taw Address Setup Time to Write End 12 — ns tha Address Hold from Write End 0 — ns tsa Address Setup Time 0 — ns tpwe1 WE Pulse Width (OE = HIGH) 12 — ns tpwe2 WE Pulse Width (OE = LOW) 17 — ns tsd Data Setup to Write End 9 — ns thd Data Hold from Write End 0 — ­ns (3) thzwe WE LOW to High-Z Output — 9 ns tlzwe WE HIGH to Low-Z Output 3 — ns (3) Notes: 1.  Test conditions assume signal transition times of 1.5ns or less, timing reference levels of 1.25V, input pulse levels of 0.4V to Vdd-0.3V and output loading specified in Figure 1. 2.  Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested. 3.  The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that terminates the write. 12 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B3 01/30/2019 IS61WV10248ALL IS61WV10248BLL IS64WV10248BLL ® Long-term Support World Class Quality AC WAVEFORMS WRITE CYCLE NO. 1(1,2) (CE Controlled, OE = HIGH or LOW) t WC VALID ADDRESS ADDRESS t SA t SCE t HA CE t AW t PWE1 t PWE2 WE t HZWE DOUT DATA UNDEFINED t LZWE HIGH-Z t SD DIN t HD DATAIN VALID CE_WR1.eps Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 13 Rev. B3 01/30/2019 IS61WV10248ALL IS61WV10248BLL IS64WV10248BLL ® Long-term Support World Class Quality AC WAVEFORMS WRITE CYCLE NO. 2(1,2) (WE Controlled: OE is HIGH During Write Cycle) t WC ADDRESS VALID ADDRESS t HA OE CE LOW t AW t PWE1 WE t SA DOUT t HZWE DATA UNDEFINED t LZWE HIGH-Z t SD DIN t HD DATAIN VALID CE_WR2.eps Notes: 1. The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that terminates the Write. 2. I/O will assume the High-Z state if OE > Vih. 14 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B3 01/30/2019 IS61WV10248ALL IS61WV10248BLL IS64WV10248BLL ® Long-term Support World Class Quality AC WAVEFORMS WRITE CYCLE NO. 3 (WE Controlled: OE is LOW During Write Cycle) t WC ADDRESS VALID ADDRESS OE LOW CE LOW t HA t AW t PWE2 WE t SA DOUT DATA UNDEFINED t HZWE t LZWE HIGH-Z t SD DIN t HD DATAIN VALID CE_WR3.eps Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 15 Rev. B3 01/30/2019 IS61WV10248ALL IS61WV10248BLL IS64WV10248BLL ® Long-term Support World Class Quality DATA RETENTION SWITCHING CHARACTERISTICS  Symbol Parameter Vdr Vdd for Data Retention Test Condition Min. Max. Unit See Data Retention Waveform 1.2 3.6 V Idr Data Retention Current Vdd = 1.2V, CE ≥ Vdd – 0.2V Ind. — 25 mA Auto. — 70 typ.(1) 4 tsdr Data Retention Setup Time See Data Retention Waveform trdr Recovery Time See Data Retention Waveform 0 trc — ns — ns Note: 1. Typical values are measured at Vdd = 3.0V, Ta = 25oC and not 100% tested. DATA RETENTION WAVEFORM (CE Controlled) tSDR Data Retention Mode tRDR VDD 1.65V 1.4V VDR CE GND 16 CE ≥ VDD - 0.2V Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B3 01/30/2019 IS61WV10248ALL IS61WV10248BLL IS64WV10248BLL ® Long-term Support World Class Quality ORDERING INFORMATION Industrial Range: -40°C to +85°C Voltage Range: 2.4V to 3.6V peed (ns) S 10 (81) Order Part No. IS61WV10248BLL-10MI IS61WV10248BLL-10MLI IS61WV10248BLL-10TI IS61WV10248BLL-10TLI Package 48 mini BGA (9mm x 11mm) 48 mini BGA (9mm x 11mm), Lead-free TSOP (Type II) TSOP (Type II), Lead-free Note: 1. Speed = 8ns for Vdd = 3.3V + 5%. Speed = 10ns for Vdd = 2.4V to 3.3V. Industrial Range: -40°C to +85°C Voltage Range: 1.65V to 2.2V peed (ns) S 20 Order Part No. IS61WV10248ALL-20MI IS61WV10248ALL-20MLI IS61WV10248ALL-20TI Package 48 mini BGA (9mm x 11mm) 48 mini BGA (9mm x 11mm), Lead-free TSOP (Type II) Automotive Range: -40°C to +125°C Voltage Range: 2.4V to 3.6V peed (ns) S Order Part No. 10 IS64WV10248BLL-10MA3 IS64WV10248BLL-10TA3 IS64WV10248BLL-10CTLA3 Package 48 mini BGA (9mm x 11mm) TSOP (Type II) TSOP (Type II), Lead-free, Copper Leadframe Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B3 01/30/2019 17 IS61WV10248ALL IS61WV10248BLL IS64WV10248BLL Long-term Support World Class Quality 18 1. CONTROLLING DIMENSION : MM . 2. Reference document : JEDEC MO-207 NOTE : 08/21/2008 ® Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. B3 01/30/2019 Rev. B3 01/30/2019 Package Outline 06/04/2008 3. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION/INTRUSION. ® 2. DIMENSION D AND E1 DO NOT INCLUDE MOLD PROTRUSION. 1. CONTROLLING DIMENSION : MM NOTE : IS61WV10248ALL IS61WV10248BLL IS64WV10248BLL Long-term Support World Class Quality Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 19
IS61WV10248BLL-10MLI-TR
物料型号包括IS61WV10248ALL、IS61WV10248BLL和IS64WV10248BLL,是高速、低功耗的1M x 8位CMOS静态RAM。


器件简介如下: - 高速访问时间:8ns、10ns、20ns - 使用高性能、低功耗的CMOS工艺 - 可支持工业和汽车温度范围 - 无铅封装

引脚分配为: - 地址输入:A0-A19 - 控制信号:CE(片选)、OE(输出使能)、WE(写使能) - 数据输入/输出:I/O0-I/O7 - 电源和地:VDD、GND - 空脚:NC

参数特性包括: - 工作电压:IS61WV10248ALL (1.65V至2.2V),IS61/64WV10248BLL (2.4V至3.6V) - 工作电流:读/写操作时的VDD电流,电源关断时的电流 - 输入/输出电容

功能详解: - 完全静态操作,无需时钟或刷新 - TTL兼容的输入输出 - 多种中心电源和地引脚,提高抗噪能力 - CE电源关断降低功耗 - 支持易失性和非易失性电源

应用信息: - 工业应用 - 汽车应用

封装信息: - 48球迷你BGA (9mm x 11mm) - 44引脚TSOP (Type II)

此外,还提供了绝对最大额定值、电容、工作范围、直流电气特性、AC测试条件、电源特性、读/写周期切换特性、AC波形和数据保持特性等详细信息。
IS61WV10248BLL-10MLI-TR 价格&库存

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