IS62C1024AL-35TLI-TR

IS62C1024AL IS65C1024AL 128K x 8 LOW POWER CMOS STATIC RAM FEATURES • High-speed access time: 35, 45 ns • Low active power: 100 mW (typical) • Low standby power: 20 µW (typical) CMOS standby • Output Enable (OE) and two Chip Enable (CE1 and CE2) inputs for ease in applications • Fully static operation: no clock or refresh required • TTL compatible inputs and outputs • Single 5V (±10%) power supply • Commercial, Industrial, and Automotive temperature ranges available • Standard Pin Configuration: — 32-pin SOP/ 32-pin TSOP (Type 1) • Lead free available DECEMBER 2017 DESCRIPTION The ISSI IS62C1024AL/IS65C1024AL is a low power, 131,072-word by 8-bit CMOS static RAM. It is fabricated using high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields higher performance and low power consumption devices. When CE1 is HIGH or CE2 is LOW (deselected), the device assumes a standby mode at which the power dissipation can be reduced by using CMOS input levels. Easy memory expansion is provided by using two Chip Enable inputs, CE1 and CE2.The active LOW Write Enable (WE) controls both writing and reading of the memory. FUNCTIONAL BLOCK DIAGRAM A0-A16 DECODER 128K x 8 MEMORY ARRAY VDD GND I/O DATA CIRCUIT I/O0-I/O7 COLUMN I/O CE1 CE2 OE WE CONTROL CIRCUIT Copyright © 2017 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that: a.) the risk of injury or damage has been minimized; b.) the user assume all such risks; and c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 1 Rev. H1 12/01/2017 IS62C1024AL IS65C1024AL PIN CONFIGURATION PIN CONFIGURATION 32-Pin SOP 32-Pin TSOP (Type 1) NC 1 32 VDD A16 2 31 A15 A14 3 30 CE2 A12 4 29 WE A7 5 28 A13 A6 6 27 A8 A5 7 26 A9 A4 8 25 A11 A3 9 24 OE A2 10 23 A10 A1 11 22 CE1 A0 12 21 I/O7 I/O0 13 20 I/O6 I/O1 14 19 I/O5 I/O2 15 18 I/O4 GND 16 17 I/O3 A11 A9 A8 A13 WE CE2 A15 VDD NC A16 A14 A12 A7 A6 A5 A4 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 OE A10 CE1 I/O7 I/O6 I/O5 I/O4 I/O3 GND I/O2 I/O1 I/O0 A0 A1 A2 A3 PIN DESCRIPTIONS A0-A16 Address Inputs CE1 Chip Enable 1 Input CE2 Chip Enable 2 Input OE Output Enable Input WE Write Enable Input I/O0-I/O7 Input/Output Vdd Power GND Ground OPERATING RANGE (IS62C1024AL) Range Ambient Temperature Commercial 0°C to +70°C Industrial -40°C to +85°C Vdd 5V ± 10% 5V ± 10% OPERATING RANGE (IS65C1024AL) Range Automotive Ambient Temperature -40°C to +125°C Vdd 5V ± 10% TRUTH TABLE Mode WE CE1 CE2 OE I/O Operation Vdd Current Not Selected X H X X High-Z Isb1, Isb2 (Power-down) X X L X High-Z Isb1, Isb2 Output Disabled H L H H High-Z Icc Read H L H L Dout Icc Write L L H X Din Icc 2 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. H1 12/01/2017 IS62C1024AL IS65C1024AL ABSOLUTE MAXIMUM RATINGS(1) Symbol Vterm Tstg Pt Iout Parameter Terminal Voltage with Respect to GND Storage Temperature Power Dissipation DC Output Current (LOW) Value –0.5 to +7.0 –65 to +125 1.0 20 Unit V °C W mA Notes: 1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. CAPACITANCE(1,2) Symbol Parameter Cin Input Capacitance Cout Output Capacitance Conditions Vin = 0V Vout = 0V Max. Unit 6 pF 8 pF Notes: 1. Tested initially and after any design or process changes that may affect these parameters. 2. Test conditions: Ta = 25°C, f = 1 MHz, Vdd = 5.0V. DC ELECTRICAL CHARACTERISTICS (Over Operating Range) Symbol Parameter Test Conditions Options Min. Max. Unit Voh Output HIGH Voltage Vdd = Min., Ioh = –1.0 mA 2.4 — V Vol Output LOW Voltage Vdd = Min., Iol = 2.1 mA — 0.4 V Vih Input HIGH Voltage 2.2 Vdd + 0.5 V (1) Vil Input LOW Voltage -0.5 0.8 V Ili Input Leakage GND ≤ Vin ≤ Vdd Com. -1 1 µA Ind. -2 2 Auto. -5 5 Ilo Output Leakage GND ≤ Vout ≤ Vdd Com. -1 1 µA CE1 = Vih, or Ind. -2 2 CE2 = Vil, or OE = Vih or Auto. -5 5 WE = Vil Note: 1. Vil (min.) = -0.3V DC; Vil (min.) = -2.0V AC (pulse width -2.0 ns). Not 100% tested. Vih (max.) = Vdd + 0.3V DC; Vih (max.) = Vdd + 2.0V AC (pulse width -2.0 ns). Not 100% tested. Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 3 Rev. H1 12/01/2017 IS62C1024AL IS65C1024AL IS62C1024AL/IS65C1024AL POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range) -35 ns -45 ns Symbol Parameter Test Conditions Min. Max. Min. Max. Unit Icc Average operating CE1 = Vil, CE2 = Vih Com. — 25 mA Current Vin = Vih or Vil, Ind. — 30 I I/O= 0 mA, f=0 Auto. — 35 Icc1 Vdd Dynamic Operating Vdd = Max., CE1 = Vil Com. — 30 mA Supply Current Iout = 0 mA, f = fmax Ind. — 35 Vin = Vih or Vil Auto. — 40 CE2 = Vih typ.(2) — 20 Isb1 TTL Standby Current Vdd = Max., Com. — 1 mA (TTL Inputs) Vin = Vih or Vil, CE1 ≥ Vih, Ind. — 1.5 or CE2 ≤ Vil, f = 0 Auto. — 2 Isb2 CMOS Standby Vdd = Max., Com. — 5 µA Current (CMOS Inputs) CE1 ≥ Vdd – 0.2V, or Ind. — 10 CE2 ≤ 0.2V, Vin ≥ Vdd – 0.2V, Auto. — 45 or Vin ≤ Vss + 0.2V, f = 0 typ.(2) — 4 Note: 1. At f = fmax, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change. 2. Typical Values are measured at Vdd = 5V, Ta = 25oC and not 100% tested. READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range) Symbol trc taa toha tace1 tace2 tdoe tlzoe(2) thzoe(2) tlzce1(2) tlzce2(2) thzce(2) Parameter Read Cycle Time Address Access Time Output Hold Time CE1 Access Time CE2 Access Time OE Access Time OE to Low-Z Output OE to High-Z Output CE1 to Low-Z Output CE2 to Low-Z Output CE1 or CE2 to High-Z Output -35 ns Min. Max. 35 — — 35 3 — — 35 — 35 — 10 3 — 0 10 3 — 3 — 0 10 -45 ns Min. Max. 45 — — 45 3 — — 45 — 45 — 20 5 — 0 15 5 — 5 — 0 15 Unit ns ns ns ns ns ns ns ns ns ns ns Notes: 1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0.6 to 2.4V and output loading specified in Figure 1a. 2. Tested with the load in Figure 1b. Transition is measured ±500 mV from steady-state voltage. Not 100% tested. 4 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. H1 12/01/2017 IS62C1024AL IS65C1024AL AC TEST CONDITIONS Parameter Input Pulse Level Input Rise and Fall Times Input and Output Timing and Reference Level Output Load Unit 0.6V to 2.4V 5 ns 1.5V See Figures 1a and 1b AC TEST LOADS 1838 Ω 1838 Ω 5V 5V OUTPUT OUTPUT 100 pF Including jig and scope 993 Ω 5 pF Including jig and scope Figure 1a. 993 Ω Figure 1b. AC WAVEFORMS READ CYCLE NO. 1(1,2) tRC ADDRESS tAA tOHA DOUT tOHA DATA VALID Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 5 Rev. H1 12/01/2017 IS62C1024AL IS65C1024AL READ CYCLE NO. 2(1,3) tRC ADDRESS tAA tOHA OE tHZOE tDOE CE1 tLZOE tACE1/tACE2 CE2 DOUT tLZCE1/ tLZCE2 tHZCE HIGH-Z DATA VALID Notes: 1. WE is HIGH for a Read Cycle. 2. The device is continuously selected. OE, CE1 = Vil, CE2 = Vih. 3. Address is valid prior to or coincident with CE1 LOW and CE2 HIGH transitions. WRITE CYCLE SWITCHING CHARACTERISTICS(1,3) (Over Operating Range, Standard and Low Power) Symbol twc tsce1 tsce2 taw tha tsa tpwe(4) tsd thd thzwe(2) tlzwe(2) Parameter Write Cycle Time CE1 to Write End CE2 to Write End Address Setup Time to Write End Address Hold from Write End Address Setup Time WE Pulse Width Data Setup to Write End Data Hold from Write End WE LOW to High-Z Output WE HIGH to Low-Z Output -35 ns Min. Max. 35 — 25 — 25 — 25 — 0 — 0 — 25 — 20 — 0 — — 10 3 — -45 ns Min. Max. Unit 45 — ns 35 — ns 35 — ns 35 — ns 0 — ns 0 — ns 35 — ns 25 — ns 0 — ­ns — 15 ns 5 — ns Notes: 1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0.6 to 2.4V and output loading specified in Figure 1a. 2. Tested with the load in Figure 1b. Transition is measured ±500 mV from steady-state voltage. Not 100% tested. 3. The internal write time is defined by the overlap of CE1 LOW, CE2 HIGH and WE LOW. All signals must be in valid states to initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that terminates the Write. 4. Tested with OE HIGH. 6 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. H1 12/01/2017 IS62C1024AL IS65C1024AL AC WAVEFORMS WRITE CYCLE NO. 1 (WE Controlled)(1,2) tWC ADDRESS tHA tSCE1 CE1 tSCE2 CE2 tAW tPWE(4) WE tSA DOUT tHZWE tLZWE HIGH-Z DATA UNDEFINED tSD DIN tHD DATA-IN VALID WRITE CYCLE NO. 2 (CE1, CE2 Controlled)(1,2) tWC ADDRESS tSA tHA tSCE1 CE1 tSCE2 CE2 tAW tPWE(4) WE tHZWE DOUT DATA UNDEFINED tLZWE HIGH-Z tSD DIN tHD DATA-IN VALID Notes: 1. The internal write time is defined by the overlap of CE1 LOW, CE2 HIGH and WE LOW. All signals must be in valid states to initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that terminates the Write. 2. I/O will assume the High-Z state if OE = Vih. Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 7 Rev. H1 12/01/2017 IS62C1024AL IS65C1024AL DATA RETENTION SWITCHING CHARACTERISTICS Symbol Parameter Vdr Vdd for Data Retention Idr Data Retention Current tsdr Data Retention Setup Time trdr Recovery Time Test Condition See Data Retention Waveform Vdd = 2.0V, CE1 ≥ Vdd – 0.2V Com. or CE2 ≤ 0.2V Ind. Vin ≥ Vdd – 0.2V, or Vin ≤ Vss + 0.2V Auto. See Data Retention Waveform See Data Retention Waveform Min. Typ. Max. Unit 2.0 5.5 V — — 5 µA — — 10 — — 45 0 — ns trc — ns Note: 1. Typical Values are measured at Vdd = 5V, Ta = 25oC and not 100% tested. DATA RETENTION WAVEFORM (CE1 Controlled) Data Retention Mode tSDR tRDR VDD 4.5V 2.2V VDR CE1 ≥ VDD - 0.2V CE1 GND DATA RETENTION WAVEFORM (CE2 Controlled) Data Retention Mode 4.5V VDD CE2 2.2V tSDR tRDR VDR 0.4V CE2 ≤ 0.2V GND 8 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. H1 12/01/2017 IS62C1024AL IS65C1024AL Industrial Range: –40°C to +85°C Speed (ns) 35 35 Order Part No. IS62C1024AL-35QLI IS62C1024AL-35TLI Package Plastic SOP, Lead-free TSOP, Type 1, Lead-free ORDERING INFORMATION: IS65C1024AL Automotive Range: -40°C to +125°C peed (ns) S 45 45 Order Part No. Package IS65C1024AL-45QLA3 Plastic SOP, Lead-free IS65C1024AL-45TLA3 TSOP, Type 1, Lead-free Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 9 Rev. H1 12/01/2017 IS62C1024AL IS65C1024AL 10 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. H1 12/01/2017 IS62C1024AL IS65C1024AL Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 11 Rev. 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