IS63WV1024BLL-12JLI

IS63WV1024BLL IS64WV1024BLL 128K x 8 HIGH-SPEED CMOS STATIC RAM MAY 2012 FEATURES DESCRIPTION • High-speed access time: 12 ns: 3.3V + 10% 15 ns: 2.5V – 3.6V • High-performance, low-power CMOS process • CMOS Low Power Operation 50 mW (typical) operating current 25 µW (typical) standby current • Multiple center power and ground pins for greater noise immunity • Easy memory expansion with CE and OE options • CE power-down • Fully static operation: no clock or refresh required • TTL compatible inputs and outputs • Packages available: – 32-pin TSOP (Type II) – 32-pin sTSOP (Type I) – 48-Ball miniBGA (6mm x 8mm) – 32-pin 300-mil SOJ • Lead-free available The ISSI IS63/64WV1024BLL is a very high-speed, low power, 131,072-word by 8-bit CMOS static RAM. The IS63/64WV1024BLL is fabricated using ISSI's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields higher performance and low power consumption devices. When CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation can be reduced down to 25 µW (typical) with CMOS input levels. The IS63/64WV1024BLL operates from a single VDD power supply. The IS63/64WV1024BLL is available in 32-pin TSOP (Type II), 32-pin sTSOP (Type I), 48-Ball miniBGA (6mm x 8mm), and 32-pin SOJ (300-mil) packages. FUNCTIONAL BLOCK DIAGRAM A0-A16 DECODER 128K X 8 MEMORY ARRAY VDD GND I/O DATA CIRCUIT I/O0-I/O7 COLUMN I/O CE OE CONTROL CIRCUIT WE Copyright © 2012 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that: a.) the risk of injury or damage has been minimized; b.) the user assume all such risks; and c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. D 05/09/12 1 IS63WV1024BLL IS64WV1024BLL PIN CONFIGURATION PIN CONFIGURATION 32-Pin SOJ 32-Pin TSOP (Type II) (T) 32-Pin sTSOP (Type I) (H) A0 1 32 A16 A1 2 31 A15 A2 3 30 A14 A3 4 29 A13 CE 5 28 OE I/O0 6 27 I/O7 I/O1 7 26 I/O6 VDD 8 25 GND GND 9 24 VDD I/O2 10 23 I/O5 I/O3 11 22 I/O4 WE 12 21 A12 A4 13 20 A11 A5 14 19 A10 A6 15 18 A9 A7 16 17 A8 PIN DESCRIPTIONS 2 A0-A16 Address Inputs CE Chip Enable Input OE Output Enable Input WE Write Enable Input I/O0-I/O7 Bidirectional Ports VDD Power GND Ground A0 A1 A2 A3 CE I/O0 I/O1 VDD GND I/O2 I/O3 WE A4 A5 A6 A7 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 A16 A15 A14 A13 OE I/O7 I/O6 GND VDD I/O5 I/O4 A12 A11 A10 A9 A8 PIN CONFIGURATION 48-mini BGA (B) (6 mm x 8 mm) 1 2 3 4 5 6 A NC OE A2 A6 A7 NC B I/O1 NC A1 A5 CE I/O8 C I/O2 NC A0 A4 NC I/O7 D GND NC NC A3 NC VDD E VDD NC NC NC NC GND F I/O3 NC A14 A11 I/O5 I/O6 G I/O4 NC A15 A12 WE A8 H NC A10 A16 A13 A9 NC Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. D 05/09/12 IS63WV1024BLL IS64WV1024BLL TRUTH TABLE Mode Not Selected (Power-down) Output Disabled Read Write WE CE OE I/O Operation VDD Current X H X High-Z ISB1, ISB2 H H L L L L H L X High-Z DOUT DIN ICC1, ICC2 ICC1, ICC2 ICC1, ICC2 ABSOLUTE MAXIMUM RATINGS(1) Symbol VTERM TSTG PT VDD Parameter Terminal Voltage with Respect to GND Storage Temperature Power Dissipation VDD Related to GND Value –0.5 to VDD+0.5 –65 to +150 1.5 -0.2 to +3.9 Unit V °C W V Note: 1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. OPERATING RANGE (VDD) Range Commercial Industrial Automotive Ambient Temperature 0°C to +70°C –40°C to +85°C –40°C to +125°C VDD (15 ns) 2.5V-3.6V 2.5V-3.6V 2.5V-3.6V Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. D 05/09/12 VDD (12 ns) 3.3V + 10% 3.3V + 10% 3.3V + 10% 3 IS63WV1024BLL IS64WV1024BLL DC ELECTRICAL CHARACTERISTICS (Over Operating Range) VDD = 2.5V-3.6V Symbol Parameter Test Conditions Min. Max. Unit VOH Output HIGH Voltage VDD = Min., IOH = –1.0 mA 2.3 — V VOL Output LOW Voltage VDD = Min., IOL = 1.0 mA — 0.4 V VIH Input HIGH Voltage 2.0 VDD + 0.3 V VIL Input LOW Voltage(1) –0.3 0.8 V ILI Input Leakage GND ≤ VIN ≤ VDD –2 2 µA ILO Output Leakage GND ≤ VOUT ≤ VDD, Outputs Disabled –2 2 µA Min. Max. Unit Note: 1. VIL (min.) = –0.3V DC; VIL (min.) = –2.0V AC (pulse width < 10 ns). Not 100% tested. VIH (max.) = VDD + 0.3V DC; VIH (max.) = VDD + 2.0V AC (pulse width < 10 ns). Not 100% tested. DC ELECTRICAL CHARACTERISTICS (Over Operating Range) VDD = 3.3V + 10% Symbol Parameter Test Conditions VOH Output HIGH Voltage VDD = Min., IOH = –4.0 mA 2.4 — V VOL Output LOW Voltage VDD = Min., IOL = 8.0 mA — 0.4 V VIH Input HIGH Voltage 2 VDD + 0.3 V VIL Input LOW Voltage(1) –0.3 0.8 V ILI Input Leakage GND ≤ VIN ≤ VDD –2 2 µA ILO Output Leakage GND ≤ VOUT ≤ VDD, Outputs Disabled –2 2 µA Note: 1. VIL (min.) = –0.3V DC; VIL (min.) = –2.0V AC (pulse width < 10 ns). Not 100% tested. VIH (max.) = VDD + 0.3V DC; VIH (max.) = VDD + 2.0V AC (pulse width < 10 ns). Not 100% tested. 4 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. D 05/09/12 IS63WV1024BLL IS64WV1024BLL POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range) Symbol Parameter Test Conditions Options ICC VDD = Max., IOUT = 0 mA, f = fMAX COM. VDD Dynamic Operating Supply Current IND. AUTO typ.(2) ICC1 Operating Supply VDD = Max., COM. Current Iout = 0mA, f = 0 IND. AUTO ISB1 ISB2 TTL Standby Current (TTL Inputs) CMOS Standby Current (CMOS Inputs) VDD = Max., VIN = VIH or VIL CE ≥ VIH, f = 0 COM. VDD = Max., CE ≥ VDD – 0.2V, VIN ≥ VDD – 0.2V, or VIN ≤ 0.2V, f = 0 COM. IND. AUTO IND. AUTO typ.(2) -12 ns Min. Max. -15 ns Min. Max. Unit — — — — 35 45 60 20 — — — — 30 40 50 20 mA — — — 5 5 5 — — — 5 5 5 mA — — — 3 4 4 — — — 3 4 4 mA — — — — 20 50 75 6 — — — — 20 50 75 6 uA Note: 1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change. 2. Typical values are measured at VDD=2.5V, TA=25oC. Not 100% tested. CAPACITANCE(1) Symbol Parameter CIN Input Capacitance COUT Input/Output Capacitance Conditions Max. Unit VIN = 0V 6 pF VOUT = 0V 8 pF Note: 1. Tested initially and after any design or process changes that may affect these parameters. Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. D 05/09/12 5 IS63WV1024BLL IS64WV1024BLL AC TEST CONDITIONS Parameter Input Pulse Level Input Rise and Fall Times Input and Output Timing and Reference Level (VRef) Output Load Unit (2.5V-3.6V) 0V to VDD V 1.5ns VDD/2 Unit (3.3V + 10%) 0V to VDD V 1.5ns VDD/2 + 0.05 See Figures 1a and 1b See Figures 1a and 1b AC TEST LOADS 319 Ω Zo=50Ω VRef OUTPUT 30 pF Including jig and scope Figure 1a. 6 2.5V 50Ω OUTPUT 5 pF Including jig and scope 353 Ω Figure 1b. Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. D 05/09/12 IS63WV1024BLL IS64WV1024BLL READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range) -12 ns Min. Max. -15 ns Min. Max. Symbol Parameter tRC Read Cycle Time 12 — 15 — ns tAA Address Access Time — 12 — 15 ns tOHA Output Hold Time 3 — 3 — ns tACE CE Access Time — 12 — 15 ns tDOE OE Access Time — 6 — 7 ns tLZOE(2) OE to Low-Z Output 0 — 0 — ns tHZOE(2) OE to High-Z Output 0 6 0 6 ns tLZCE CE to Low-Z Output 3 — 3 — ns tHZCE CE to High-Z Output 0 6 0 6 ns tPU CE to Power Up Time 0 — 0 — ns tPD CE to Power Down Time — 12 — 15 ns (2) (2) Unit Notes: 1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.25V, input pulse levels of 0.4V to VDD-0.3V and output loading specified in Figure 1. 2. Tested with the loading specified in Figure 1. Transition is measured ±500 mV from steady-state voltage. Not 100% tested. Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. D 05/09/12 7 IS63WV1024BLL IS64WV1024BLL AC WAVEFORMS READ CYCLE NO. 1(1,2) t RC ADDRESS t AA t OHA t OHA DOUT DATA VALID PREVIOUS DATA VALID READ1.eps READ CYCLE NO. 2(1,3) t RC ADDRESS t AA t OHA OE t HZOE t DOE t LZOE CE t ACE t HZCE t LZCE DOUT HIGH-Z DATA VALID CE_RD2.eps Notes: 1. WE is HIGH for a Read Cycle. 2. The device is continuously selected. OE, CE = VIL. 3. Address is valid prior to or coincident with CE LOW transitions. 8 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. D 05/09/12 IS63WV1024BLL IS64WV1024BLL WRITE CYCLE SWITCHING CHARACTERISTICS(1,3) (Over Operating Range) -12 ns Min. Max. -15 ns Min. Max. Symbol Parameter tWC Write Cycle Time 12 — 15 — ns tSCE CE to Write End 9 — 10 — ns tAW Address Setup Time to Write End 9 — 10 — ns tHA Address Hold from Write End 0 — 0 — ns tSA Address Setup Time 0 — 0 — ns PWE1(1) t WE Pulse Width (OE High) 9 — 10 — ns tPWE2(2) WE Pulse Width (OE Low) 11 — 12 — ns tSD Data Setup to Write End 9 — 9 — ns tHD Unit Data Hold from Write End 0 — 0 — ns (2) tHZWE WE LOW to High-Z Output — 6 — 7 ns tLZWE(2) WE HIGH to Low-Z Output 3 — 3 — ns Notes: 1. Test conditions assume signal transition times of 3ns or less, timing reference levels of 1.25V, input pulse levels of 0.4V to VDD-0.3V and output loading specified in Figure 1a. 2. Tested with the loading specified in Figure 1b. Transition is measured ±500 mV from steady-state voltage. Not 100% tested. 3. The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that terminates the Write. AC WAVEFORMS WRITE CYCLE NO. 1(1,2 (CE Controlled, OE = HIGH or LOW) t WC VALID ADDRESS ADDRESS t SA t SCE t HA CE t AW t PWE1 t PWE2 WE t HZWE DOUT DATA UNDEFINED t LZWE HIGH-Z t SD DIN t HD DATAIN VALID CE_WR1.eps Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. D 05/09/12 9 IS63WV1024BLL IS64WV1024BLL AC WAVEFORMS WRITE CYCLE NO. 2(1) (WE Controlled, OE = HIGH during Write Cycle) t WC ADDRESS VALID ADDRESS t HA OE CE LOW t AW t PWE1 WE t SA DOUT t HZWE t LZWE HIGH-Z DATA UNDEFINED t SD t HD DATAIN VALID DIN CE_WR2.eps WRITE CYCLE NO. 3 (WE Controlled: OE is LOW During Write Cycle) t WC ADDRESS VALID ADDRESS OE LOW CE LOW t HA t AW t PWE2 WE tSA DOUT DATA UNDEFINED t HZWE t LZWE HIGH-Z t SD DIN t HD DATAIN VALID CE_WR3.eps Notes: 1. The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that terminates the Write. 2. I/O will assume the High-Z state if OE > VIH. 10 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. D 05/09/12 IS63WV1024BLL IS64WV1024BLL DATA RETENTION SWITCHING CHARACTERISTICS Symbol Parameter Test Condition Operations VDR VDD for Data Retention See Data Retention Waveform IDR Data Retention Current VDD = 1.8V, CE ≥ VDD – 0.2V COM. IND. AUTO. tSDR tRDR Min. Typ.(1) Max. 1.8 — 3.6 V — — — 6 6 6 20 50 75 µA Unit Data Retention Setup Time See Data Retention Waveform 0 — — ns Recovery Time See Data Retention Waveform tRC — — ns Note: 1. Typical values are measured at VDD = 2.5V, TA = 25 C. Not 100% tested. O DATA RETENTION WAVEFORM (CE Controlled) tSDR Data Retention Mode tRDR VDD VDR CE GND CE ≥ VDD - 0.2V Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. D 05/09/12 11 IS63WV1024BLL IS64WV1024BLL ORDERING INFORMATION Industrial Range: –40°C to +85°C Speed (ns) 12 Order Part No. Package IS63WV1024BLL-12TI IS63WV1024BLL-12TLI IS63WV1024BLL-12HI IS63WV1024BLL-12HLI IS63WV1024BLL-12JLI IS63WV1024BLL-12BI IS63WV1024BLL-12BLI 32-pin TSOP (Type II) 32-pin TSOP (Type II), Lead-free sTSOP (Type I) (8mm x13.4mm) sTSOP (Type I) (8mm x13.4mm), Lead-free 32-pin SOJ (300-mil), Lead-free mBGA(6mmx8mm) mBGA(6mmx8mm), Lead-free Automotive Range (A3): –40°C to +85°C Speed (ns) 15 (12*) Order Part No. Package IS64WV1024BLL-15TA3 IS64WV1024BLL-15TLA3 IS64WV1024BLL-15HA3 IS64WV1024BLL-15HLA3 IS64WV1024BLL-15BA3 IS64WV1024BLL-15BLA3 32-pin TSOP (Type II) 32-pin TSOP (Type II), Lead-free sTSOP (Type I) (8mm x13.4mm) sTSOP (Type I) (8mm x13.4mm), Lead-free mBGA(6mmx8mm) mBGA(6mmx8mm), Lead-free Note: 1. Speed = 12ns for VDD = 3.3V + 10%. Speed = 15ns for VDD = 2.5V-3.6V. 12 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. D 05/09/12 IS63WV1024BLL IS64WV1024BLL Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. D 05/09/12 13 IS63WV1024BLL IS64WV1024BLL 14 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. D 05/09/12 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. D 05/09/12 08/12/2008 Package Outline 1. CONTROLLING DIMENSION : MM . 2. Reference document : JEDEC MO-207 NOTE : IS63WV1024BLL IS64WV1024BLL 15 IS63WV1024BLL IS64WV1024BLL 16 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. D 05/09/12