EV6R11

EV6R11 IX6R11 HALF BRIDGE DRIVER Evaluation Board F eatures • Single chip for driving high/low side MOSFETs / IGBTs • High to low side isolation of 600V • Common-mode dv/dt immunity of greater than 50V/nanosecond • Undervoltage lockout • Optimized power circuit layout • High side bootstrap supply • Sockets for freewheeling fast recovery diodes (FREDS) • Flexibility of power level utilization • 5V compatible HCMOS input logic with hysterisis • Protection from cross conduction of the half bridge • Simple, fast and low cost means of evaluation and design • Option for using IXDP630 with RC oscillator or IXDP631 with crystal oscillator for improved dead time accuracy. • Three phase operation with the ability to attach additional slave driver boards. Introduction The EV6R11 KIT implements a single power phase-leg circuit on a double-sided PCB, using the ISOSMARTTM HALF BRIDGE DRIVER CHIPSET - IX6R11and IXDP630 dead time generator. This evaluation board includes an assembled and tested PCB with two power devices. Just follow the instructions in this document and connect the board to the load and power. Any power circuit is layout sensitive. The layout of this PCB is a proven, working layout. The designer is invited to duplicate this layout in his system, following the evaluation of the driver chipset. Most systems vary in their power level requirements and therefore the power devices used. Due to this fact and fluctuations in availability of power devices, the kit will not always include the same power devices. The designer is encouraged to use the power devices that are required for his system. The devices that are enclosed serve only for initial evaluation. Figure 1: EV6R11 Assembled PCB With S3 Package Copyright © IXYS CORPORATION 2003 First Release EV6R11 KIT Schematic Diagram: P1 pins P1-1 P1-2 P1-3 P1-4 P1-5 P1-6 P1-7 P1-8 GND P1-9 N/C HIN P1-10 +VCL LIN P1-11 +VCL Vdd supply line P1-12 LS (VCL GND) ENB active low P1-13 LS (VCL GND) PWM IN +5V for IXDB630 external 630 drive P1 1 2 3 4 5 6 7 8 9 10 11 12 13 1 2 3 4 5 6 7 8 9 10 11 12 13 DC BU S TESTPO INT R9 10 D1 U F-1007 DIC T C7 11 C8 . 1UF C12 . 1UF 2 8 6 9 R2 5.11 1 3 Q2 IXF H7N 90Q D3 1 + 10 UF 35V Q2- S TES TPO INT C9 . 1UF 1K V 13 3 9 Q1- D TES TPO INT U4 HS HS 7 10 2 2 1 4 18 R1 5.11 1 3 D2 Q1 IXF H7N 90 Q 1 14 1 HI N LI N LS GN D TESTPOINT R 14 open 1 1 C1 10 UF 35V C2 13 . 1UF 3 U1 LM78L05 AC Z EN B VC L Vd d 3 IN I X6 R1 1S 3 . 1UF C1 1 2 + C10 10 UF 35V C13 . 1UF U3 VC H HGO HS HS GN D R1 0 OU T 7 1 + LGO LS LS N/ C N/ C N/ C DG 1 2 16 12 HI N LI N 4 9.9 C3 .01UF C5 = 27 pF for IXDP630 C5 = 22 pF for IXDP631 R 3 = 1 K fo r I XD P6 30 R3 = 1M f or IX DP 63 1 C6 22PF 14 15 C4 . 1UF 27p F (2 2pF ) Y1 XM/S M R3 1K / 1M L OA D Y 1, C 6 F OR IXD P63 1 C5 Vd d VC L VC H 10 4 5 15 R 1 1 4 .02K R1 2 4 .02K R 6 10K HGO 8 EN B TP 5 TP 6 R CIN / XTLI N R S T O SC OU T Vc c 1 TP 2 16 R 7 1K 1 3 5 I X6 R1 1S 6 1 18 10 11 1 TP 1 LGO LS LS TU TL SU SL RU RL 13 12 15 14 17 16 1 TP3 1 Q3 2N 700 0 1 3 Q4 2N 7000 1 3 JP1 N/ C N/ C N/ C ENAS ENAT 17 11 ( Dead Timer ) JP 2 8 GN D ENAT R 13 jum pered RE SET (ac tiv e low) R 5 10K 9 R 15 jum pered 2 7 OUTEN A R 16 open Figure 3: EV6R11 PCB Schematic Schematic Notes: This is a demonstration PCB and has been designed for flexibility and ease of use. The schematic shows all options but does not mean the PCB is configured as such when ordered. The PCB will be loaded with either the IX6R11S3 16 pin SOIC package (U3) OR the IX6R11S6 18 pin SOIC package with heat sink tab (U4). The free-wheeling diodes, D2 and D3, are also not included but can be installed if IGBTs are used. Ordering: EV6R11S3 EV6R11S6 PCB with IX6R11S3 16 pin SOIC IC package PCB with IX6R11S6 18 pin SOIC IC package with heat tab 2 12 5 6 R 4 10K 6 2 IXD P630/631 DG 4 N/ C E NAS 2 R 8 1K ENAR U2 TP4 LS EV6R11 KIT ASSEMBLY: Figure 3 is a complete schematic diagram of the design kit. This schematic indicates an application using MOSFETs. When IGBTs are used, freewheeling diodes (D2&D3) are typically added. To operate the PCB, simply solder the included MOSFET power devices and C9 or install devices specific to your application. Note gate drain source pin orientation of power devices when installing on the PCB. C9 has not been installed due to its high profile and possible lead damage. up. Jitter is then produced as drive signal 'On' time overlaps into dead time. A practical limit in values are soon reached with timing components R3 and C5 as they are adjusted to compensate for the reduced period in drive frequency. It is possible to 'overdrive' the IXDP630 with an external clock signal applied to pin 10 to reduce dead time even further than what is possible with R3 and C5. To do this, remove R3, C5 from the board and install a 50 Ohm load resistor at position R10. Solder pads have been provided at R10 to solder the ends of a coax cable directly to the board. The IXDP630 can be driven in excess of 50MHz. g) The IXDP630 dead time generator is a 5V HCMOS device. The addition of the IXDP630 on the evaluation board is in part for convenience in providing dual complementary drive signals. The IXDP631 is a performance extension of the IXDP630 and can be added as desired by the user. However there is no part number available for a IXDP631 loaded evaluation board and the user must request IXDP631 samples separately. Please note that threshold levels must be observed when selecting the front end logic Vdd supply voltage. To increase threshold level flexibility, this PCB incorporates a level translation circuit with Q3 and Q4. As configured, a three terminal +5V regulator, U1, supplies power to the IXDP630 and translator circuit which implies that Vdd should be greater than 8V to prevent regulator drop-out. Please note that this is only one way to configure the board and was chosen to provide a fast, easy way to get started during the design stage. NOTES: a) The ICs and Power devices are static sensitive and require special handling. b) Use any power device that is suitable for your application. The PCB was designed to accept devices with TO-247 or TO-264 packages. Two IXYS power devices are included in the kit. D2 and D3 are required only if Q1 and Q2 are IGBTs, and thus are not included in the kit. (A recommendation for D2 & D3 is in the Bill of Materials). c) Use any convenient method of interconnection at LS_GND, Q1-D, Q2-S, DC_BUS. The hole spacing is 5.08mm and will fit most common terminal blocks. (A recommendation for a connector that the PCB will accept is in the Bill of Materials and is available from Digi-Key among other sources). d) For half bridge applications, insert a jumper between Q1-D and Q2-S. e) The gate resistors, R1 and R2, will depend on the power device size that is used. 5.11 Ohm resistors are installed and should work for most applications. f) IXDP630 dead time is provided by timing components R3 and C5 and is fixed at roughly 1 microsecond. See the IXDP630 data sheet for calculation and modification of the dead time value. It must also be noted that dead time starts to impact drive signals as drive frequency goes 3 EV6R11 KIT DATA SHEETS: The following list provides direct web links for the IXYS devices included with this PCB. Please visit the IXYS web site at www.ixys.com for a complete overview of the entire IXYS product line. IX6R11 Half Bridge Driver IC: http://www.ixys.com/99037.pdf IXDP630 Digital Dead Time Generator: http://www.ixys.com/98568.pdf IXFH 7N90Q Power MOSFETS: http://www.ixys.com/98645.pdf Bill of Materials Reference Qty. Description U1 U2 U3 U4 D1 U2 Q1, 2 Q3, 4 R1, 2 R4, 5, 6 R3, 7, 8 R9 R11, 12 R13, 15 C1,7,10 C2,4,8,11,12,13 C3 C5 C9 P1 NOT INCLUDED: U2 D4, D5 P2 R3 R10 C5, 6 Y1 1 1 1 1 1 1 2 2 2 3 3 1 2 2 3 6 1 1 1 1 1 2 1 1 1 2 1 +5V regulator Dead time generator IC 16 pin Half Bridge Driver 18 pin Half bridge Driver 1A, 1000V high speed diode 18 pin socket High voltage power MOSFET Switching MOSFET 5.11 ohm, 1/4 W resistors 10k ohm, 1/4 W resistors 1k ohm, 1/4 W resistors 10 ohm, 1/4 W resistors 4.02k ohm 1/4 W resistors Insulated wire jumpers 10uF, 35V, aluminum electrolytic cap 0.1uF, 50V, ceramic cap 0.01uF, 50V, ceramic cap 27pF, 50V, ceramic cap 0.1uF, 1000V, ceramic cap 13 pin header connector Crystal based dead time generator 12A, 1000V fast recovery diode 4 pole terminal block 1M ohm, 1/4 W IXDP631 osc load resistor 50 ohm, 1/4 W load resistor Crystal load capacitors, 22pF 50V ceramic Crystal for IXDP631 operation Mfr. National Semi. IXYS IXYS IXYS Diodes Inc. Assmann IXYS Motorola Part # LM78L05ACZ IXDP630 IX6R11S3 IX6R11S6 UF1007DICT A18-LC-TT IXFH7N90Q 2N7000 Panasonic Panasonic Panasonic Sprague Berg IXYS IXYS Altech Corp. Panasonic Pletronics 10GAP10 68000-236 IXDP631 DSEI12-10A AKZ250/4 4 EV6R11 KIT OPERATION: For performance evaluation and power system design please note the following: a) The assembled board can be run with the IXDP630 removed by applying complementary 5V square waves with proper "dead time" to the input pins HIN (P1-2) and LIN (P1-3). For standard IXDP630 operation, the values of R3 and C5 have been listed on the bill of materials. These values are for demonstration, which may not be appropriate for your application and can be changed as needed. For IXDP631 operation, load R3, C5, C6 with the recommended load components as outlined in the IXDP630/631 data sheet along with the crystal at the frequency of choice. R3 and C5 serve a dual purpose depending on which dead timer is used. The IXDP630 is hardwired for phase 'R' operation, see 630/631 data sheet, with pins OUTENA, ENAR, and RESET tied high. PWM drive input signal for ' R' phase is applied to P1-6. To add phases 'S' and/or 'T', enable phases with jumpers at JP1 and/or JP2 and apply PWM phase drive signals to TP5 and/or TP6 taking the respective complementary outputs from TP1 through TP4. Note that TP1TP6 are through-hole pads that have been added to the board to serve as convenient solder and/or test points. b) The IX6R11 provides a wide range of flexibility with its power supply requirements. However, threshold levels must be observed in the relationship between Vdd to HIN and LIN when selecting power supply values in the final design. Device propagation delays can also be minimized by observing relative values between supplies. c) Be careful with ground connections. Avoid ground loops. In general, connect the grounds as shown in Figure 4 to minimize ground bounce effects. This is particularly important when three "High/Low side driver design kits" are connected together with a single IXDP630 to form a three phase drive system, such as that shown in Figure 5. d) Before using the PCB at full power or attempting a short circuit test, make sure that a proper high voltage electrolytic capacitor is connected between DC BUS and GND as shown in Figure 4. The leads to this capacitor should be as short as possible to minimize any stray inductance. e) Figure 4 shows the load terminated at point A. This point could be connected to a number of places depending on the application. For example: Connection to ground will test the high side device. Connection to DC BUS will test the low side device. It could also be connected to the center point of a capacitive divider (UPS systems). f) Figure 5 shows a three phase power system implementation with a load configured in a Y (star). It could also be configured in a DELTA configuration. Please note the grounding scheme. Cut the connection between "ground plane 2" and "ground plane 4" on the components side of the PCB and solder a 10 Ohm resistor between these ground planes. The GND of each board is terminated to a single ground point. 5 EV6R11 KIT > > > > Vdd P1-4 Vcl P1-10 DC-BUS . . C1 + A + DC Supply EV6R11 EVBD6R11 PWM P1-6 GND P1-1 Q2-S Q1-D LOAD LS-GND . Figure 4: Evaluation Board & Load Termination Vdd R drive S drive T drive R S T GND TL TU EVBD6R11 EV6R11 .. Vcl Vdd DC BUS Q2-S Q1-D LS-GND Vcl ... . + SL SU R phase .. . . GND P1-3 Vdd P1-2 DC BUS Q2-S Q1-D LS-GND Vcl EV6R11 EVBD6R11 . . + C1 LOAD GND S phase P1-3 Vdd P1-2 DC BUS Q2-S Q1-D LS-GND Vcl GND EV6R11 EVBD6R11 . . LS-GND T phase Figure 5: EV6R11 Three Phase Configuration 6 LO LO AD AD - DC Supply . EV6R11 KIT With the addition of High Current MOSFET Drivers on the outputs, the IX6R11's typical 6A peak output current capability can be "boosted" to drive the latest IXYS MOSFETS & IGBTs. Figure 6 shows the addition of two IXDD414's. These are CMOS high-speed MOSFET drivers that have a 14A Peak Output Drive Capability, allowing the IX6R11 to drive a pair of IXFK90N20Q 90A/200V Power MOSFETs. The 2 Ohm gate resistors shown should be Non-Inductive High Performance Film resistors such at those available from Caddock. Particular attention also needs to be paid to Suppy By-passing, Grounding, and minimizing the Output Lead Inductance when designing such a high power circuit layout. Figure 6: Boosting the IX6R11 outputs for larger MOSFETs. 7 DS99102(10/03)