IXFR30N50Q

HiPerFETTM Power MOSFETs ISOPLUS247TM VDSS (Electrically Isolated Back Surface) IXFR 30N50Q IXFR 32N50Q ID25 500 V 29 A 500 V 30 A trr £ 250 ns RDS(on) 0.16 W 0.15 W N-Channel Enhancement Mode High dV/dt, Low trr, HDMOSTM Family Preliminary data Symbol Test Conditions VDSS VDGR TJ = 25°C to 150°C TJ = 25°C to 150°C; RGS = 1 MW 500 500 V V VGS VGSM Continuous Transient ±20 ±30 V V ID25 TC = 25°C 30 A IDM TC = 25°C, Pulse width limited by TJM 120 A IAR TC = 25°C 30 A EAS EAR TC = 25°C TC = 25°C 1.5 45 J mJ dv/dt IS £ IDM, di/dt £ 100 A/ms, VDD £ VDSS TJ £ 150°C, RG = 2 W 5 V/ns PD Maximum Ratings 30N50 32N50 30N50 32N50 30N50 32N50 TC = 25°C TJ TJM Tstg TL 1.6 mm (0.062 in.) from case for 10 s VISOL 50/60 Hz, RMS W -55 ... +150 150 -55 ... +150 °C °C °C 300 °C 2500 V~ 6 g Weight G D Isolated back surface* G = Gate S = Source D = Drain * Patent pending 310 t = 1 minute leads-to-tab ISOPLUS 247TM E 153432 Features • Silicon chip on Direct-Copper-Bond substrate - High power dissipation - Isolated mounting surface - 2500V electrical isolation • Low drain to tab capacitance(