LF21904NTR

LF21904N High-Side / Low-Side Gate Driver Features Description  F  loating high-side driver in bootstrap operation to 600V  D  rives two N-channel MOSFETs or IGBTs in a halfbridge configuration  Output drivers capable of 4.5A/4.5A typ sink/source  Logic input (HIN and LIN) 3.3V capability  Schmitt triggered logic inputs with internal pulldown  Under Voltage Lockout (UVLO) for high and low-side drivers  Extended temperature range: -40°C to +125°C The LF21904N is a high voltage, high speed gate driver capable of driving N-channel MOSFET’s and IGBTs in a halfbridge configuration. The high voltage technology enables the LF21904N’s high side to switch to 600V in a bootstrap operation under high dV/dt conditions. LF21904N logic inputs are compatible with standard TTL and CMOS levels (down to 3.3V) to interface easily with controlling devices. The driver outputs feature high pulse current buffers designed for minimum driver cross conduction. LF21904N is offered in the 14-pin SOIC and operates over the extended temperature range of -40°C to +125°C. Applications  Motor Controls  DC-DC Converters  AC-DC Inverters  Class D Power Amplifiers SOIC(N)-14 Typical Application Ordering Information Up to 600V LF21904N VCC VCC HIN HIN LIN LIN VS VSS LO VB HO Year Year Week Week Part # Package Pack / Qty Mark LF21904NTR SOIC(N)-14 T&R / 2500 LF21904N YYWW Lot ID TO LOAD COM R4 DS-LF21904N-R01 1 LF21904N High-Side / Low-Side Gate Driver 1 Specifications 1.1 Pin Diagrams O 14 NC 2 13 VB VSS 3 12 HO NC 4 11 VS COM 5 10 NC LO 6 9 NC VCC 7 8 NC HIN 1 LIN Top View: SOIC(N)-14 LF21904N 1.2 Pin Descriptions Pin # Pin Name Pin Type Description 1 HIN Input Logic input for high-side gate driver output, in phase with HO 2 LIN Input Logic input for low-side gate driver output, in phase with LO 3 VSS Power Logic Ground 5 COM Power Low-side and logic return 6 LO Output Low-side gate drive output 7 VCC Power Low-side and logic fixed supply 11 VS Power High-side floating supply return 12 HO Output High-side gate driver output 13 VB Power High-side floating supply 4, 8, 9 , 10, 14 NC No Connect Not connected internally DS-LF21904N-R01 2 LF21904N High-Side / Low-Side Gate Driver 1.3 Absolute Maximum Ratings Parameter Symbol Min Max Unit High side floating supply voltage VB -0.3 +624 V High side floating supply offset voltage VS VB-24 VB+0.3 V Logic Supply offset voltage VSS VCC -24 VCC+0.3 V High side floating output voltage VHO VS-0.3 VB+0.3 V Offset supply voltage transient dVS/dt 50 V/ns Low side fixed supply voltage VCC -0.3 +24 V Low side output voltage VLO -0.3 VCC+0.3 V Logic input voltage (HIN and LIN ) VIN VSS-0.3 VCC+0.3 V Package power dissipation PD -- 1 W Junction Operating Temperature TJ -- +150 o Storage Temperature TSTG -55 +150 o -- C C Unless otherwise specified all voltages are referenced to COM . All electrical ratings are at TA= 25 oC Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 1.4 Thermal Characteristics Parameter Junction to ambient Symbol Rating 0JA 120 Unit C/W o When mounted on a standard JEDEC 2-layer FR-4 board - JESD51-3 DS-LF21904N-R01 3 LF21904N High-Side / Low-Side Gate Driver 1.5 Recommended Operating Conditions Parameter Symbol Min Max High side floating supply absolute voltage VB VS + 10 VS + 20 High side floating supply offset voltage VS NOTE1 600 Logic ground VSS -5 5 High side floating output voltage VHO VS VB Low side fixed supply voltage VCC 10 20 Low side output voltage VLO 0 VCC Logic input voltage (HIN and LIN) VIN VSS VSS+5 Ambient temperature TA -40 125 Unit V °C Unless otherwise specified all voltages are referenced to COM NOTE1 High-side driver remains operational for VS transients down to -5V DS-LF21904N-R01 4 LF21904N High-Side / Low-Side Gate Driver 1.6 DC Electrical Characteristics Vcc= VBS = 15V, TA = 25 °C and VSS=VCOM = 0V , unless otherwise specified. The VIN and IIN parameters are applicable to both logic input pins: HIN and LIN. The VO and IO parameters are applicable to the respective output pins: HO and LO and are referenced to COM Parameter Symbol Conditions MIn Typ Max 2.5 -- -- -- -- 0.8 -- 0.3 -- Logic “1” input voltage VIH VCC = 10V to 20V Logic “0” input voltage VIL NOTE2 Logic input voltage hysteresis VIN(HYS) High level output voltage, VBIAS - VO VOH IO = 0mA -- -- 0.1 Low level output voltage, VO VOL IO = 0mA -- -- 0.035 Offset supply leakage current ILK VB = VS = 600V -- -- 50 Quiescent VBS supply current IBSQ VIN = 0V or 5V -- 45 80 Quiescent VCC supply current ICCQ VIN = 0V or 5V -- 75 200 Logic “1” input bias current IIN+ VIN = 5V -- 25 50 Logic “0” input bias current IIN- VIN = 0V 1.0 2.0 VBS UVLO off positive going threshold VBSUV+ -- 7.6 8.4 9.8 VBS UVLO enable negative going threshold VBSUV- -- 6.9 7.8 9.0 VBS UVLO hysteresis VBSUV(HYS) -- -- VCC UVLO off positive going threshold VCCUV+ -- 7.6 8.4 9.8 VCC UVLO enable negative going threshold VBSUV- -- 6.9 7.8 9.0 VCC UVLO hysteresis VCCUV(HYS) -- Output high short circuit pulsed current IO+ VO = 0V, t ≤ 10 µs 3.5 4.5 -- Output low short circuit pulsed current IO- VO = 15V, t ≤ 10 µs 3.5 4.5 -- -- 0.6 Unit V mA -V -- 0.6 -A NOTE2 For optimal operation, it is highly recommended the input pulse ( to HIN and LIN ) should have a minimum amplitude of 2.5V with a minimum pulse width of 280ns. DS-LF21904N-R01 5 LF21904N High-Side / Low-Side Gate Driver 1.7 AC Electrical Characteristics VCC= VBS=15V, VSS=VCOM = 0V, CL = 1000pF, and TA = 25 °C , unless otherwise specified. Parameter Symbol Conditions Min Typ Max Turn-on propogation delay ton VS = 0V -- 140 200 Turn-off propogation delay toff VS = 0V -- 140 200 Propagation delay matching, HO & LO turn on/off tDM -- -- 0 50 Turn-on rise time tr -- 25 50 Turn-off fall time tf -- 20 45 VS = 0V Unit ns 2 Functional Description 2.1 Functional Block Diagram VCC Vcc LF21904N VB UV Detect UV Detect R HIN Pulse Gen HV Level Shift Q HO R S High Voltage Well Vs VCC LIN VSS/COM Level Shift LO Delay VSS COM DS-LF21904N-R01 6 LF21904N High-Side / Low-Side Gate Driver 2.2 Timing Waveforms Figure 1. Input / Output Logic Diagram Figure 2. Propagation Delay Matching HIN LIN HIN LIN 50% 50% LO HO 10% tDM HO LO tDM 90% LO HO Delay Matching : tDM OFF = |tOFF LO - tOFF HO| tDM ON = |tON LO - tON HO| Figure 3. Input-to-Output Delay Timing Diagram HIN LIN 50% tON HO LO 50% tr tOFF 90% 90% 10% tf 10% DS-LF21904N-R01 7 LF21904N High-Side / Low-Side Gate Driver 2.3 Application Information RB1 12V CV1 CV2 VCC 400V from PFC DB1 LF21904N VB HIN HO LIN VS VSS LO MCU/ Control CB1 CV4 CV3 VCC CHV2 DRG1 CHV1 Q1 RG1 CG1 RRG2 DRG2 Q2 COM RB2 RRG1 RG2 CG2 DB2 LF21904N VBB HIN HO LIN VS VSS LO COM CB2 RRG3 CHV3 DRG3 Q3 RG3 CG3 RRG4 DRG4 Q4 RG4 CG4 Figure 4. Primary side of Full Bridge converter using LF21904N  RRG1, RRG2, RRG3, and RRG4 values are typically between 0Ω and 10Ω, exact value decided by MOSFET junction capacitance and drive current of gate driver; 10Ω is used in this example.  It is highly recommended that the input pulse (to HIN and LIN) should have a minimum amplitude of 2.5V (for VCC=15V) with a minimum pulse width of 280ns.  RG1, RG2, RG3, and RG4 values are typically between 20Ω and 100Ω, exact value decided by MOSFET junction capacitance and drive current of gate driver; 50Ω is used in this example.  RB1 and RB2 value is typically between 3Ω and 20Ω, exact value depending on bootstrap capacitor value and amount of current limiting required for bootstrap capacitor charging; 10Ω is used in this example. Also DB1 and DB2 should be an ultra fast diode of 1A rating minimum and voltage rating greater than system operating voltage. DS-LF21904N-R01 8 LF21904N High-Side / Low-Side Gate Driver 3 Performance Data Unless otherwise noted VCC= VBS =15V, TA = 25 °C, VSS=VCOM = 0V and values are typical. Figure 5. Turn-on Propagation Delay vs. Supply Voltage Figure 6. Turn-on Propagation Delay vs. Temperature 150 140 130 tON High Side 120 tON Low Side Turn On Propagation Delay (ns) Turn On Propagation Delay (ns) 150 110 100 90 80 70 60 50 10 12 14 16 18 140 130 120 110 100 90 80 tON High Side 70 tON Low Side 60 50 20 -40 -20 0 Supply Voltage (V) 140 140 Turn Off Propagation Delay (ns) Turn Off Propagation Delay (ns) 150 130 120 110 100 90 70 tOFF Low Side 60 50 10 12 14 16 Supply Voltage (V) 60 80 100 120 Figure 8. Turn-off Propagation Delay vs. Temperature 150 tOFF High Side 40 Temperature (°C) Figure 7. Turn-off Propagation Delay vs. Supply Voltage 80 20 18 20 130 120 110 100 90 80 tOFF High Side 70 tOFF Low Side 60 50 -40 -20 0 20 40 60 80 100 120 Temperature (°C) DS-LF21904N-R01 9 LF21904N High-Side / Low-Side Gate Driver Figure 10. Rise Time vs. Temperature Figure 9. Rise Time vs. Supply Voltage 40 35 tr High Side 35 30 tr Low Side 30 Rise Time (ns) Rise Time (ns) 40 25 20 15 tr High Side tr Low Side 25 20 15 10 10 5 5 0 0 10 12 14 16 18 -40 20 -20 0 20 40 60 Supply Voltage (V) Temperature (°C) Figure 11. Fall Time vs. Supply Voltage Figure 12. Fall Time vs. Temperature 100 120 80 100 120 40 40 35 35 tf High Side 30 tf Low Side 25 20 15 20 15 10 5 5 0 12 14 16 Supply Voltage (V) 18 20 tf Low Side 25 10 10 tf High Side 30 Fall Time (ns) Fall Time (ns) 80 0 -40 -20 0 20 40 60 Temperature (°C) DS-LF21904N-R01 10 LF21904N High-Side / Low-Side Gate Driver Figure 14. Delay Matching vs. Temperature Figure 13. Delay Matching vs. Supply Voltage 5.0 4.5 tDM ON 4.5 4.0 tDM OFF 4.0 Delay Matching (ns) Delay Matching (ns) 5.0 3.5 3.0 2.5 2.0 3.5 3.0 2.5 2.0 1.5 tDM ON 1.0 1.0 tDM OFF 0.5 0.5 1.5 0.0 0.0 10 12 14 16 18 -40 -20 20 0 10.0 10.0 9.0 9.0 8.0 8.0 IO+ High Side IO+ Low Side 5.0 4.0 3.0 2.0 1.0 0.0 10 12 14 16 Supply Voltage (V) 60 80 100 120 Figure 16. Output Source Current vs. Temperature Output Source Current (A) Output Source Current (A) Figure 15. Output Source Current vs. Supply Voltage 6.0 40 Temperature (°C) Supply Voltage (V) 7.0 20 18 20 IO+ High Side IO+ Low Side 7.0 6.0 5.0 4.0 3.0 2.0 1.0 0.0 -40 -20 0 20 40 60 80 100 120 Temperature (°C) DS-LF21904N-R01 11 LF21904N High-Side / Low-Side Gate Driver Figure 18. Output Sink Current vs. Temperature Figure 17. Output Sink Current vs. Supply Voltage 10.0 10.0 9.0 9.0 IO- High Side 7.0 Output Sink Current (A) Output Sink Current (A) 8.0 IO- Low Side 6.0 5.0 4.0 3.0 2.0 1.0 IO- High Side 8.0 IO- Low Side 7.0 6.0 5.0 4.0 3.0 2.0 1.0 0.0 10 12 14 16 18 20 0.0 -40 -20 0 20 Supply Voltage (V) 60 80 100 120 Temperature (°C) Figure 19. Quiescent Current vs. Supply Voltage Figure 20. Quiescent Current vs. Temperature 200 200 180 160 IBSq 140 ICCq 180 Quiescent Current (µ µ A) Quiescent Current (µ µA) 40 120 100 80 60 40 20 160 IBSq 140 ICCq 120 100 80 60 40 20 0 10 12 14 16 Supply Voltage (V) 18 20 0 -40 -20 0 20 40 60 80 100 120 Temperature (°C) DS-LF21904N-R01 12 LF21904N High-Side / Low-Side Gate Driver Figure 22. Logic 1 Input Voltage vs. Temperature 2.0 2.0 1.8 1.8 1.6 1.6 Logic 1 Input Voltage (V) Logic 1 Input Voltage (V) Figure 21. Logic 1 Input Voltage vs. Supply Voltage 1.4 1.2 1.0 0.8 VIH High Side 0.6 VIH Low Side 0.4 0.2 1.4 1.2 1.0 0.8 VIH High Side 0.6 VIH Low Side 0.4 0.2 0.0 10 12 14 16 18 0.0 20 -40 -20 0 Supply Voltage (V) 1.8 1.8 1.6 1.6 Logic 0 Input Voltage (V) Logic 0 Input Voltage (V) 2.0 1.4 1.2 1.0 0.6 VIL Low Side 0.4 1.0 0.8 VIL High Side 0.6 VIL Low Side 0.4 0.0 0.0 14 16 Supply Voltage (V) 100 120 1.2 0.2 12 80 1.4 0.2 10 60 Figure 24. Logic 0 Input Voltage vs. Temperature 2.0 VIL High Side 40 Temperature (°C) Figure 23. Logic 0 Input Voltage vs. Supply Voltage 0.8 20 18 20 -40 -20 0 20 40 60 80 100 120 Temperature (°C) DS-LF21904N-R01 13 LF21904N High-Side / Low-Side Gate Driver Figure 26. VBS UVLO vs. Temperature 16 14 14 12 12 VBS UVLO (V) 16 10 8 6 VCCUV+ 4 10 8 6 VBSUV+ 4 VCCUV- 2 VBSUV- 2 0 0 -40 -20 0 20 40 60 80 100 120 -40 -20 0 20 40 60 80 100 120 Temperature (°C) Temperature (°C) Figure 27. Offset Supply Leakage Current Temperature VB = VS = 600V 20.0 Offset Supply Leakage Current (µ µA) VCC UVLO (V) Figure 25. VCC UVLO vs. Temperature 18.0 16.0 14.0 12.0 10.0 8.0 6.0 4.0 2.0 0.0 -40 -20 0 20 40 60 80 100 120 Temperature (°C) DS-LF21904N-R01 14 LF21904N High-Side / Low-Side Gate Driver 4 Manufacturing Information 4.1 Moisture Sensitivity All plastic encapsulated semiconductor packages are susceptible to moisture ingression. Littelfuse Integrated Circuits Division classified all of its plastic encapsulated devices for moisture sensitivity according to the latest version of the joint industry standard, IPC/JEDEC J-STD-020, J-STD-020 in force at the time of product evaluation. We test all of our products to the maximum conditions set forth in the standard, and guarantee proper operation of our devices when handled according to the limitations and information in that standard as well as to any limitations set forth in the information or standards referenced below. Failure to adhere to the warnings or limitations as established by the listed specifications could result in reduced product performance, reduction of operable life, and/or reduction of overall reliability. This product carries a Moisture Sensitivity Level (MSL) rating as shown below, and should be handled according to the requirements of the latest version of the joint industry standard IPC/JEDEC J-STD-033. Device Moisture Sensitivity Level (MSL) Classification LF21904N MSL3 4.2 ESD Sensitivity This product is ESD Sensitive, Sensitive and should be handled according to the industry standard JESD-625 JESD-625. 4.3 Reflow Profile Provided in the table below is the IPC/JEDEC J-STD-020 Classification Temperature (TC) and the maximum dwell time the body temperature of these surface mount devices may be (TC - 5)°C or greater. The Classification Temperature sets the Maximum Body Temperature allowed for these devices during reflow soldering processes. Device Classification Temperature(Tc) Dwell Time (tp) Max Reflow Cycles LF21904N 260oC 30 seconds 3 DS-LF21904N-R01 15 LF21904N High-Side / Low-Side Gate Driver 4.4 Board Wash Littelfuse recommends the use of no-clean flux formulations. Board washing to reduce or remove flux residue following the solder reflow process is acceptable provided proper precautions are taken to prevent damage to the device. These precautions include but are not limited to: using a low pressure wash and providing a follow up bake cycle sufficient to remove any moisture trapped within the device due to the washing process. Due to the variability of the wash parameters used to clean the board, determination of the bake temperature and duration necessary to remove the moisture trapped within the package is the responsibility of the user (assembler). Cleaning or drying methods that employ ultrasonic energy may damage the device and should not be used. Additionally, the device must not be exposed to halide flux or solvents. DS-LF21904N-R01 16 LF21904N High-Side / Low-Side Gate Driver 5 Package Dimensions: SOIC(N)-14 0.155 +0.002 -0.005 0.236 0.035 ± 0.005 0.016 0.339 0.064 +0.004 -0.003 +0.005 -0.002 +0.004 -0.002 7º TYP 0.050 TYP 0.006 +0.004 -0.002 +0.008 -0.006 7º TYP 0.013 x 45º TYP 0.040 ± 0.010 Recommended PCB Land Pattern All radius 0.0075±0.0025 Gage Plane 0.010 BSC Base Plane Seating Plane 0º / 8º 0.004 0.1372 0.0684 0.008 +0.0018 -0.0005 0.025 0.0264 0.05 +0.010 -0.009 NOTES: 1. Controlling dimension: inches 2. Molded package dimensions do not include mold flash or protrusion. Mold flash or protrusion shall not exceed 6 mils per side. 3. Formed leads shall be planar with respect to one another within 4 mils referenced from the seating plane. 4. The bottom package lead side may be bigger than the top package lead side by 4 mils (2 mils per side). Bottom package dimension shall follow dimension stated in this drawing. 5. This drawing conforms to JEDEC REF. MS-012 Rev. E. Important Notice Disclaimer Notice - Information furnished is believed to be accurate and reliable. However, users should independently evaluate the suitability of and test each product selected for their own applications. Littelfuse products are not designed for, and may not be used in, all applications. Read complete Disclaimer Notice at https://www.littelfuse.com/disclaimer-electronics. Specification: DS-LF21904N-R01 ©Copyright 2021, Littelfuse, Inc. All rights reserved. Printed in USA. 09 / 30 / 2021 DS-LF21904N-R01 17