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MCMA120UJ1800ED

MCMA120UJ1800ED

  • 厂商:

    IXYS(艾赛斯)

  • 封装:

    E2

  • 描述:

    SCR Module 1800V Bridge, 3-Phase - SCRs/Diodes Chassis Mount E2

  • 数据手册
  • 价格&库存
MCMA120UJ1800ED 数据手册
MCMA120UJ1800ED 3~ Rectifier Thyristor Module VRRM = 1800 V I DAV = 120 A I FSM = 500 A 3~ Rectifier Bridge, half-controlled (high-side) + free wheeling Diode Part number MCMA120UJ1800ED Backside: isolated 40 36 29 41 38 30 24 / 25 45 / 46 6/7 10 / 11 14 / 15 48 / 49 Pin 3 & 34 n.c. 21 / 22 Features / Advantages: Applications: Package: E2-Pack ● Thyristor/Standard Rectifier for line frequency ● Planar passivated chips ● Long-term stability ● Low forward voltage drop ● Leads suitable for PC board soldering ● Copper base plate with Direct Copper Bonded Al2O3-ceramic ● Improved temperature and power cycling ● Diode for main rectification ● For single and three phase bridge configurations ● Supplies for DC power equipment ● Input rectifiers for PWM inverter ● Battery DC power supplies ● Field supply for DC motors ● Isolation Voltage: 3600 V~ ● Industry standard outline ● RoHS compliant ● Soldering pins for PCB mounting ● Height: 17 mm ● Base plate: Copper internally DCB isolated ● Advanced power cycling ● Phase Change Material available Disclaimer Notice Information furnished is believed to be accurate and reliable. However, users should independently evaluate the suitability of and test each product selected for their own applications. Littelfuse products are not designed for, and may not be used in, all applications. Read complete Disclaimer Notice at www.littelfuse.com/disclaimer-electronics. IXYS reserves the right to change limits, conditions and dimensions. © 2020 IXYS all rights reserved Data according to IEC 60747and per semiconductor unless otherwise specified 20200128d MCMA120UJ1800ED Ratings Rectifier Conditions Symbol VRSM/DSM Definition max. non-repetitive reverse/forward blocking voltage TVJ = 25°C VRRM/DRM max. repetitive reverse/forward blocking voltage TVJ = 25°C 1800 I R/D reverse current, drain current VT forward voltage drop min. typ. VR/D = 1800 V TVJ = 25°C 50 µA TVJ = 125°C 10 mA IT = TVJ = 25°C 1.33 V 1.70 V 1.36 V IT = 40 A TVJ = 125 °C 40 A I T = 120 A TC = 80 °C bridge output current VT0 threshold voltage rT slope resistance R thJC thermal resistance junction to case rectangular RthCH thermal resistance case to heatsink total power dissipation I TSM max. forward surge current I²t value for fusing 1.88 V T VJ = 150 °C 120 A TVJ = 150 °C 0.83 V 13.6 mΩ d=⅓ for power loss calculation only Ptot V VR/D = 1800 V I T = 120 A I DAV max. Unit 1900 V 0.65 K/W 0.1 K/W TC = 25°C 190 W t = 10 ms; (50 Hz), sine TVJ = 45°C 500 A t = 8,3 ms; (60 Hz), sine VR = 0 V 540 A t = 10 ms; (50 Hz), sine TVJ = 150 °C 425 A t = 8,3 ms; (60 Hz), sine VR = 0 V 460 A t = 10 ms; (50 Hz), sine TVJ = 45°C 1.25 kA²s t = 8,3 ms; (60 Hz), sine VR = 0 V 1.22 kA²s t = 10 ms; (50 Hz), sine TVJ = 150 °C 905 A²s 880 A²s t = 8,3 ms; (60 Hz), sine VR = 0 V CJ junction capacitance VR = 400 V f = 1 MHz TVJ = 25°C PGM max. gate power dissipation t P = 30 µs T C = 150 °C 18 t P = 300 µs pF 10 W 5 W 0.5 W PGAV average gate power dissipation (di/dt) cr critical rate of rise of current TVJ = 150 °C; f = 50 Hz repetitive, IT = 120 A t P = 200 µs; di G /dt = 0.45 A/µs; (dv/dt)cr critical rate of rise of voltage V = ⅔ VDRM VGT gate trigger voltage VD = 6 V TVJ = 25 °C 1.4 TVJ = -40 °C 1.6 V I GT gate trigger current VD = 6 V TVJ = 25 °C 70 mA TVJ = -40 °C 150 mA VGD gate non-trigger voltage TVJ = 150°C 0.2 V I GD gate non-trigger current 5 mA IL latching current TVJ = 25 °C 150 mA I G = 0.45 A; V = ⅔ VDRM non-repet., I T = 100 A/µs 40 A 500 A/µs 1000 V/µs TVJ = 150°C R GK = ∞; method 1 (linear voltage rise) VD = ⅔ VDRM tp = 10 µs V IG = 0.45 A; di G /dt = 0.45 A/µs IH holding current VD = 6 V R GK = ∞ TVJ = 25 °C 100 mA t gd gate controlled delay time VD = ½ VDRM TVJ = 25 °C 2 µs tq turn-off time IG = 0.45 A; di G /dt = 0.45 A/µs VR = 100 V; I T = 40A; V = ⅔ VDRM TVJ =125 °C di/dt = 10 A/µs dv/dt = IXYS reserves the right to change limits, conditions and dimensions. © 2020 IXYS all rights reserved 500 µs 20 V/µs t p = 200 µs Data according to IEC 60747and per semiconductor unless otherwise specified 20200128d MCMA120UJ1800ED Package Ratings E2-Pack Symbol I RMS Definition Conditions RMS current per terminal min. TVJ virtual junction temperature T op operation temperature Tstg storage temperature -40 max. 50 Unit A -40 150 °C -40 125 °C 125 °C 176 Weight MD 3 mounting torque d Spp/App t = 1 minute 2D Barcode Ordering Number MCMA120UJ1800ED Equivalent Circuits for Simulation I V0 mm terminal to backside 12.0 mm 3600 V 3000 V R0 50/60 Hz, RMS; IISOL ≤ 1 mA M C M A 120 UJ 1800 ED UL Part Number Date Code Location Ordering Standard = = = = = = = = Marking on Product MCMA120UJ1800ED * on die level Module Thyristor (SCR) Thyristor (up to 1800V) Current Rating [A] 3~ Rectifier Bridge, half-controlled (high-side) + free wheeling Diode Reverse Voltage [V] E2-Pack Delivery Mode Box Quantity 6 Code No. 510125 T VJ = 150°C Thyristor V 0 max threshold voltage 0.83 V R0 max slope resistance * 10.5 mΩ IXYS reserves the right to change limits, conditions and dimensions. © 2020 IXYS all rights reserved Nm Part description XXXXXXXXXX yywwZ Logo 6 6.0 t = 1 second isolation voltage g terminal to terminal creepage distance on surface | striking distance through air d Spb/Apb VISOL typ. Data according to IEC 60747and per semiconductor unless otherwise specified 20200128d MCMA120UJ1800ED Outlines E2-Pack D A 17 ±0,5 20,6 ±0,5 3,5 ±0,5 Ø6 Vor der Montage typ. 100 µm konvex über 75 mm Before mounting typ. 100 µm convex over 75 mm Ø 2,5 -0,3 Ø 2,1 -0,3 1,5 +0,3 Detail C Detail D 0,8 ±0,2 15° ±1° 6 Detail A 0,8 ±0,05 1,2 ±0,05 93 ±0,2 65,55 69,36 24 47 23 15.24 11.43 11,43 0 48 22 49 21 50 4 5 6 7 8 9 7.62 7,62 11,43 11.43 20 10 11 12 13 14 15 16 17 18 19 46,50 50.31 3 31,26 35,07 0 2 19,83 1 61,74 65,55 Index 41,90 50,31 42,69 46 32 ±0,2 Ø 5,5 +0,1 - 0,3 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 45 11 45 ±0,2 35,07 23,64 27,45 79,2 C 107,5 ±0,3 Bemerkung / Note: - Nichttolerierte Maße nach / Measure without tolerances according DIN ISO 2768-T1-m - PCB-Lochmuster / PCB hole pattern: see pin position - Toleranz Pin-Position und PCB-Lochmuster / Tolerance of pin position and PCB hole pattern: - Montageanleitung / Mounting instruction: www.ixys.com Application note IXAN0024 0.1 Detail A: PCB-Montage / Mounting on PCB - Empfohlene, selbstschneidende Schraube / Recommended, self-tapping screw: EJOT PT® (Größe / size: K25) - Max. Schraubenlänge / Max. screw length: PCB-Dicke / thickness + 6 mm (max. Lochtiefe / hole depth) - Empfohlenes Drehmoment / Recommended mounting torque: 1.5 Nm 40 36 29 41 38 30 24 / 25 45 / 46 6/7 10 / 11 14 / 15 48 / 49 Pin 3 & 34 n.c. IXYS reserves the right to change limits, conditions and dimensions. © 2020 IXYS all rights reserved 21 / 22 Data according to IEC 60747and per semiconductor unless otherwise specified 20200128d MCMA120UJ1800ED Thyristor 120 104 500 VR = 0 V 50 Hz, 80% VRRM 100 400 80 IT ITSM TVJ = 125°C 60 [A] I 2t 300 150°C 103 TVJ = 45°C [A] TVJ = 45°C 2 [A s] 40 TVJ = 140°C 200 TVJ = 140°C 20 TVJ = 25°C 0 0.5 102 100 1.0 1.5 2.0 2.5 0.01 0.1 VT [V] 5 2 1 3 4 5 6 7 8 910 t [ms] Fig. 3 I t versus time (1-10 s) 100.0 3 2 2 Fig. 2 Surge overload current ITSM: crest value, t: duration 1: IGD, TVJ = 140°C 2: IGT, TVJ = 25°C 3: IGT, TVJ = -40°C VG 1 t [s] Fig. 1 Forward characteristics 10 1 100 dc = 1 0.5 0.4 0.33 0.17 0.08 80 6 TVJ = 25°C 10.0 4 ITAVM 60 tgd 1 [V] lim. [µs] 1.0 [A] 40 typ. 20 4: PGAV = 0.5 W 5: PGM = 5 W 6: PGM = 10 W 0.1 1 10 100 1000 0.1 0.01 10000 0 0.10 60 40 80 120 160 Tcase [°C] Fig. 6 Max. forward current at case temperature 0.80 dc = 1 0.5 0.4 0.33 0.17 0.08 Ptot 0 Fig. 5 Gate controlled delay time tgd Fig. 4 Gate voltage & gate current 80 10.00 IG [A] IG [mA] 100 1.00 0.70 RthHA 0.2 0.4 0.6 0.8 1.0 2.0 [W] 0.60 0.50 ZthJC 0.40 i Rthi (K/W) 1 0.0100 2 0.0500 3 0.1400 4 0.3000 5 0.1500 [K/W] 40 0.30 0.20 20 0.10 ti (s) 0.0004 0.0090 0.0140 0.0500 0.3600 0.00 0 0 20 40 IT(AV) [A] 0 40 80 120 160 Fig. 7a Power dissipation versus direct output current Fig. 7b and ambient temperature IXYS reserves the right to change limits, conditions and dimensions. © 2020 IXYS all rights reserved 1 10 100 1000 10000 t [ms] Tamb [°C] Fig. 8 Transient thermal impedance junction to case Data according to IEC 60747and per semiconductor unless otherwise specified 20200128d
MCMA120UJ1800ED 价格&库存

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