MX844RTR

IXYS Features: • • • • • • • • • • • MX844 12 BIT, MULTI-CHANNEL POWER & TEMP SENSOR FOR MONITOR & CONTROL SYSTEMS Description: The MX844 is a fully integrated subsystem that measures temperature plus differential current and voltage. An internal temperature sensor measures ambient temperature with 2.5°C accuracy. Current and voltage measurements are made differentially through a four input multiplexer connected to a programmable gain fully differential sense amplifier. The differential sense amplifier is optimized to measure very small positive or negative voltages near ground for low side bi-directional sensing. A dual slope ADC converts the temperature sensor or sense amplifier outputs to a 12-bit digital word that includes 3 ½ digits plus sign. The input multiplexer channel and programmable gain amplifier range may be changed between ADC conversions. An on-chip voltage regulator enables the MX844 to operate over a wide input voltage range of 4.5 to 40 volts. Controller interrupt or over-voltage/over-current signals may be generated by a pair of 12-bit digital comparators configured as a window comparator or simple threshold detection function. The serial port supports standard 4-wire synchronous serial data, or asynchronous serial “talk-only” data, and is compatible with most 3.3V and 5V microcontrollers. Wide Input Supply Range: 4.5V to 40V Programmable gain differential amplifier (±10mV, ±25mV, ±50mV, ±250mV ranges) 4 channel differential input multiplexer (3 input channels plus ground) Integrated 12-bit ADC Serial data output (SDO) with data ready pin Fine calibration of Full Scale Range (FSR) using VTRIM pin Bi-directional Current Sense Internal temperature sensor with 0.2°C resolution Compatible with 3.3V and 5V Microcontrollers Operating Temperature Range: -40°C to 85°C 5mm x 5mm, QFN-28 RoHS Package Ordering Information Part No. Description MX844R QFN-28 Tube MX844RTR QFN-28 Tape & Reel DRV R IN V IN R e gulat or IN 1 P IN 2 P IN 3 P VCC Qt y 73 2500 BUF CAZ C IN T IZ R e g i s te r s ADC C o n t ro l S e ri a l I /O IN 1 N IN 2 N IN 3 N GND V TR IM T e m p e ra t u r e Se n so r D iv id e r M1 SDI SDO SCK CS AOUT DRDY C MP X1 X2 SYN C Typical Application: Charging system MX844 Load MX844 IN 93C46 eeprom Batt T Load Rectifier uP IN IN IN IN uP Battery charge/discharge current, voltage, temperature MX844 Drawing No. 084423 1 Isolated voltage, current, and temperature sensing 08/25/06 www.claremicronix.com MX844 Absolute Maximum Ratings (Voltages with respect to GND=0V) Parameter VIN, RIN, DRV All Other Pins Storage Temperature Operating Ambient Temp Operating Junction Temp Thermal Resistance (Junction to Ambient) ESD Warning Symbol Min Max 45 6 150 85 100 Unit V V Co Co Co Co/W IXYS TSTG TA TJ RθJA -55 -40 Absolute Maximum Ratings are stress ratings. Stresses in excess of these ratings can cause permanent damage to the device. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this data sheet is not implied. Exposure of the device to the absolute maximum ratings for an extended period may degrade the device and affect its reliability. 110 Typical ESD (electrostatic discharge) sensitive device. Although the MX844 features proprietary ESD protection circuitry, permanent damage may be sustained if subjected to high energy electrostatic discharges. Proper ESD precautions are recommended to avoid performance degradation or loss of functionality. DC Electrical Characteristics Parameter VCC line regulation VCC load regulation VIN supply current Input bias current Input bias current offset Input offset voltage input common mode ADC gain error XTAL = 8MHz, T=25C, Cint = Caz = 10nF, Rint = 68K, TA = +25 C o Condition VIN = 6 to 45V, no external load VIN = 6V, 15 mA external load VIN = 6V selected input channel differential, input=0, +/-10mV scale all input channels +/-250mV range, at 90% input +/-50mV range +/-25mV range +/-10mV range Min 4.8 4.7 Typ Max 5.3 4.5 40 4 0.4 300 0.5 0.25 0.25 0.25 Unit V V mA nA nA mV mV % % % % lsb rms lsb o o 3.2 10 -4 -0.4 -300 -0.5 -1.25 -1.5 -1 -3 -2.5 0.2 +/-0.5 1.5 20 ADC linearity ADC noise Temperature error Temperature slope Temperature offset Power on reset duration Digital output low Digital output high Digital input low Digital input high Digital input current Clock frequency Clock input low Clock input high Clock input current MX844 Drawing No. 084423 at half full scale 3 2.5 C C/lsb lsb uS Zero oC I = 20mA I = 6mA VCC-0.5 GND 2 terminal X1 terminal X1 terminal X1 terminal X1 2 3310 100 0.5 0.5 VCC ±1 0.1 GND 2 20 0.4 VCC 50 V V V V uA MHz V V uA 08/25/06 www.claremicronix.com MX844 PIN DESCRIPTION Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Pin Name GND VTRIM BUF IZ CAZ CINT IN1P IN1N IN2P IN2N IN3P IN3N M1 SYNC DRDY SCK SDO SDI CS X1 X2 AOUT CMP VCC2 VCC VIN RIN DRV Description Ground Optional Full Scale Trim Input Integrating Resistor Output Integrator Zero Output Auto Zero Capacitor Input Integrator Capacitor Input Input Channel 1 Positive Input Channel 1 Negative Input Channel 2 Positive Input Channel 2 Negative Input Channel 3 Positive Input Channel 3 Negative Divisor Mode Input A/D Converter Reset Input A/D Converter Data Ready Output (Active Low) Serial Clock Input Serial Data Output Serial Data Input Serial Chip Select (Active Low) Xtal 1 Input Xtal 2 Output Asynchronous Data Output Comparator Output Must Be Connected to Vcc Regulator Output / Logic Supply Input Regulator Voltage Input Regulator Internal MOSFET Gate Regulator External PNP Base Drive IXYS MX844 Drawing No. 084423 3 08/25/06 www.claremicronix.com MX844 APPLICATION OPERATING MODE IXYS At the end of the power-on reset period, pin CS is sensed to determine the operating mode. Placing an external resistor to VCC on pin CS will cause the MX844 to enter the slave mode. In this mode the synchronous serial I/O port can be connected to a companion microcontroller for full control of the MX844 from the microcontroller. If a resistor to GND is connected to CS, then the MX844 enters the master mode at power-up and fetches commands from a 93C46 serial EEPROM operating in the 64 by 16 mode. In this mode, the MX844 operates as the master and sends clock, data, and select to the EEPROM and reads back the EEPROM data. This mode is useful when the MX844 operates as a stand-alone data acquisition system with a fixed pattern of measurement scanning. To facilitate electrically isolated measurements the data can be sent to a computer's serial port using only one wire connected through a single opto-isolator. If, neither an EEPROM or microcontroller are connected to the MX844, and CS is connected to VCC, operation defaults to that of all zeroes in the control register (ADC clock = input clock / 8, input channel IN1, +/- 50mV range). The asynchronous data output has a valid stream of measurement information. FUNCTIONAL DESCRIPTION Voltage Regulator There are three methods of powering the MX844. 1) An external 4.5 to 5.5V supply is connected to VCC, VCC2, and VIN. Pins DRV and RIN are noconnect or connected together. 2) VIN is connected to a 6 to 40V supply. DRV is connected to RIN, thus utilizing the internal pass element. 3) VIN is connected to a 6 to 40V supply. An external PNP transistor such as the MMBTA56 or BCX53 is used for the pass element. The PNP transistor's emitter, base, and collector are connected to pins VIN, DRV, VCC respectively. RIN must be connected to VIN. Power-On Reset The MX844 contains a power-on reset circuit that resets all the internal flip-flops and initializes the internal registers to zero. The reset circuit will also generate a reset condition if the voltage at pin VCC drops to approximately 3.8V. Oscillator The oscillator configuration consists of a crystal/resonator connected between pins X1 and X2 and a capacitor to GND on both pins. The capacitor value depends on the crystal/resonator but is usually between 15 and 27pF. Alternatively, an external clock may be input to pin X1, with X2 floating. Nominal DC self-bias at pin X1 is 800mV. In either case the clock is internally AC coupled, therefore clock rates below 100KHz are not recommended. Temperature Sensor The internal temperature sensor is selected for measurement by setting the control register bits for a full scale of +/-250mV and setting the unipolar bit. The temperature value read from the ADC consists of an offset value plus the slope. To convert to a standard temperature scale it is necessary to subtract the constant offset and then multiply by a constant that matches the standard scale desired. Self-heating of the internal temperature sensor will occur due to the device power dissipation. The maximum heating will occur when the internal pass element is used in conjunction with a high supply voltage. MX844 Drawing No. 084423 4 08/25/06 www.claremicronix.com MX844 IXYS Analog/Digital Converter Selection of the input channel and the full scale range is accomplished by writing 5 bits in the control register. An additional 3 bits in the control register in combination with the M1 pin setup the internal clock dividers. The ADC is a bipolar-input dual slope type with clock period tAD equal to a multiple of the clock period at pin X1 (tClock). The ADC conversion time consists of 1024 * tAD of auto-zero, 1024 * tAD of input integration, and 2048 * tAD of reference integration. The result of the analog to digital conversion can be read using the serial I/O port and is also transmitted on pin AOUT in an asynchronous serial format. The DRDY pin transitions low at the end of the reference integration period to indicate that data is stable and may be read through the synchronous serial I/O. The data becomes not valid when DRDY returns high. The status of DRDY is also available in bit 7 of the ADC_1 register. The SYNC pin is connected to GND to enable free-running ADC conversions. Alternatively, if SYNC transitions high, the ADC is immediately driven to the start of the auto-zero time. When SYNC is returned to a logic low, the next rising edge at pin X2 will start the ADC timing. The input channel and full scale range may be changed in between ADC conversions, however it is recommended that such commands be written into the MX844 as soon as possible after pin DRDY transitions low. This allows the maximum settling time prior to the next ADC conversion. ADC clock # 0 1023 1024 auto-zero 2047 2048 reference integrate 4095 0 1023 1024 next auto-zero 2047 2048 input integrate SYNC DRDY (active low) CMP (active low) AOUT 6 data bits DRDY and CMP cleared if ADC_2 register is read 6 data bits CMP is the digital compare output that is described later. AOUT is the asynchronous serial output of the ADC. The ADC output code is offset-binary. An example of the coding is shown here for the +/-50mV range and the corresponding unipolar range of 0 to 100mV: Bipolar input 50mV 0 + 1/2 LSB 0 - 1/2 LSB -50mV Unipolar input 100mV 50mV + 1/2 LSB 50mV - 1/2 LSB 0 Binary Output (D11:D0) 111111111111 100000000000 011111111111 000000000000 Hexadecimal FFF 800 7FF 000 Two external components, Rin and Cint, should be chosen such that the value of Cint in pF is 4 to 7 * tAD and the time constant of Rint * Cint is 300 to 450 * tAD. The value of Rint should be between 47K and 220K ohm. For example, for t(AD) = 1.6 uS, a set of suitable values would be 56K ohm and 10nF (RC = 560uS, ratio = 350). The value of the auto-zero capacitor Caz is typically equal to Cint. VTRIM is either a no-connect pin or can be used to fine trim the ADC full scale by +/- 1%. The following circuit is recommended if fine trimming is desired: VCC 20K 1K GND MX844 Drawing No. 084423 5 08/25/06 www.claremicronix.com VTRIM MX844 Digital Comparator IXYS Two 12-bit registers form a window comparator of the ADC output data. The value of comparator1 must always be set to a value greater than comparator2. There are three cases to consider, depending on whether the comparator values are above or below 800h: 1) If the value of comparator1 is greater than 800h and the value of comparator2 is less than 800h, then CMP pulses when the ADC value is greater than or equal to comparator1, or less than or equal to comparator2. 2) If the value of comparator1 is greater than 800h and the value of comparator2 is greater than 800h, then CMP pulses when the ADC value is greater than or equal to comparator1, or less than comparator2. 3) If the value of comparator1 is less than 800h and the value of comparator2 is less than 800h, then CMP pulses when the ADC value is greater than comparator1, or less than or equal to comparator2. In all cases, CMP will go logic low at the same time as DRDY transitions low and CMP will return high when the ADC_2 register is read or after 2048 *tAD (see the ADC timing diagram). The status of CMP is also available in bit 6 of the ADC_1 register. In a typical application CMP would cause a controller interrupt, at which time the controller reads the actual ADC output that caused the interrupt (which clears the DRDY and CMP status bits) and takes appropriate action. Another application would be to connect CMP to over-current or over-voltage shutdown circuitry. ASYNCHRONOUS OUTPUT The ADC result is transmitted on pin AOUT in 8-bit, no parity asynchronous NRZ serial format. Two characters of 8 bits each are transmitted for each ADC conversion, with a start bit just prior to the data (see the figure below). D0 D1 D2 D3 D4 D5 n0 n1 D6 D7 D8 D9 D10 D11 n2 cr7 D[11:0] is the 12-bit result of the ADC conversion. Bit cr7 is the value of the control register bit 7. Bits n2, n1, n0 are automatically inserted which indicate the address of the serial EEPROM. These bits can be used by the receiver to identify which channel and range are being transmitted. The EEPROM address is reset to zero by the SYNC pin pulse. The "ANALOG/DIGITAL CONVERTER" section of this document shows the timing of the asynchronous output bytes relative to the conversion cycle. MX844 Drawing No. 084423 6 08/25/06 www.claremicronix.com MX844 Example internal divider settings and clock frequencies for standard baud rates: CR7:5 000 001 010 011 000 001 010 011 100 101 110 111 100 101 110 111 M1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 Baud divider 8*52 4*52 12*64 13*64 8*64 4*64 6*64 3*64 8*128 9*128 12*128 13*128 8*128 9*128 12*128 13*128 ADC divider 8 4 12 13 8 4 6 3 Clock (MHz) 12.0 6.0 11.059 12.0 14.746 14.746 11.059 11.059 baud rate 28.8K 28.8K 14.4K 14.4K 28.8K 57.6K 28.8K 57.6K 9600 9600 15 15 9600 9600 12.5 12.5 ADC conv/s 366 366 225 225 450 900 450 900 15 15 Clock (MHz) baud rate IXYS ADC conv/s 488 488 300 300 300 600 600 600 16.0 38.4K 8.0 38.4K 14.746 19.2K 16.0 19.2K 9.83 9.83 14.746 7.37 19.2K 38.4K 38.4K 38.4K 8*4*5 9.83 9*4*5 11.059 12*4*5 14.746 9600 13*4*5 16.0 9600 8*4*6 9.83 9*4*6 11.059 12*4*6 14.746 9600 13*4*6 16.0 9600 12.5 12.5 SYNCHRONOUS SERIAL I/O The MX844 (slave) can communicate with a microcomputer (master) via a three wire plus chip select serial interface. The control register, the two digital comparator values, and the ADC result are accessed by specifying a 3-bit address A[2:0]. Chip select CS, serial clock SCK, and serial data input SDI are output from the master controller to the MX844. Serial data output SDO is driven by the MX844 when selected by CS = 0. SDO is high impedance when CS = 1. SCK and SDI are don't care when CS = 1. SERIAL INTERFACE TIMING READ: 1.5 * tClock min tClock = the period of the X1 input clock CS SCK SDI RW = 0 1.2 * tClock min A2 A1 A0 SDO WRITE: SDI RW = 1 A2 A1 A0 B7 B6 B5 B4 B3 B2 B1 B0 2 * tClock max B7 B6 B5 B4 B3 B2 B1 B0 SCK minimum high or low time is 3 * tClock. SDO is high impedance until data read out, and then returns to high impedance due to the rising edge of CS. MX844 Drawing No. 084423 7 08/25/06 www.claremicronix.com MX844 REGISTER ADDRESS AND BIT ASSIGNMENT IXYS ADC Clock divisor M1 low M1 high 8 8 4 4 6 12 3 13 192 160 216 180 288 240 312 260 IN1 IN3 GND IN2 +/- 50 mV +/- 25 mV +/- 250 mV +/- 10 mV 0 to 100 mV 0 to 50 mV selects the internal temperature sensor 0 to 20 mV Baud rate divisor M1 low M1 high 512 416 256 208 384 768 192 832 1024 1024 1152 1152 1536 1536 1664 1664 All registers are read/write except for the two ADC result registers which are read only. The left hand column refers to the data bits shown as B7 through B0 on the synchronous serial I/O timing diagram. CONTROL REGISTER, address A[2:0] = 000 binary CR[7:5] Clock divisor bits 000 001 010 011 100 101 110 111 00 01 10 11 000 001 010 011 100 101 110 111 CR[4:3] Input channel select CR[2:0] Full scale select V(INxP) – V(INxN) COMP_1 REGISTER, A[2:0] = 001 binary 7:0 Eight least significant bits of comparator 1 COMP_2 REGISTER, A[2:0] = 010 binary 7:0 Eight least significant bits of comparator 2 COMP_MSN REGISTER, A[2:0] = 011 binary 7:4 3:0 Four most significant bits of comparator 1 Four most significant bits of comparator 2 MX844 Drawing No. 084423 8 08/25/06 www.claremicronix.com MX844 ADC_1 REGISTER, A[2:0] = 100 binary 7 DRDY status 0 = data ready 1 = data not ready 0 = ADC data outside the comparator window 1 = ADC data inside the comparator window IXYS CMP status 6 5 4 3 2 1 0 reserved reserved ADC data D11 ADC data D10 ADC data D9 ADC data D8 ADC_2 REGISTER, A[2:0] = 101 binary 7:0 ADC data D[7:0] Note: Reading this address sets the DRDY and CMP status bits to logic 1 and pins DRDY and CMP = high. EXTERNAL SERIAL EEPROM PROGRAMMING In this mode the MX844 auto-increments the EEPROM address from 0 up to 7 and then the address rolls back to 0. A single EEPROM word is read at the beginning of every ADC auto-zero period and is interpreted by the MX844 as a synchronous serial I/O write command. These commands control the scanning sequence of the ADC channels, the full scale ranges, and the internal dividers. The MX844 accesses the EEPROM as if it were a ROM and will not write or erase the EEPROM. In the master mode the first data bit serially read out of the EEPROM must always be a logic 1 which indicates a write (of the MX844 register). The second through fourth bits are the address field, followed by eight data bits. The last four bits of the EEPROM word are don't cares. One 16-bit word of the 93C46 serial EEPROM is used to hold one MX844 synchronous serial I/O instruction. Each pulse of SCK corresponds to one bit in the EEPROM. However, the data is aligned such that the MX844 R/W bit that occurs at the 5th SCK pulse of the serial interface timing is the MSB in the EEPROM word. The last 4 bits of the EEPROM word are always zero. For example, the instruction to write the byte 1Ah into the MX844 control register (IN2 +/-250mV scale) would be programmed into the EEPROM as the 16-bit quantity 81A0h. Entered into a typical programmer file editor in the leastsignificant-byte first format it would be the byte A0h followed by the byte 81h. Eight pairs of bytes can be specified in the programming file (EEPROM address 0 to 7). The MX844 will ignore the remaining contents of the EEPROM (address > 7). MX844 command: R/W A2 A1 A0 B7 B6 B5 B4 B3 B2 B1 B0 1 00 0 0 0 0 1101 0 8 1 0 0 0 0 0 A R/W A2 A1 A0 8 B7 B6 B5 B4 1 EEPROM programmer editor: B3 B2 B1 B0 A MX844 Drawing No. 084423 9 08/25/06 www.claremicronix.com MX844 Circuit Examples IXYS MX844 INTERNAL PASS ELEMENT, SERIAL EEPROM CONNECTION The two examples shown below are for illustration only, and are not complete schematics. The power dissipation will determine if the external pass element is required regardless of whether an eeprom or a microcontroller are connected. MX844 EXTERNAL PASS ELEMENT, MICROCONTROLLER CONNECTION MX844 Drawing No. 084423 10 08/25/06 www.claremicronix.com MX844 APPLICATION EXAMPLE - POWER MONITOR IXYS This design example illustrates the application of the MX844 as an AC line power monitor. In this design the MX844 operates as a serial bus master, reading instructions from an external serial EEPROM. Following application of power, the first 16-bit word read from the EEPROM is 0x8200 (using "C" notation to indicate a hexadecimal number) which in conjunction with the connection of terminal M1 to VCC, causes the MX844 to set it's internal dividers for 488 A/D samples per second and an asynchronous baud rate of 38.4 Kbaud when using an 8 MHz clock. The first measurement is made from input channel IN1 on the +/- 50 mV scale. For the power meter this is a measurement of the AC line current flowing through sense resistor R1. A value of 0.002 Ohm for R1 results in a +/- 25A current scale. The second instruction is 0x83A0, which results in a measurement from input channel IN2 on the +/- 250 mV scale. For the power meter this is a measurement of the AC line voltage through the voltage attenuator consisting of resistors R2, R3, and R4 which provide a full scale of +/- 407 V. The MX844 cycles through the first eight addresses of the EEPROM. Therefore the first two instruction codes are repeated three more times in order to continuously alternate between AC line voltage and current measurements. This is how the EEPROM contents would appear in a typical programmer buffer editor: 00 00 00 00 00 00 00 00 82 00 00 00 00 00 00 00 A0 00 00 00 00 00 00 00 83 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 82 00 00 00 00 00 00 00 A0 00 00 00 00 00 00 00 83 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 82 00 00 00 00 00 00 00 A0 00 00 00 00 00 00 00 83 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 82 00 00 00 00 00 00 00 A0 00 00 00 00 00 00 00 83 00 00 00 00 00 00 00 Note that the 16-bit word is broken up into two bytes with the least significant byte first. The power monitor is powered directly off the line using resistors R14 - R20, diodes D1 and D2, and capacitor C1 to produce an unregulated DC voltage for the MX844. Opto-isolator U3 provides isolation between the AC power line and the computer serial port. Dual transistors Q1 and Q2 and related circuitry amplify the photodiode signal into the required RS-232 signal for the computer serial port. Power for the photodiode amplifier is very small and is supplied by the serial port DTR and RTS terminals. By analyzing the data stream from the MX844 the computer software program can determine the RMS line voltage, the RMS line current, the RMS power consumed, and the power factor of the load. Each digitized sample is transmitted to the computer as two 8-bit "characters" in asynchronous RS-232 format. Embedded in the two characters are the 12 bits of data and a 3-bit EEPROM address. MX844 Drawing No. 084423 11 08/25/06 www.claremicronix.com MX844 The software performs the following tasks: 1) 2) 3) 4) IXYS Synchronize to the EEPROM address. Acquire 256 samples. Separate into 128 voltage readings and 128 current readings. Calculate the RMS value of the voltage and the current (standard deviation of the 128 data set). Apparent power is Vrms * Irms. 5) Perform "flat top" windowing and then FFT on the voltage to determine the whether the frequency is 60Hz or 50Hz. The FFT also gives an RMS amplitude value for the voltage. 6) Determine the voltage at the time of the current measurements by sine wave interpolation between each pair of voltage readings. 7) Calculate the real power using the 128 measured current values and the 128 interpolated voltage values. Also calculate the power factor. Program listing: /* /* /* /* /* /* This program reads alternating samples of voltage and current from the MX844 AOUT terminal which is connected to a PC com1 port with the demo board circuitry. This demo program directly accesses the PC's 16550 UART using inp() and outp() functions and therefore must be compiled and run in real mode (DOS box) under win98. */ */ */ */ */ */ #include #include #include void frier(double *, double *, int); int round(double); #define NMAX 256 double xd[NMAX+2]; double yd[NMAX+2]; double pd[NMAX+2]; FILE *inf; int lost, m, onez, twoz, rdata, i, j, w, d[4*NMAX]; int ad[NMAX], ad2[NMAX], n[NMAX], n2[NMAX]; long t; int np,imax; double rt2,ln10,min,max,fmax,k,pi,nbw,resHz,samHz; double wt, b, a, vrms, irms, pf, rp, cv; double ivsum, sum, ss, sumi, ssi, aw, av; float vscale, iscale; main(argc,argv) int argc; char *argv[]; { rt2 = sqrt(2); ln10 = log(10); pi = 4 * atan(1); np = 128; /* number of points in FFT time series */ /* use the following line for 12MHz clock with a divider of 8 or 6MHz clock with a divider of 4 */ /* samHz = 12e6/8/4096/2;*/ /* use the following line for 8MHz clock with a divider of 4 */ samHz = 8e6/4/4096/2; vscale = (0.250 / 2048) * 1629 ; /* 440K & 270 resistor divider */ iscale = (0.050 / 2048) / 0.002; /* 0.002 ohm shunt */ MX844 Drawing No. 084423 12 08/25/06 www.claremicronix.com MX844 /* setup the com1 port */ outp(0x3fb,0x83); /* 8 bits no parity, outp(0x3f9,0); /* upper divisor = 0 /*outp(0x3f8,4);*/ /* lower divisor = outp(0x3f8,3); /* lower divisor = 3 outp(0x3fc,1); /* DTR +V, RTS -V */ outp(0x3fb,3); /* DLAB = 0 */ /* open the output log file */ inf = fopen("meter.log","w"); /* initialize arrays */ for(i=0;i4); if(m != i % 8) lost = 1; } if (lost == 1) { printf("lost sync\n"); for(t=0;t6)+((0xc0 & d[4*i+1])>>4); n2[i] = ((0xc0 & d[4*i+2])>>6)+((0xc0 & d[4*i+3])>>4); } /* report voltage readings */ fprintf(inf,"Raw data: (n2,n1,n0) \n"); fprintf(inf,"Voltage:\n"); for(i=0;i