150-101N09A-00

DE150-101N09A RF Power MOSFET N-Channel Enhancement Mode Low Qg and Rg High dv/dt Nanosecond Switching Ideal for Class C, D, & E Applications Symbol Test Conditions Maximum Ratings VDSS TJ = 25°C to 150°C 100 V VDGR TJ = 25°C to 150°C; RGS = 1 MΩ 100 V VGS Continuous ±20 V VGSM Transient ±30 V ID25 Tc = 25°C 9.0 A IDM Tc = 25°C, pulse width limited by TJM 54 A IAR Tc = 25°C 14 A EAR Tc = 25°C 7.5 mJ IS ≤ IDM, di/dt ≤ 100A/µs, VDD ≤ VDSS, Tj ≤ 150°C, RG = 0.2Ω 5.5 V/ns dv/dt >200 V/ns 200 W 80 W 3.5 W RthJC 0.74 C/W RthJHS 1.50 C/W IS = 0 VDSS = 100 V ID25 = 9.0 A RDS(on) ≤ 0.16 Ω PDC = 200 W DRAIN PDC PDHS Tc = 25°C Derate 4.4W/°C above 25°C PDAMB Tc = 25°C Symbol Test Conditions TJ = 25°C unless otherwise specified Characteristic Values min. typ. VDSS VGS = 0 V, ID = 3 ma 100 VGS(th) VDS = VGS, ID = 4 ma 2 IGSS VGS = ±20 VDC, VDS = 0 IDSS VDS = 0.8 VDSS TJ = 25°C VGS = 0 TJ = 125°C RDS(on) VGS = 15 V, ID = 0.5ID25 Pulse test, t ≤ 300µS, duty cycle d ≤ 2% gfs VDS = 15 V, ID = 0.5ID25, pulse test 2.5 2.8 V ±100 nA 25 250 µA µA 0.16 Ω 3.0 S +175 175 TJM -55 Tstg Weight V -55 TJ TL max. 1.6mm(0.063 in) from case for 10 s °C °C +175 °C 300 °C 2 g GATE SG1 SG2 SD1 SD2 Features • Isolated Substrate − high isolation voltage (>2500V) − excellent thermal transfer − Increased temperature and power • • − − • • • cycling capability IXYS advanced low Qg process Low gate charge and capacitances easier to drive faster switching Low RDS(on) Very low insertion inductance (100MHz • Easy to mount—no insulators needed • High power density DE150-101N09A RF Power MOSFET Symbol Test Conditions Characteristic Values (TJ = 25°C unless otherwise specified) min. typ. max. 5 RG Ciss Coss VGS = 0 V, VDS = 0.8 VDSS(max), f = 1 MHz Crss Cstray Back Metal to any Pin Td(on) Ton Td(off) VGS = 15 V, VDS = 0.8 VDSS ID = 0.5 IDM RG = 0.2 Ω (External) Toff Qg(on) Qgs VGS = 10 V, VDS = 0.5 VDSS ID = 0.5 ID25 , Ig = 3 ma Qgd Source-Drain Diode (TJ = 25°C unless otherwise specified) Ω 700 pF 200 pF 30 pF 16 pF 4 ns 4 ns 4 ns 4 ns 22 nC 3.4 nC 9.1 nC Characteristic Values Symbol Test Conditions IS VGS = 0 V ISM Repetitive; pulse width limited by TJM VSD IF = IS, VGS = 0 V, Pulse test, t ≤ 300 µs, duty cycle ≤ 2% min. typ. max. 9.0 A 54 A 1.5 V 300 Trr ns CAUTION: Operation at or above the Maximum Ratings values may impact device reliability or cause permanent damage to the device. Information in this document is believed to be accurate and reliable. IXYSRF reserves the right to make changes to information published in this document at any time and without notice. For detailed device mounting and installation instructions, see the “Device Installation & Mounting Instructions” technical note on the IXYSRF web site at; http://www.ixysrf.com/pdf/switch_mode/appnotes/7de_series_mosfet_installation_instructions.pdf IXYS RF reserves the right to change limits, test conditions and dimensions. IXYS RF MOSFETS are covered by one or more of the following U.S. patents: 4,835,592 4,860,072 4,881,106 4,891,686 4,931,844 5,017,508 5,034,796 5,049,961 5,063,307 5,187,117 5,237,481 5,486,715 5,381,025 5,640,045 DE150-101N09A RF Power MOSFET Fig. 1 Fig. 2 Typical Transfer Characteristics Typical Output Characteristics VDS = 30V PW = 20µS 20 55 7V to 10V 50 ID, Drain Currnet (A) ID , Drain Current (A) 45 40 35 30 25 20 15 6.5V 15 6V 10 5.5V 5V 5 10 4.5V 5 4V 0 0 3.5 4.5 5.5 6.5 7.5 8.5 0 9.5 5 10 25 30 35 40 45 50 Fig. 4 Gate Charge vs. Gate-to-Source Voltage V DS = 50V ID = 4.5A Extended Typical Output Characteristics 55 14 50 12 45 ID , Drain Currnet (A) G ate-to-Source Voltage (V) 20 VDS, Drain-to-Source Voltage (V) VGS, Gate-to Source Voltage (V) Fig. 3 15 10 8 6 4 40 35 30 Top 10V 9V 8V 7V 6.5V 6V 5.5V 5V 4.5V Bottom 4V 25 20 15 10 2 5 0 0 5 10 15 20 25 30 0 35 0 Gate Charge (nC) V DS vs.Capacitance Capacitance (pf) 10000 Ciss 1000 Coss 100 Crss 10 1 10 20 30 40 20 30 VDS, Drain-to-Source Voltage (V) Fig. 5 0 10 50 VDS Voltage (V) 60 70 80 40 50 DE150-101N09A RF Power MOSFET Fig. 6 Package Drawing Source Source Gate Drain Source Source DE150-101N09A RF Power MOSFET 101N09A DE-SERIES SPICE Model The DE-SERIES SPICE Model is illustrated in Figure 7. The model is an expansion of the SPICE level 3 MOSFET model. It includes the stray inductive terms LG, LS and LD. Rd is the RDS(ON) of the device, Rds is the resistive leakage term. The output capacitance, COSS, and reverse transfer capacitance, CRSS are modeled with reversed biased diodes. This provides a varactor type response necessary for a high power device model. The turn on delay and the turn off delay are adjusted via Ron and Roff. Figure 7 DE-SERIES SPICE Model This SPICE model may be downloaded as a text file from the IXYSRF web site at http://www.ixysrf.com/products/switch_mode.html http://www.ixysrf.com/spice/de150-101n09a.html Net List: *SYM=POWMOSN .SUBCKT 101N09A 10 20 30 * TERMINALS: D G S * 100 Volt 9 Amp .16 ohm N-Channel Power MOSFET 10-30-2001 M1 1 2 3 3 DMOS L=1U W=1U RON 5 6 1.5 DON 6 2 D1 ROF 5 7 .2 DOF 2 7 D1 D1CRS 2 8 D2 D2CRS 1 8 D2 CGS 2 3 .7N RD 4 1 .16 DCOS 3 1 D3 RDS 1 3 5.0MEG LS 3 30 .1N LD 10 4 1N LG 20 5 1N .MODEL DMOS NMOS (LEVEL=3 VTO=3.0 KP=9.0) .MODEL D1 D (IS=.5F CJO=1P BV=100 M=.5 VJ=.6 TT=1N) .MODEL D2 D (IS=.5F CJO=1100P BV=100 M=.5 VJ=.6 TT=1N RS=10M) .MODEL D3 D (IS=.5F CJO=300P BV=100 M=.3 VJ=.4 TT=400N RS=10M) .ENDS Doc #9200-0242 Rev 5 © 2009 IXYS RF An IXYS Company 2401 Research Blvd., Suite 108 Fort Collins, CO USA 80526 970-493-1901 Fax: 970-493-1903 Email: sales@ixyscolorado.com Web: http://www.ixyscolorado.com