150-201N09A-00

DE150-201N09A RF Power MOSFET N-Channel Enhancement Mode Low Qg and Rg High dv/dt Nanosecond Switching Ideal for Class C, D, & E Applications Symbol Test Conditions Maximum Ratings VDSS TJ = 25°C to 150°C 200 V VDGR TJ = 25°C to 150°C; RGS = 1 MΩ 200 V VGS Continuous ±20 V VGSM Transient ±30 V ID25 Tc = 25°C 9 A IDM Tc = 25°C, pulse width limited by TJM 54 A IAR Tc = 25°C 9.0 A EAR Tc = 25°C 7.5 mJ IS ≤ IDM, di/dt ≤ 100A/µs, VDD ≤ VDSS, Tj ≤ 150°C, RG = 0.2Ω 5 V/ns dv/dt >200 V/ns 75 W 50 W 3.5 W RthJC 2 C/W RthJHS 3 C/W IS = 0 VDSS = 200 V ID25 = 9A RDS(on) ≤ 0.3 Ω PDC = 75 W DRAIN PDC PDHS Tc = 25°C Derate 4.4W/°C above 25°C PDAMB Tc = 25°C Symbol Test Conditions Characteristic Values TJ = 25°C unless otherwise specified min. VDSS VGS = 0 V, ID = 3 ma VGS(th) VDS = VGS, ID = 250 µa IGSS VGS = ±20 VDC, VDS = 0 IDSS VDS = 0.8 VDSS TJ = 25°C VGS = 0 TJ = 125°C RDS(on) VGS = 15 V, ID = 0.5ID25 Pulse test, t ≤ 300µS, duty cycle d ≤ 2% gfs VDS = 40 V, ID = 0.5ID25, pulse test typ. 200 2 3.0 3.5 1.6mm (0.063 in) from case for 10 s SG2 cycling capability IXYS advanced low Qg process ±100 nA 25 250 µA µA 0.3 Ω S Advantages +175 SD2 • Isolated Substrate − high isolation voltage (>2500V) − excellent thermal transfer − Increased temperature and power V +175 SD1 Features 4.5 4.5 -55 Tstg SG1 • • − − • • • 175 TJM Weight V -55 TJ TL max. GATE Low gate charge and capacitances easier to drive faster switching Low RDS(on) Very low insertion inductance (100MHz DE150-201N09A RF Power MOSFET Symbol Test Conditions Characteristic Values (TJ = 25°C unless otherwise specified) min. typ. max. 5 RG Ciss Coss VGS = 0 V, VDS = 0.8 VDSS(max), f = 1 MHz Crss Cstray Back Metal to any Pin Td(on) Ton Td(off) VGS = 15 V, VDS = 0.8 VDSS ID = 0.5 IDM RG = 0.2 Ω (External) Toff Qg(on) Qgs VGS = 10 V, VDS = 0.5 VDSS ID = 0.5 ID25 , Ig = 3 ma Qgd Source-Drain Diode Ω 500 pF 60 pF 11 pF 16 pF 4 ns 4 ns 4 ns 4 ns 16 nC 2.7 nC 7.5 nC Characteristic Values (TJ = 25°C unless otherwise specified) Symbol Test Conditions min. IS VGS = 0 V ISM Repetitive; pulse width limited by TJM VSD IF = IS, VGS = 0 V, Pulse test, t ≤ 300 µs, duty cycle ≤ 2% typ. max. 9.0 A 90 A 1.4 V 450 Trr ns CAUTION: Operation at or above the Maximum Ratings values may impact device reliability or cause permanent damage to the device. Information in this document is believed to be accurate and reliable. IXYSRF reserves the right to make changes to information published in this document at any time and without notice. For detailed device mounting and installation instructions, see the “Device Installation & Mounting Instructions” technical note on the IXYSRF web site at; http://www.ixysrf.com/pdf/switch_mode/appnotes/7de_series_mosfet_installation_instructions.pdf IXYS RF reserves the right to change limits, test conditions and dimensions. IXYS RF MOSFETS are covered by one or more of the following U.S. patents: 4,835,592 4,860,072 4,881,106 4,891,686 4,931,844 5,017,508 5,034,796 5,049,961 5,063,307 5,187,117 5,237,481 5,486,715 5,381,025 5,640,045 DE150-201N09A RF Power MOSFET Fig. 1 Fig. 2 Typical Transfer Characteristics Typical Output Characteristics VDS = 40V, PW = 20µS 30 35 25 ID , Drain Currnet (A) 40 ID, Drain Current (A) 30 25 20 15 10 7V 20 7V 15 6.5V 10 6V 5.5V 5 5 5V 0 0 4 5 6 7 8 9 10 4.5V 0 10 VGS, Gate-to-Source Voltage (V) 20 30 40 50 60 VDS, Drain-to-Source Voltage (V) Fig. 3 Fig. 4 VDS vs. Capacitance Gate Charge vs. Gate-to-Source Voltage 1000 Ciss 12 10 Capacitance (pF) Gate-to-Source Voltage (V) 14 8 6 4 Coss Crss 10 2 0 1 0 Fig. 5 5 10 15 Gate Charge (nC) 20 Maximum Transient Thermal Impedance 1 0.1 0.01 0.0001 0.001 0.01 0.1 Pulse Time - Seconds 0 20 40 60 80 100 VDS Voltage (V) 10 ZTH(JC) °C/W 100 1 10 120 140 160 DE150-201N09A RF Power MOSFET Fig. 6 Package drawing Source Source Gate Drain Source Source DE150-201N09A RF Power MOSFET 201N09A DE-SERIES SPICE Model The DE-SERIES SPICE Model is illustrated in Figure 7. The model is an expansion of the SPICE level 3 MOSFET model. It includes the stray inductive terms LG, LS and LD. Rd is the RDS(ON) of the device, Rds is the resistive leakage term. The output capacitance, COSS, and reverse transfer capacitance, CRSS are modeled with reversed biased diodes. This provides a varactor type response necessary for a high power device model. The turn on delay and the turn off delay are adjusted via Ron and Roff. Figure 7 DE-SERIES SPICE Model Net List: *SYM=POWMOSN .SUBCKT 201N09 10 20 30 * TERMINALS: D G S * 200 Volt 9 Amp .3 ohm N-Channel Power MOSFET 4-12-2012 M1 1 2 3 3 DMOS L=1U W=1U RON 5 6 1.5 DON 6 2 D1 ROF 5 7 .2 DOF 2 7 D1 D1CRS 2 8 D2 D2CRS 1 8 D2 CGS 2 3 .5N RD 4 1 .3 DCOS 3 1 D3 RDS 1 3 5.0MEG LS 3 30 .1N LD 10 4 1N LG 20 5 1N .MODEL DMOS NMOS (LEVEL=3 VTO=3.0 KP=2.7) .MODEL D1 D (IS=.5F CJO=1P BV=100 M=.5 VJ=.6 TT=1N) .MODEL D2 D (IS=.5F CJO=1100P BV=200 M=.5 VJ=.6 TT=1N RS=10M) .MODEL D3 D (IS=.5F CJO=300P BV=200 M=.3 VJ=.4 TT=400N RS=10M) .ENDS Doc #9200-0241 Rev 8 © 2012 IXYS RF An IXYS Company 1609 Oakridge Dr., Suite 100 Fort Collins, CO USA 80526 970-493-1901 Fax: 970-232-3025Email: sales@ixyscolorado.com Web: http://www.ixyscolorado.com