CLA60PD1200NA

CLA60PD1200NA High Efficiency Thyristor VRRM = 2x 1200 V I TAV = 60 A VT = 1.09 V Phase leg Part number CLA60PD1200NA Backside: Isolated 4 3 1 2 Features / Advantages: Applications: Package: SOT-227B (minibloc) ● Thyristor for line frequency ● Planar passivated chip ● Long-term stability ● Line rectifying 50/60 Hz ● Softstart AC motor control ● DC Motor control ● Power converter ● AC power control ● Lighting and temperature control ● Isolation Voltage: 3000 V~ ● Industry standard outline ● RoHS compliant ● Epoxy meets UL 94V-0 ● Base plate: Copper internally DCB isolated ● Advanced power cycling Disclaimer Notice Information furnished is believed to be accurate and reliable. However, users should independently evaluate the suitability of and test each product selected for their own applications. Littelfuse products are not designed for, and may not be used in, all applications. Read complete Disclaimer Notice at www.littelfuse.com/disclaimer-electronics. IXYS reserves the right to change limits, conditions and dimensions. © 2019 IXYS all rights reserved Data according to IEC 60747and per semiconductor unless otherwise specified 20191205d CLA60PD1200NA Ratings Rectifier Conditions Symbol VRSM/DSM Definition max. non-repetitive reverse/forward blocking voltage TVJ = 25°C VRRM/DRM max. repetitive reverse/forward blocking voltage TVJ = 25°C 1200 I R/D reverse current, drain current VT forward voltage drop min. typ. VR/D = 1200 V TVJ = 25°C 50 µA TVJ = 125°C 5 mA IT = TVJ = 25°C 1.16 V 1.39 V 1.09 V IT = 60 A TVJ = 125 °C 60 A I T = 120 A I TAV average forward current TC = 100 °C I T(RMS) RMS forward current 180° sine VT0 threshold voltage rT slope resistance R thJC thermal resistance junction to case for power loss calculation only RthCH thermal resistance case to heatsink total power dissipation I TSM max. forward surge current I²t value for fusing V VR/D = 1200 V I T = 120 A Ptot max. Unit 1300 V 1.38 V T VJ = 150 °C 60 A 94 A TVJ = 150 °C 0.79 V 4.8 mΩ 0.55 K/W 0.1 K/W TC = 25°C 220 W t = 10 ms; (50 Hz), sine TVJ = 45°C 1.10 kA t = 8,3 ms; (60 Hz), sine VR = 0 V 1.19 kA t = 10 ms; (50 Hz), sine TVJ = 150 °C 935 A t = 8,3 ms; (60 Hz), sine VR = 0 V 1.01 kA t = 10 ms; (50 Hz), sine TVJ = 45°C 6.05 kA²s t = 8,3 ms; (60 Hz), sine VR = 0 V 5.89 kA²s t = 10 ms; (50 Hz), sine TVJ = 150 °C 4.37 kA²s t = 8,3 ms; (60 Hz), sine VR = 0 V CJ junction capacitance VR = 400 V f = 1 MHz TVJ = 25°C PGM max. gate power dissipation t P = 30 µs T C = 150 °C 4.25 kA²s 43 t P = 300 µs pF 10 W 1 W 0.5 W PGAV average gate power dissipation (di/dt) cr critical rate of rise of current TVJ = 150 °C; f = 50 Hz repetitive, IT = 180 A t P = 200 µs; di G /dt = 0.45 A/µs; (dv/dt)cr critical rate of rise of voltage V = ⅔ VDRM VGT gate trigger voltage VD = 6 V TVJ = 25 °C 1.5 TVJ = -40 °C 1.6 V I GT gate trigger current VD = 6 V TVJ = 25 °C 40 mA TVJ = -40 °C 80 mA VGD gate non-trigger voltage TVJ = 150°C 0.2 V I GD gate non-trigger current 5 mA IL latching current TVJ = 25 °C 150 mA I G = 0.45 A; V = ⅔ VDRM non-repet., I T = 150 A/µs 60 A 500 A/µs 1000 V/µs TVJ = 150°C R GK = ∞; method 1 (linear voltage rise) VD = ⅔ VDRM tp = 10 µs V IG = 0.45 A; di G /dt = 0.45 A/µs IH holding current VD = 6 V R GK = ∞ TVJ = 25 °C 100 mA t gd gate controlled delay time VD = ½ VDRM TVJ = 25 °C 2 µs tq turn-off time IG = 0.5 A; di G /dt = VR = 100 V; I T = 0.5 A/µs 60A; V = ⅔ VDRM TVJ =125 °C di/dt = 10 A/µs dv/dt = IXYS reserves the right to change limits, conditions and dimensions. © 2019 IXYS all rights reserved 150 µs 20 V/µs t p = 200 µs Data according to IEC 60747and per semiconductor unless otherwise specified 20191205d CLA60PD1200NA Package Ratings SOT-227B (minibloc) Symbol I RMS Definition Conditions RMS current per terminal min. TVJ virtual junction temperature T op operation temperature Tstg storage temperature -40 typ. max. 150 Unit A -40 150 °C -40 125 °C 150 °C 30 Weight g MD mounting torque 1.1 1.5 Nm MT terminal torque 1.1 1.5 Nm d Spp/App d Spb/Apb VISOL Product Marking Logo XXXXX ® yywwZ 1234 Date Code Location Ordering Standard 8.6 50/60 Hz, RMS; IISOL ≤ 1 mA 3.2 mm 6.8 mm 3000 V 2500 V Part description Part Number UL C L A 60 PD 1200 NA = = = = = = = Thyristor (SCR) High Efficiency Thyristor (up to 1200V) Current Rating [A] Phase leg Reverse Voltage [V] SOT-227B (minibloc) Lot# Ordering Number CLA60PD1200NA Similar Part CLA100PD1200NA Equivalent Circuits for Simulation V0 10.5 t = 1 second isolation voltage t = 1 minute I terminal to terminal terminal to backside creepage distance on surface | striking distance through air R0 Package SOT-227B (minibloc) * on die level Delivery Mode Tube Quantity 10 Code No. 513121 Voltage class 1200 T VJ = 150°C Thyristor V 0 max threshold voltage 0.79 R0 max slope resistance * 3 IXYS reserves the right to change limits, conditions and dimensions. © 2019 IXYS all rights reserved Marking on Product CLA60PD1200NA V mΩ Data according to IEC 60747and per semiconductor unless otherwise specified 20191205d CLA60PD1200NA Outlines SOT-227B (minibloc) 4 IXYS reserves the right to change limits, conditions and dimensions. © 2019 IXYS all rights reserved 3 1 2 Data according to IEC 60747and per semiconductor unless otherwise specified 20191205d CLA60PD1200NA Thyristor 150 1000 10000 50 Hz, 80% VRRM VR = 0 V 900 100 800 TVJ = 45°C ITSM IT 2 It TVJ = 45°C 700 [A] [A] 50 [A2s] 600 TVJ = 125°C 125°C 150°C 500 TVJ = 25°C 0 0,5 400 1,0 1000 1,5 0,01 0,1 1 1 2 t [s] VT [V] 4 5 6 7 8 910 t [ms] Fig. 3 I t versus time (1-10 ms) 1000 1: IGD, TVJ = 150°C 2: IGT, TVJ = 25°C 3: IGT, TVJ = -40°C 3 2 Fig. 2 Surge overload current Fig. 1 Forward characteristics 10 TVJ = 125°C 160 dc = 1 0.5 0.4 0.33 0.17 0.08 140 120 2 VG 100 3 1 1 typ. tgd 100 IT(AV)M Limit 80 6 [V] 4 [µs] 5 [A] 10 TVJ = 125°C 4: PGAV = 0.5 W 5: PGM = 1 W 6: PGM = 10 W 0,1 1 10 100 1000 60 40 20 1 10 10000 0 100 1000 0 25 IG [mA] IG [mA] Fig. 4 Gate trigger characteristics 50 75 100 125 150 TC [°C] Fig. 5 Gate controlled delay time Fig. 6 Max. forward current at case temperature 0,6 RthHA 0.4 0.6 0.8 1.0 2.0 4.0 dc = 1 0.5 0.4 0.33 0.17 0.08 80 60 P(AV) 0,5 0,4 ZthJC 0,3 40 Rthi [K/W] [K/W] [W] 0.062 0.038 0.011 0.001 0,1 0.111 0.134 0.205 0.03 0.35 0.14 20 0 0,0 0 20 40 60 IT(AV) [A] 0 50 100 150 Tamb [°C] © 2019 IXYS all rights reserved 1 10 100 1000 10000 t [ms] Fig. 7a Power dissipation versus direct output current Fig. 7b and ambient temperature IXYS reserves the right to change limits, conditions and dimensions. ti [s] 0,2 Fig. 8 Transient thermal impedance junction to case Data according to IEC 60747and per semiconductor unless otherwise specified 20191205d