PAA127P

PAA127 280V, 200mA Dual Single-Pole Normally Open Relays INTEGRATED CIRCUITS DIVISION Parameter Blocking Voltage Load Current On-Resistance (max) Ratings 280 200 10 Units VP mArms / mADC  Features • • • • • • • • 500s Maximum Switching Times High Performance 280VP Blocking Voltage Greater Reliability than Electromechanical Relays 3750Vrms Input/Output Isolation No EMI/RFI Generation Low Drive Power Requirements Small 8-pin Package Surface Mount Tape & Reel Versions Available Description PAA127 is a dual, high performance, 280V, 200mA, 10, normally open (1-Form-A) Solid State Relay that has two independently controlled, optically coupled MOSFET switches in an 8-pin package. It employs optically coupled MOSFET technology to provide 3750Vrms of input to output isolation. Its optically coupled outputs, which use the patented OptoMOS architecture, are controlled by a highly efficient infrared LED. This dual single-pole OptoMOS relay provides a more compact design solution than discrete single-pole relays in a variety of applications, and saves board space by incorporating both switches in a single 8-Pin package. Applications • • • • • • • • • • • Telecommunications Instrumentation Test Equipment Multiplexers Data Acquisition Electronic Switching I/O Subsystems Meters (Watt-Hour, Water, Gas) Medical Equipment-Patient/Equipment Isolation Security Industrial Controls Approvals • UL Recognized Component: File E76270 • TUV EN 62368-1: Certificate # B 082667 0008 Ordering Information Part # PAA127 PAA127S PAA127STR PAA127P PAA127PTR Description 8-Pin DIP (50/Tube) 8-Pin Surface Mount (50/Tube) 8-Pin Surface Mount (1,000/Reel) 8-Pin SOIC (Flatpack) (50/Tube) 8-Pin SOIC (Flatpack) (1,000/Reel) Pin Configuration + Control - Switch #1 – Control - Switch #1 + Control - Switch #2 – Control - Switch #2 1 8 2 7 3 6 4 5 Switching Characteristics of Normally Open Devices Load - Switch #1 Load - Switch #1 Load - Switch #2 Form-A Load - Switch #2 IF 90% 10% ILOAD ton DS-PAA127-R05 www.ixysic.com toff 1 INTEGRATED CIRCUITS DIVISION PAA127 Absolute Maximum Ratings @ 25ºC Parameter Ratings Blocking Voltage 280 Reverse Input Voltage 5 Input Control Current 50 Peak (10ms) 1 1 Input Power Dissipation 150 800 Total Power Dissipation 2 Isolation Voltage, Input to Output 3750 Operational Temperature, Ambient -40 to +85 Storage Temperature -40 to +125 1 2 Units VP V mA A mW mW Vrms °C °C Absolute Maximum Ratings are stress ratings. Stresses in excess of these ratings can cause permanent damage to the device. Functional operation of the device at conditions beyond those indicated in the operational sections of this data sheet is not implied. Typical values are characteristic of the device at +25°C, and are the result of engineering evaluations. They are provided for information purposes only, and are not part of the manufacturing testing requirements. Derate linearly 1.33 mW / ºC Derate output power linearly 6.67 mW / ºC Electrical Characteristics @ 25ºC Parameter Output Characteristics Blocking Voltage Load Current Continuous 1 Peak On-Resistance 2 Off-State Leakage Current Switching Speeds Turn-On Turn-Off Output Capacitance Input Characteristics Input Control Current to Activate 3 Input Control Current to Deactivate Input Voltage Drop Reverse Input Current Common Characteristics Input to Output Capacitance 1 2 3 2 Conditions Symbol Min Typ Max Units IL=1A VDRM 280 - - VP t =10ms IF=3mA, IL=200mA IF=0mA, VL=280VP IL ILPK RON ILEAK - 7.3 1 200 ±400 10 25 mArms / mADC mAP  IF=0mA, VL=50V, f=1MHz ton toff COUT - 0.42 0.12 16 0.5 0.5 - IL=200mA IF=5mA VR=5V IF VF IR 0.3 0.9 - 0.5 0.49 1.2 - 3 1.4 10 mA mA V A - CI/O - 3 - pF IF=5mA, VL=10V nA ms pF If both poles operate, the load current must be derated in order not to exceed the package power dissipation value. Measurement taken within one (1) second of on-time. For high-temperature applications (>60ºC) a minimum LED drive current of 5mA is recommended. www.ixysic.com R05 INTEGRATED CIRCUITS DIVISION PAA127 PERFORMANCE DATA* 40 Typical LED Forward Voltage Drop (N=50, IF=5mA) Typical Turn-On Time (N=50, IF=5mA, IL=100mA) 25 30 25 20 15 10 25 20 Device Count (N) Device Count (N) Device Count (N) 35 30 15 10 5 1.225 325 Typical IF for Switch Operation (N=50, IL=200mA) 10 5 0 0.40 0.45 0.50 0.55 0.60 LED Forward Current (mA) 100 20 15 10 5 7.1 7.2 7.3 7.4 7.5 On-Resistance (:) 115 120 125 130 135 Typical Blocking Voltage Distribution (N=50, IF=0mA) 15 10 5 332 7.6 Typical Turn-On Time vs. LED Forward Current (IL=100mA) 4.0 334 336 338 340 Blocking Voltage (VP) 342 Typical Turn-Off Time vs. LED Forward Current (IL=100mA) 0.165 3.5 Turn-On Time (ms) 1.5 110 0 0.65 IF=50mA IF=20mA IF=10mA IF=5mA 105 Turn-Off Time (Ps) 1.4 1.3 1.2 Turn-Off Time (ms) 1.6 10 475 20 Typical LED Forward Voltage Drop vs. Temperature 3.0 2.5 2.0 1.5 1.0 0.160 0.155 0.150 0.145 0.5 0.0 1.1 -40 -20 0 20 40 60 Temperature (ºC) 80 100 Typical IF for Switch Operation vs. Temperature (IL=200mA) 0.65 0.140 0 650 10 20 30 LED Current (mA) 40 0 50 Typical Turn-On Time vs. Temperature (IF=5mA, IL=100mA) 250 10 20 30 LED Current (mA) 40 50 Typical Turn-Off Time vs. Temperature (IF=5mA, IL=100mA) 600 Turn-On Time (Ps) 0.60 0.55 0.50 0.45 Turn-Off Time (Ps) LED Forward Voltage (V) 450 0 0.35 LED Current (mA) 375 400 425 Turn-On Time (Ps) Device Count (N) 15 350 Typical On-Resistance Distribution (N=50, IF=3mA, IL=200mA) 25 Device Count (N) 20 Device Count (N) 1.205 1.210 1.215 1.220 LED Forward Voltage (V) 15 0 0 1.200 20 5 5 0 Typical Turn-Off Time (N=50, IF=5mA, IL=100mA) 550 500 450 400 200 150 100 350 0.40 -40 -20 0 20 40 60 Temperature (ºC) 80 100 300 -40 -20 0 20 40 60 Temperature (ºC) 80 100 50 -40 -20 0 20 40 60 Temperature (ºC) 80 100 *Unless otherwise noted, data presented in these graphs is typical of device operation at 25ºC. R05 www.ixysic.com 3 INTEGRATED CIRCUITS DIVISION PAA127 PERFORMANCE DATA* Typical On-Resistance vs. Temperature (IF=3mA, IL=200mA) Typical Load Current vs. Load Voltage (IF=3mA) Load Current (mA) 8.0 7.5 7.0 6.5 6.0 5.5 -40 0 20 40 60 Temperature (ºC) 80 100 Typical Blocking Voltage vs. Temperature (IF=0mA) 355 345 340 335 330 325 320 200 -40 -20 0 20 40 60 Temperature (ºC) 80 100 160 140 120 100 80 -1.0 -0.5 0.0 0.5 Load Voltage (V) 1.5 1.0 20 15 10 5 0 315 180 -40 Leakage Current vs. Temperature Measured Across Pins 5&6 & 7&8 (IF=0mA, VL=280V) 25 350 Leakage Current (nA) Blocking Voltage (VP) -20 220 90 Output Capacitance (pF) On-Resistance (:) 8.5 250 200 150 100 50 0 -50 -100 -150 -200 -250 -1.5 Load Current (mA) 9.0 Maximum Load Current vs. Temperature (IF=3mA) -20 0 20 40 60 Temperature (ºC) 80 100 Output Capacitance vs. Load Voltage (IF=0mA) 80 70 60 50 40 30 20 10 0 -40 -20 0 20 40 60 Temperature (ºC) 80 100 10s 100s 0 50 100 150 200 Load Voltage (V) 250 300 Energy Rating Curve 1.2 Load Current (A) 1.0 0.8 0.6 0.4 0.2 0.0 10Ps 100Ps 1ms 10ms 100ms Time 1s *Unless otherwise noted, data presented in these graphs is typical of device operation at 25ºC. 4 www.ixysic.com R05 INTEGRATED CIRCUITS DIVISION PAA127 Manufacturing Information Moisture Sensitivity All plastic encapsulated semiconductor packages are susceptible to moisture ingression. IXYS Integrated Circuits classifies its plastic encapsulated devices for moisture sensitivity according to the latest version of the joint industry standard, IPC/JEDEC J-STD-020, in force at the time of product evaluation. We test all of our products to the maximum conditions set forth in the standard, and guarantee proper operation of our devices when handled according to the limitations and information in that standard as well as to any limitations set forth in the information or standards referenced below. Failure to adhere to the warnings or limitations as established by the listed specifications could result in reduced product performance, reduction of operable life, and/or reduction of overall reliability. This product carries a Moisture Sensitivity Level (MSL) classification as shown below, and should be handled according to the requirements of the latest version of the joint industry standard IPC/JEDEC J-STD-033. Device Moisture Sensitivity Level (MSL) Classification PAA127S MSL 1 PAA127P MSL 3 ESD Sensitivity This product is ESD Sensitive, and should be handled according to the industry standard JESD-625. Soldering Profile Provided in the table below is the IPC/JEDEC J-STD-020 Classification Temperature (TC) and the maximum total dwell time (tP) in all reflow processes that the body temperature of these surface mount devices may be (TC - 5)°C or greater. The device’s body temperature must not exceed the Classification Temperature at any time during reflow soldering processes. Device Classification Temperature (Tc) Dwell Time (tP) Max Reflow Cycles PAA127S PAA127P 250ºC 245ºC 30 seconds 30 seconds 3 3 For through-hole devices, the maximum pin temperature and maximum dwell time through all solder waves is provided in the table below. Dwell time is the interval beginning when the pins are initially immersed into the solder wave until they exit the solder wave. For multiple waves, the dwell time is from entering the first wave until exiting the last wave. During this time, pin temperatures must not exceed the maximum temperature given in the table below. Body temperature of the device must not exceed the limit shown in the table below at any time during the soldering process. Device PAA127 Maximum Pin Temperature 260ºC Maximum Body Temperature 250ºC Maximum Dwell Time 10 seconds* Wave Cycles 1 *Total cumulative duration of all waves. Board Wash IXYS Integrated Circuits recommends the use of no-clean flux formulations. Board washing to reduce or remove flux residue following the solder reflow process is acceptable provided proper precautions are taken to prevent damage to the device. These precautions include but are not limited to: using a low pressure wash and providing a follow up bake cycle sufficient to remove any moisture trapped within the device due to the washing process. Due to the variability of the wash parameters used to clean the board, determination of the bake temperature and duration necessary to remove the moisture trapped within the package is the responsibility of the user (assembler). Cleaning or drying methods that employ ultrasonic energy may damage the device and should not be used. Additionally, the device must not be exposed to halide flux or solvents. R05 www.ixysic.com 5 INTEGRATED CIRCUITS DIVISION PAA127 MECHANICAL DIMENSIONS PAA127 2.540 ± 0.127 (0.100 ± 0.005) 9.652 ± 0.381 (0.380 ± 0.015) 8-0.762 DIA. (8-0.030 DIA.) 2.540 ± 0.127 (0.100 ± 0.005) 9.144 ± 0.508 (0.360 ± 0.020) 6.350 ± 0.127 (0.250 ± 0.005) Pin 1 PCB Hole Pattern 7.620 ± 0.254 (0.300 ± 0.010) 3.302 ± 0.051 (0.130 ± 0.002) 0.457 ± 0.076 (0.018 ± 0.003) 7.620 ± 0.127 (0.300 ± 0.005) 7.239 TYP. (0.285) 4.064 TYP (0.160) 7.620 ± 0.127 (0.300 ± 0.005) 0.254 ± 0.0127 (0.010 ± 0.0005) Dimensions mm (inches) 0.813 ± 0.102 (0.032 ± 0.004) PAA127S PCB Land Pattern 9.652 ± 0.381 (0.380 ± 0.015) 2.540 ± 0.127 (0.100 ± 0.005) 6.350 ± 0.127 (0.250 ± 0.005) Pin 1 0.635 ± 0.127 (0.025 ± 0.005) 3.302 ± 0.051 (0.130 ± 0.002) 9.525 ± 0.254 (0.375 ± 0.010) 0.457 ± 0.076 (0.018 ± 0.003) 2.54 (0.10) 8.90 (0.3503) 1.65 (0.0649) 7.620 ± 0.254 (0.300 ± 0.010) 0.254 ± 0.0127 (0.010 ± 0.0005) 0.65 (0.0255) 4.445 ± 0.127 (0.175 ± 0.005) Dimensions mm (inches) 0.813 ± 0.102 (0.032 ± 0.004) PAA127P 2.540 ± 0.127 (0.100 ± 0.005) 6.350 ± 0.127 (0.250 ± 0.005) 0 MIN / 0.102 MAX (0 MIN / 0.004 MAX) 9.398 ± 0.127 (0.370 ± 0.005) Pin 1 9.652 ± 0.381 (0.380 ± 0.015) 7.620 ± 0.254 (0.300 ± 0.010) 2.286 MAX. (0.090 MAX.) 2.54 (0.10) 0.635 ± 0.127 (0.025 ± 0.005) 0.203 ± 0.013 (0.008 ± 0.0005) 8.70 (0.3425) 1.55 (0.0610) 0.65 (0.0255) 2.159 ± 0.025 (0.085 ± 0.001) 0.457 ± 0.076 (0.018 ± 0.003) 0.864 ± 0.120 (0.034 ± 0.004) 6 PCB Land Pattern Dimensions mm (inches) www.ixysic.com R05 INTEGRATED CIRCUITS DIVISION PAA127 PAA127STR Tape & Reel 2.0 (0.08) 4.0 (0.16) 330.2 DIA. (13.00 DIA.) Top Cover Tape Thickness 0.102 MAX. (0.004 MAX.) 7.5 (0.30) Bo=10.30 (0.406) K0 =4.90 (0.193) 16.0±0.3 (0.63±0.012) Ao=10.30 (0.406) K1 =4.20 (0.165) Embossed Carrier Embossment P1=12.00 (0.472) User Direction of Feed Dimensions mm (inches) NOTES: 1. Dimensions carry tolerances of EIA Standard 481-2 2. Tape complies with all “Notes” for constant dimensions listed on page 5 of EIA-481-2 3. Controlling dimension: mm PAA127PTR Tape & Reel 2.00 (0.079) 330.2 DIA. (13.00 DIA.) Top Cover Tape Thickness 0.102 MAX. (0.004 MAX.) 7.50 (0.295) Embossment W = 16.00 (0.63) Bo = 10.30 (0.406) K0 = 2.70 (0.106) K1 = 2.00 (0.079) Embossed Carrier 4.00 (0.157) Ao = 10.30 (0.406) P1 = 12.00 (0.472) User Direction of Feed Dimensions mm (inches) NOTES: 1. All dimensions carry tolerances of EIA Standard 481-2 2. The tape complies with all “Notes” for constant dimensions listed on page 5 of EIA-481-2 3. Controlling dimension: mm For additional information please visit our website at: https://www.ixysic.com Disclaimer Notice - Information furnished is believed to be accurate and reliable. However, users should independently evaluate the suitability of and test each product selected for their own applications. Littelfuse products are not designed for, and may not be used in, all applications. Read complete Disclaimer Notice at https://www.littelfuse.com/disclaimer-electronics. 7 Specification: DS-PAA127-R05 ©Copyright 2021, Littelfuse, Inc. OptoMOS® is a registered trademark of IXYS Integrated Circuits Division All rights reserved. Printed in USA. 11/4/2021