PAA150
250V, 250mA Dual Single-Pole
Normally Open Relays
INTEGRATED CIRCUITS DIVISION
Parameter
Blocking Voltage
Load Current
On-Resistance (max)
Rating
250
250
7
Units
VP
mArms / mADC
Features
•
•
•
•
•
•
•
3750Vrms Input/Output Isolation
Low Drive Power Requirements
Greater Reliability than Electromechanical Relays
No EMI/RFI Generation
Small 8-Pin Packages
Flammability Rating UL 94 V-0
Tape & Reel Versions Available
Description
The PAA150 is a dual, 250V, 250mA, 7, normally
open (1-Form-A) relay that uses optically coupled
MOSFET technology to provide 3750Vrms of input to
output isolation.
Its optically coupled outputs, which use the patented
OptoMOS architecture, are controlled by a highly
efficient infrared LED.
This high performance leader provides a more cost
effective solution where very low on-resistance is
required, but enhanced peak load voltage is not
required.
Approvals
Applications
•
•
•
•
•
•
•
•
•
•
Telecommunications
Instrumentation
Multiplexers
Data Acquisition
Electronic Switching
I/O Subsystems
Meters (Watt-Hour, Water, Gas)
Medical Equipment-Patient/Equipment Isolation
Security
Industrial Controls
• UL Recognized Component: File # E76270
• CSA Certified Component: Certificate # 1175739
• TUV EN 62368-1: Certificate # B 082667 0008
Ordering Information
Part #
PAA150
PAA150P
PAA150PTR
PAA150S
PAA150STR
Description
8-pin DIP (50/tube)
8-pin SOIC (Flatpack) (50/tube)
8-pin SOIC (Flatpack) (1000/Reel)
8-pin Surface Mount (50/tube)
8-pin Surface Mount (1000/Reel)
Pin Configuration
+ Control - Switch #1
- Control - Switch #1
+ Control - Switch #2
- Control - Switch #2
1
8
2
7
3
6
4
5
Load - Switch #1
Load - Switch #1
Load - Switch #2
Load - Switch #2
Switching Characteristics
of Normally Open Devices
Form-A
IF
90%
10%
ILOAD
ton
DS-PAA150-R09
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toff
1
INTEGRATED CIRCUITS DIVISION
PAA150
Absolute Maximum Ratings @ 25ºC
Parameter
Blocking Voltage
Reverse Input Voltage
Input Control Current
Peak (10ms)
Input Power Dissipation 1
Total Power Dissipation 2
Isolation Voltage, Input to Output
Operational Temperature, Ambient
Storage Temperature
1
Derate linearly 1.33 mW / ºC
2
Derate output power linearly 6.67 mW / ºC
Ratings
250
5
50
1
150
800
3750
-40 to +85
-40 to +125
Absolute Maximum Ratings are stress ratings. Stresses in
excess of these ratings can cause permanent damage to
the device. Functional operation of the device at conditions
beyond those indicated in the operational sections of this
data sheet is not implied.
Units
VP
V
mA
A
mW
mW
Vrms
°C
°C
Typical values are characteristic of the device at +25°C,
and are the result of engineering evaluations. They are
provided for information purposes only, and are not part of
the manufacturing testing requirements.
Electrical Characteristics @ 25ºC
Parameter
Output Characteristics
Blocking Voltage
Load Current
Continuous 1
Peak
On-Resistance 2
Off-State Leakage Current
Switching Speeds
Turn-On
Turn-Off
Output Capacitance
Input Characteristics
Input Control Current to Activate
Input Control Current to Deactivate
Input Voltage Drop
Reverse Input Current
Common Characteristics
Capacitance Input to Output
Conditions
Symbol
Min
Typ
Max
Units
IL=1A
VDRM
250
-
-
VP
t=10ms
IL=250mA
VL=250VP
IL
ILPK
RON
ILEAK
-
-
250
±500
7
1
mArms / mADC
mAP
µA
IF=0mA, VL=50V, f=1MHz
ton
toff
COUT
-
110
2.5
0.5
-
IL=250mA
IF=5mA
VR=5V
IF
IF
VF
IR
0.4
0.9
-
0.7
1.36
-
5
1.5
10
mA
mA
V
µA
VIO=0V, f=1MHz
CIO
-
3
-
pF
IF=5mA, VL=10V
1
If both poles operate simultaneously, then load current must be derated in order not to exceed the package power dissipation value.
2
Measurement taken within one second of on-time.
2
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ms
pF
R09
INTEGRATED CIRCUITS DIVISION
PAA150
Manufacturing Information
Moisture Sensitivity
All plastic encapsulated semiconductor packages are susceptible to moisture ingression. IXYS Integrated
Circuits classifies its plastic encapsulated devices for moisture sensitivity according to the latest version of the
joint industry standard, IPC/JEDEC J-STD-020, in force at the time of product evaluation. We test all of our
products to the maximum conditions set forth in the standard, and guarantee proper operation of our devices
when handled according to the limitations and information in that standard as well as to any limitations set forth in the
information or standards referenced below.
Failure to adhere to the warnings or limitations as established by the listed specifications could result in reduced product
performance, reduction of operable life, and/or reduction of overall reliability.
This product carries a Moisture Sensitivity Level (MSL) classification as shown below, and should be handled
according to the requirements of the latest version of the joint industry standard IPC/JEDEC J-STD-033.
Device
Moisture Sensitivity Level (MSL) Classification
PAA150S
MSL 1
PAA150P
MSL 3
ESD Sensitivity
This product is ESD Sensitive, and should be handled according to the industry standard JESD-625.
Soldering Profile
Provided in the table below is the IPC/JEDEC J-STD-020 Classification Temperature (TC) and the maximum total dwell
time (tP) in all reflow processes that the body temperature of these surface mount devices may be (TC - 5)°C or greater.
The device’s body temperature must not exceed the Classification Temperature at any time during reflow soldering
processes.
Device
Classification Temperature (Tc)
Dwell Time (tP)
Max Reflow Cycles
PAA150S
PAA150P
250ºC
245ºC
30 seconds
30 seconds
3
3
For through-hole devices, the maximum pin temperature and maximum dwell time through all solder waves is
provided in the table below. Dwell time is the interval beginning when the pins are initially immersed into the solder
wave until they exit the solder wave. For multiple waves, the dwell time is from entering the first wave until exiting the
last wave. During this time, pin temperatures must not exceed the maximum temperature given in the table below.
Body temperature of the device must not exceed the limit shown in the table below at any time during the soldering
process.
Device
PAA150
Maximum Pin Temperature
260ºC
Maximum Body Temperature
250ºC
Maximum Dwell Time
10 seconds*
Wave Cycles
1
*Total cumulative duration of all waves.
Board Wash
IXYS Integrated Circuits recommends the use of no-clean flux formulations. Board washing to reduce or remove flux
residue following the solder reflow process is acceptable provided proper precautions are taken to prevent damage to
the device. These precautions include but are not limited to: using a low pressure wash and providing a follow up bake
cycle sufficient to remove any moisture trapped within the device due to the washing process. Due to the variability
of the wash parameters used to clean the board, determination of the bake temperature and duration necessary
to remove the moisture trapped within the package is the responsibility of the user (assembler). Cleaning or drying
methods that employ ultrasonic energy may damage the device and should not be used. Additionally, the device must
not be exposed to halide flux or solvents.
R09
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3
INTEGRATED CIRCUITS DIVISION
PAA150
Mechanical Dimensions
PAA150
2.540 ± 0.127
(0.100 ± 0.005)
9.652 ± 0.381
(0.380 ± 0.015)
8-0.762 DIA.
(8-0.030 DIA.)
2.540 ± 0.127
(0.100 ± 0.005)
9.144 ± 0.508
(0.360 ± 0.020)
6.350 ± 0.127
(0.250 ± 0.005)
Pin 1
PCB Hole Pattern
7.620 ± 0.254
(0.300 ± 0.010)
3.302 ± 0.051
(0.130 ± 0.002)
0.457 ± 0.076
(0.018 ± 0.003)
7.620 ± 0.127
(0.300 ± 0.005)
7.239 TYP.
(0.285)
4.064 TYP
(0.160)
7.620 ± 0.127
(0.300 ± 0.005)
0.254 ± 0.0127
(0.010 ± 0.0005)
Dimensions
mm
(inches)
0.813 ± 0.102
(0.032 ± 0.004)
PAA150S
PCB Land Pattern
9.652 ± 0.381
(0.380 ± 0.015)
2.540 ± 0.127
(0.100 ± 0.005)
6.350 ± 0.127
(0.250 ± 0.005)
Pin 1
0.635 ± 0.127
(0.025 ± 0.005)
3.302 ± 0.051
(0.130 ± 0.002)
9.525 ± 0.254
(0.375 ± 0.010)
0.457 ± 0.076
(0.018 ± 0.003)
2.54
(0.10)
8.90
(0.3503)
1.65
(0.0649)
7.620 ± 0.254
(0.300 ± 0.010)
0.254 ± 0.0127
(0.010 ± 0.0005)
0.65
(0.0255)
4.445 ± 0.127
(0.175 ± 0.005)
Dimensions
mm
(inches)
0.813 ± 0.102
(0.032 ± 0.004)
PAA150P
2.540 ± 0.127
(0.100 ± 0.005)
6.350 ± 0.127
(0.250 ± 0.005)
0 MIN / 0.102 MAX
(0 MIN / 0.004 MAX)
9.398 ± 0.127
(0.370 ± 0.005)
Pin 1
9.652 ± 0.381
(0.380 ± 0.015)
7.620 ± 0.254
(0.300 ± 0.010)
2.286 MAX.
(0.090 MAX.)
2.54
(0.10)
0.635 ± 0.127
(0.025 ± 0.005)
0.203 ± 0.013
(0.008 ± 0.0005)
8.70
(0.3425)
1.55
(0.0610)
0.65
(0.0255)
2.159 ± 0.025
(0.085 ± 0.001)
0.457 ± 0.076
(0.018 ± 0.003)
0.864 ± 0.120
(0.034 ± 0.004)
4
PCB Land Pattern
Dimensions
mm
(inches)
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R09
INTEGRATED CIRCUITS DIVISION
PAA150
PAA150STR Tape & Reel
2.0
(0.08)
4.0
(0.16)
330.2 DIA.
(13.00 DIA.)
Top Cover
Tape Thickness
0.102 MAX.
(0.004 MAX.)
7.5
(0.30)
Bo=10.30
(0.406)
K0 =4.90
(0.193)
16.0±0.3
(0.63±0.012)
Ao=10.30
(0.406)
K1 =4.20
(0.165)
Embossed Carrier
Embossment
P1=12.00
(0.472)
User Direction of Feed
Dimensions
mm
(inches)
NOTES:
1. Dimensions carry tolerances of EIA Standard 481-2
2. Tape complies with all “Notes” for constant dimensions listed on page 5 of EIA-481-2
3. Controlling dimension: mm
PAA150PTR Tape & Reel
2.00
(0.079)
330.2 DIA.
(13.00 DIA.)
Top Cover
Tape Thickness
0.102 MAX.
(0.004 MAX.)
7.50
(0.295)
Embossment
W = 16.00
(0.63)
Bo = 10.30
(0.406)
K0 = 2.70
(0.106)
K1 = 2.00
(0.079)
Embossed Carrier
4.00
(0.157)
Ao = 10.30
(0.406)
P1 = 12.00
(0.472)
User Direction of Feed
Dimensions
mm
(inches)
NOTES:
1. All dimensions carry tolerances of EIA Standard 481-2
2. The tape complies with all “Notes” for constant dimensions listed on page 5 of EIA-481-2
3. Controlling dimension: mm
For additional information please visit our website at: https://www.ixysic.com
Disclaimer Notice - Information furnished is believed to be accurate and reliable. However, users should independently evaluate the suitability of and
test each product selected for their own applications. Littelfuse products are not designed for, and may not be used in, all applications.
Read complete Disclaimer Notice at https://www.littelfuse.com/disclaimer-electronics.
5
Specification: DS-PAA150-R09
©Copyright 2021, Littelfuse, Inc.
OptoMOS® is a registered trademark of IXYS Integrated Circuits
All rights reserved. Printed in USA.
11/4/2021
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