PLRXPL-VI-S24-22

COMMUNICATIONS MODUlES & SUBSySTEMS RoHS-Compliant 2.125, 1.25 and 1.063 Gbps 850 nm eSFP Transceiver PLRXPL-VI-S24-22 Key Features • Compliant with industry-wide physical and optical specifications • Lead-free and RoHS-Compliant • Cost effective SFP solution • Triple-rate FC/Ethernet performance • Enables higher port densities • Enables greater bandwidth • Proven high reliability Applications • High-speed storage area networks - Switch and hub interconnect - Mass storage systems interconnect - Host adapter interconnect • Computer cluster cross-connect • Custom high-speed data pipes • Short-reach Ethernet This lead-free and RoHS-compliant multi-rate Small Form Factor Pluggable (SFP) transceiver provides superior performance for Fibre Channel and Ethernet applications, and is another in JDSU’s family of products customized for high speed, short reach SAN, and intra-POP applications. The multi-rate feature enables its use in a wider range of system applications. It is fully compliant with FC-PI 100-M5/M6-SN-I, 200-M5/M6-SN-I, and 1000BASE-SX specifications. JDSU’s housing provides improved EMI performance for demanding applications. This transceiver features a highly reliable 850 nm oxide vertical-cavity surface-emitting laser (VCSEL) coupled to a LC optical connector. Its small size allows for highdensity board designs that, in turn, enable greater total aggregate bandwidth. Highlights • 2GFC, 1GFC, and 1GBE triple rate performance enables flexible system design, and configuration • Lead-free and RoHS-compliant perEuropean Directive 2002/95/EC • Enhanced digital diagnostic feature set allows real-time monitoring of transceiver performance and system stability • Bail mechanism enables superior ergonomics and functionality in all port configurations • Extended voltage and extended temperature • MSA-compliant small form factor footprint • Serial ID allows customer and vendor system specific information to be placed in transceiver • All-metal housing provides superior EMI performance NORTH AMERICA: 800 498-JDSU (5378) wORlDwIDE: +800 5378-JDSU wEBSITE: www.jdsu.com ROHS-COMPlIANT 2.125, 1.25 AND 1.063 GBPS 850 NM TRANSCEIvER 2 PlRXPl-vI-S24-22 Features • Utilizes a highly reliable, high-speed, 850nm, oxide VCSEL • Lead-free and RoHS-compliant • Hot pluggable • Digital diagnostics, SFF-8472 rev 9.5 compliant • Compliant with Fibre Channel 200M5/M6-SN-I and 100-M5/M6-SN-I • Compliant with 1000BASE-SX, IEEE 802.3 • Low nominal power consumption (400 mW) • -20˚C to 85˚C operating temperature range for 2Gbps datarates • -40˚C to 85˚C operating temperature range for 1Gbps datarates • Single +3.3 V power supply • ±10% extended operating voltage range • Bit error rate < 1 x 10-12 • OCTransmit disable, loss of signal and transmitter fault functions • CDRH and IEC 60825-1 Class 1 laser eye safe • FCC Class B compliant • ESD Class 2 per MIL-STD 883 2.224 56.50 .470 11.94 .539 13.70 Dimensions in inches [mm] An eye-safe, cost effective serial transceiver, the PLRXPL-VI-S24-22 features a small, low power, pluggable package that manufacturers can upgrade in the field, adding bandwidth incrementally. The robust mechanical design features a unique all-metal housing that provides superior EMI shielding. ROHS-COMPlIANT 2.125, 1.25 AND 1.063 GBPS 850 NM TRANSCEIvER  Section 1 Functional Description PLRXPL-VI-S24-22 850 nm VCSEL Gigabit Transceiver is designed to transmit and receive 8B/10B encoded serial optical data over 50/125 µm or 62.5/125 µm multimode optical fiber. Transmitter The transmitter converts 8B/10B encoded serial PECL or CML electrical data into serial optical data meeting the requirements of 100-M5/M6-SN-I, 200-M5/M6SN-I Fibre Channel specifications and 1000BASE-SX Ethernet. Transmit data lines (TD+ & TD-) are internally AC coupled with 100 W differential termination. An open collector compatible Transmit Disable (Tx_Dis) is provided. This pin is internally terminated with a 10 kW resistor to VccT. A logic “1,” or no connection on this pin will disable the laser from transmitting. A logic “0” on this pin provides normal operation. The transmitter has an internal PIN monitor diode that is used to ensure constant optical power output across supply voltage and temperature variations. An open collector compatible Transmit Fault (TFault) is provided. The Transmit Fault signal must be pulled high on the host board for proper operation. A logic “1” output from this pin indicates that a transmitter fault has occurred, or the part is not fully seated and the transmitter is disabled. A logic “0” on this pin indicates normal operation. Receiver The receiver converts 8B/10B encoded serial optical data into serial PECL/CML electrical data. Receive data lines (RD+ & RD-) are internally AC coupled with 100 W differential source impedance, and must be terminated with a 100 W differential load. The receiver’s bandwidth has been optimized for fully compliant operation at 2.125, 1.25 and 1.063 Gbps line rates without the use of rate select. Rate select pin 7 has no effect. An open collector compatible Loss of Signal is provided. The LOS must be pulled high on the host board for proper operation. A logic “0” indicates that light has been detected at the input to the receiver (see Section 2.5 Optical characteristic, Loss of Signal Assert/Deassert Time on page 9). A logic “1” output indicates that insufficient light has been detected for proper operation. Power supply filtering is recommended for both the transmitter and receiver. Filtering should be placed on the host assembly as close to the Vcc pins as possible for optimal performance. Recommended “Application Schematics” are shown in Figure 2 on page 5. ROHS-COMPlIANT 2.125, 1.25 AND 1.063 GBPS 850 NM TRANSCEIvER 4 10 kΩ 16 Transmitter Power Supply 3 Transmitter Disable In VCC_TX TX_DIS TD+ 18 Transmitter Positive D ata TOSA Laser Driver TX_GND TX_FAULT TD - 100 Ω 19 Transmitter Negative D ata 2 Transmitter Fault O ut 1, 17, 20 Transmitter Signal G round SCL Management Processor EEPROM SDA 5 MOD_DEF(1) Serial ID Cloc k 4 MOD_DEF(2) Serial ID Data 6 MOD_DEF(0) 15 R eceiver Power Supply VCC_RX VCC_RX RD RD + 50 Ω 12 R eceiver Negative D ata O ut 13 R eceiver Positive D ata O ut ROSA RX_GN D Receiver RX_GN D LOS 50 Ω 8 Loss of Signal O ut 7 Rate Select 30 kΩ 9, 10, 11, 14 R eceiver Signal G round Figure 1 Block diagram ROHS-COMPlIANT 2.125, 1.25 AND 1.063 GBPS 850 NM TRANSCEIvER  Section 2 Application Schematics Recommended connections to the PLRXPL-VI-S24-22 transceiver are shown in figure 2 below. Vcc Z* = 100 Ω 1 V eeT VeeT 20 R2* 50Ω Open Collec tor Driver (Tx Disable) Vcc 2 Tx Fault TD- 19 R1* 50Ω 10 k? Receiver ( T x Fault) PECL D r iver (TX DATA) � � Open C ollec tor Bidirectional (Mod_Def (2)) 10 kΩ 3 Tx D isable TD+ 18 Open C ollec tor Bidirectional (Mod_Def (1)) Receiver (Mod_Def (0)) Rate S elect 9 V eeR Vcc 10 V eeR VeeR 11 RD- 12 Receiver (LOS) Notes  Power supply filtering components should be placed as close to the Vcc pins of the host connector as possible for optimal performance.  PECL driver and receiver will require biasing networks. Please consult application notes from suppliers of these components. CML I/O on the PHY are supported.  MOD_DEF(2) and MOD_DEF(1) should be bi-directional open collector connections in order to implement serial ID (MOD_DEF[0,1,2]) PLRXPL-VI-S24-22 transceiver.  R1 and R2 may be included in the output of the PHY. Check application notes of the IC in use. * Transmission lines should be 100 Ω differential traces. It is recommended that the termination resistor for the PECL Receiver (R3 + R4) be placed beyond the input pins of the PECL Receiver. Series Source Termination Resistors on the PECL Driver (R1+R2) should be placed as close to the driver output pins as possible � � � Vcc 4 MOD_DEF(2) VeeT 17 C3 0.1µF � L1 1 µH L2 1 µH � Vcc +3.3V Input C2 0.1 µF � C1 10µF � 10 kΩ Vcc 5 MOD_DEF(1) VccT 16 � � � � 6 MOD_DEF(0) VccR 15 C4 0.1 µF � C5 10 µF � 10 kΩ � � � 7 Rate S elect VeeR 14 R3* 50Ω 8 LO S RD+ 13 Z* = 100Ω PECL R eceiver (RX DATA) � � R4* 50Ω 10 kΩ Figure 2 Recommended application schematic for the PlRXPl-vI-S24-22 transceiver ROHS-COMPlIANT 2.125, 1.25 AND 1.063 GBPS 850 NM TRANSCEIvER  2.1 Technical data Technical data related to the RoHS-Compliant 2.125, 1.25 and 1.063 Gbps 850 nm eSFP Transceiver includes: • Section 2.2 Pin function definitions below • Section 2.3 Absolute maximum ratings on page 8 • Section 2.4 Electrical characteristics on page 8 • Section 2.5 Optical characteristic on page 10 • Section 2.6 Link lengths on page 11 • Section 2.7 Regulatory compliance on page 12 • Section 2.8 PCB layout on page 13 • Section 2.9 Front panel opening on page 14 • Section 2.10 Module outline on page 14 • Section 2.11 Transceiver belly-to-belly mounting on page 15 2.2 Pin function definitions Figure 3 Transceiver pin descriptions ROHS-COMPlIANT 2.125, 1.25 AND 1.063 GBPS 850 NM TRANSCEIvER  Table 1 Transceiver pin descriptions Pin Number Receiver 8 Symbol Name Description LOS Loss of Signal Out (OC) 9, 10, 11, 14 12 VeeR RD- Receiver Signal Ground Receiver Negative DATA Out (PECL) Receiver Positive DATA Out (PECL) Receiver Power Supply 13 RD+ 15 VccR 7 Transmitter 3 Rate Select Rate Select (LVTTL) Sufficient optical signal for potential BER < 1x10-12 = Logic “0” Insufficient optical signal for potential BER < 1x10-12 = Logic “1” This pin is open collector compatible, and should be pulled up to Host Vcc with a 10 kW resistor. These pins should be connected to signal ground on the host board. Light on = Logic “0” Output Receiver DATA output is internally AC coupled and series terminated with a 50 W resistor. Light on = Logic “1” Output Receiver DATA output is internally AC coupled and series terminated with a 50 W resistor. This pin should be connected to a filtered +3.3V power supply on the host board. See Application schematics on page 5 for filtering suggestions. This pin has an internal 30K pulldown to ground. An input signal will not affect module performance Logic “1” Input (or no connection) = Laser off Logic “0” Input = Laser on This pin is internally pulled up to VccT with a 10 kW resistor. These pins should be connected to signal ground on the host board. Logic “1” Output = Laser Fault (Laser off before t_fault) Logic “0” Output = Normal Operation This pin is open collector compatible, and should be pulled up to Host Vcc with a 10 kW resistor. This pin should be connected to a filtered +3.3V power supply on the host board. See Application schematics on page 5 for filtering suggestions. Logic “1” Input = Light on Transmitter DATA inputs are internally AC coupled and terminated with a differential 100 W resistor. Logic “0” Input = Light on Transmitter DATA inputs are internally AC coupled and terminated with a differential 100 W resistor. Serial ID with SFF 8472 Diagnostics (See section 3.1) Module Definition pins should be pulled up to Host Vcc with 10 kW resistors. TX Disable Transmitter Disable In (LVTTL) 1, 17, 20 2 VeeT TX Fault Transmitter Signal Ground Transmitter Fault Out (OC) 16 VccT Transmitter Power Supply 18 TD+ Transmitter Positive DATA In (PECL) Transmitter Negative DATA In (PECL) 19 TD- Module Definition 4, 5, 6 MOD_DEF(0:2) Module Definition Identifiers ROHS-COMPlIANT 2.125, 1.25 AND 1.063 GBPS 850 NM TRANSCEIvER  2.3 Absolute maximum ratings Parameter Storage temperature Operating case temperature Power supply voltage Transmitter differential input voltage Relative humidity Symbol Tst Tc Vcc VD RH Ratings -40 to +95 -40 to +85 0 to +4.0 2.5 5 to 95 Unit ˚C ˚C V VP-P % 2.4 Electrical characteristics Parameter Supply voltage Data rate Operating temperature range Transmitter Supply current Data input voltage swing Data input rise/fall time Data input rise/fall time Data input skew Data input deterministic jitter Data input deterministic jitter Data input deterministic jitter Data input total jitter Data input total jitter Data input total jitter Transmit disable voltage level Symbol Vcc Tc Tc ICCT VTDp-p Min 2.97 1.0 -40 -20 Typical 3.3 2.125 Max 3.63 2.2 85 85 70 2200 175 350 20 0.12 0.14 0.1 0.25 0.26 0.24 Unit V Gbps °C °C mA mVp-p ps ps ps UI UI UI UI UI UI V V µs ms V V µs µs ms Notes BER < 1x10-12 for 1G datatrates for 2G datarates 250 60 60 40 800 Differential, peak to peak 20% - 80%, differential 2 GBd operation 3 20% - 80%, differential 1 GBd operation 3 ±K28.5 pattern, δT, @ 1.062 Gbps 1, 5 ±K28.5 pattern, δT, @ 2.125 Gbps 1, 5 ±K28.5 pattern, TP1, @ 1.25 Gbps 1, 5 27-1 pattern, δT, BER < 1x10-12, @ 1.062 Gbps 1, 5 27-1 pattern, δT, BER < 1x10-12, @ 2.125Gbps 1, 5 27-1 pattern, TP1, BER < 1x10-12, @ 1.25 Gbps 1, 5 Laser output disabled after TTD if input level is VIH; laser output enabled after TTEN if input level is VIL Laser output disabled after TTD if input level is VIH; laser output enabled after TTEN if input level is VIL Transmit fault level is VOH and laser output disabled TFault after laser fault. Transmitter fault is VOL and laser output restored TINI after transmitter disable is asserted for TReset, then disabled. After hot plug or Vcc ≥ 2.97V DJ DJ DJ TJ TJ TJ VIH VIL TTD TTEN VOH VOL TFault TReset TINI Vcc -0.5 0 10 Vcc -1.0 0 Vcc 0.8 10 1 Vcc 0.5 100 Transmit disable/enable assert time Transmit fault output voltage level Transmit fault assert and reset times Initialization time 300 ROHS-COMPlIANT 2.125, 1.25 AND 1.063 GBPS 850 NM TRANSCEIvER  2.4 Electrical characteristics (continued) Parameter Receiver Supply current Data output voltage swing Data output rise/fall time Data output skew Data output deterministic jitter Data output deterministic jitter Data output deterministic jitter Total jitter Total jitter Total jitter Loss of signal voltage level Symbol Min Typical Max Unit Notes ICCR 600 85 90 120 200 50 0.36 0.39 0.46 0.61 0.64 0.75 DJ DJ DJ TJ TJ TJ VOH VOL Vcc -0.5 0 mA mVp-p ps ps UI UI UI UI UI UI V V µs µs Vcc 0.5 100 100 Loss of signal assert/deassert time TLOSA TLOSD RLOAD = 100 W, differential 20% - 80%, differential RLOAD = 100 W, differential ±K28.5 pattern, δR, @ 1.062 Gbps 1, 9 ±K28.5 pattern, δR, @ 2.125 Gbps 1, 5 ±K28.5 pattern, TP4, @ 1.25 Gbps 1, 5 27-1 pattern, δR , BER < 1x10-12 @ 1.062 Gbps 1, 5 27-1 pattern, δR , BER < 1x10-12 @ 2.125 Gbps 1, 5 27-1 pattern, TP4, BER < 1x10-12 @ 1.25 Gbps 1, 5 LOS output level VOL TLOSD after light input > LOSD 2 LOS output level VOH TLOSA after light input < LOSA 2 LOS output level VOL TLOSD after light input > LOSD 2 LOS output level VOH TLOSA after light input < LOSA 2 ROHS-COMPlIANT 2.125, 1.25 AND 1.063 GBPS 850 NM TRANSCEIvER 10 2.5 Optical characteristics Parameter Transmitter Wavelength RMS spectral width Average optical power Optical output rise/fall time Optical modulation amplitude Extinction ratio Deterministic jitter Deterministic jitter Deterministic jitter Total jitter Total jitter Total jitter Relative intensity noise (OMA) Receiver Wavelength Maximum input power Sensitivity (OMA) Symbol lp Dl PAVG trise/fall OMA ER DJ DJ DJ TJ TJ TJ RIN12 OMA l Pm S1 S2 ISI = 0.96 dB ISI = 2.18 dB ISI = 2.2 dB ISI = 2.6 dB ISI = 1.26 dB ISI = 2.03 dB LOSD LOSA FC Min Typical Max Unit Notes 830 -9.5 200 9 850 0.5 500 860 0.85 -2.5 150 1125 0.21 0.26 0.20 0.43 0.44 0.43 -117 860 31 49 -125 770 0 850 12 16 55 67 69 87 96 109 -21 -30 0.2 nm nm dBm ps µW dB UI UI UI UI UI UI dB/Hz nm dBm µWp-p µWp-p µWp-p µWp-p µWp-p µWp-p µWp-p µWp-p dBm dBm MHz 20% - 80% ±K28.5 pattern, γT, @ 1.062 Gbps 1, 5 ±K28.5 pattern, γT, @ 2.125 Gbps 1, 5 ±K28.5 pattern, TP2, @ 1.25 Gbps 1, 5 27-1 pattern, γT, @ 1.062 Gbps 1, 5 27-1 pattern, γT, @ 2.125 Gbps 1, 5 27-1 pattern, TP2, @ 1.25 Gbps 1, 5 2GHz, 12 dB reflection Stressed sensitivity (OMA) SS1.06 Stressed sensitivity (OMA) SS1.25 Stressed sensitivity (OMA) SS2.12 Loss of signal assert/deassert level Low frequency cutoff -17 0.3 1 Gbps operation, maximum is equivalent to -17dBm @9dB ER 2 Gbps operation 1.0625G operation 1.0625G operation 1.25G operation 1.25G operation 2.125G operation 2.125G operation Chatter free operation -3 dB, P