KML0D6NP20EA

SEMICONDUCTOR TECHNICAL DATA General Description It’s Mainly Suitable for Load Switching Cell Phones, Battery Powered Systems and Level-Shifter. KML0D6NP20EA N and P-Ch Trench MOSFET B B1 A1 A FEATURES ・N-Channel : VDSS=20V, ID=600mA (RDS(ON)=0.70Ω @ VGS=4.5V). : VDSS=20V, ID=500mA (RDS(ON)=0.85Ω @ VGS=2.5V). : VDSS=20V, ID=350mA (RDS(ON)=1.25Ω @ VGS=1.8V). ・P-Channel : VDSS=-20V, ID=-400mA (RDS(ON)=1.2Ω @ VGS=-4.5V). : VDSS=-20V, ID=-300mA (RDS(ON)=1.6Ω @ VGS=-2.5V). : VDSS=-20V, ID=-150mA (RDS(ON)=2.7Ω @ VGS=-1.8V). C 1 6 2 C 5 D 3 4 P P DIM A A1 B B1 C D H J P MILLIMETERS _ 1.6 + 0.05 _ 1.0 + 0.05 _ 1.6 + 0.05 _ 1.2 + 0.05 0.50 _ 0.2 + 0.05 _ 0.5 + 0.05 _ 0.12 + 0.05 5 H 1. Source 1 2. Gate 1 3. Drain 2 4. Source 2 5. Gate 2 6. Drain 1 TES6 MAXIMUM RATING (Ta=25℃) CHARACTERISTIC Drain-Source Voltage Gate-Source Voltage DC @TA=25℃ Drain Current DC @TA=85℃ Pulsed Source-Drain Diode Current Drain Power Dissipation Maximum Junction Temperature Storage Temperature Range Thermal Resistance, Junction to Ambient SYMBOL VDSS VGSS ID* IDP IS P D* Tj Tstg RthJA* N-Ch 20 ±6 515 370 650 450 280 150 -55～150 446 P-Ch -20 ±6 -390 -280 mA -650 -450 280 mW ℃ ℃ ℃/W UNIT V V Marking Lot No. Type Name A1 Note 1) *Surface Mounted on FR4 Board, t≤5sec PIN CONNECTION (TOP VIEW) S1 G1 D2 1 6 D1 G2 S2 1 2 3 6 5 4 2 5 3 4 2008. 9. 10 Revision No : 3 J 1/6 KML0D6NP20EA ELECTRICAL CHARACTERISTICS (Ta=25℃) CHARACTERISTIC Static Drain-Source Breakdown Voltage BVDSS ID=250μ VGS=0V A, ID=-250μ VGS=0V A, VGS=0V, VDS=16V Drain Cut-off Current IDSS VGS=0V, VDS=-16V Gate Leakage Current IGSS VGS=±4.5V, VDS=0V VDS=VGS, ID=250μ A VDS=VGS, ID=-250μ A VGS=4.5V, ID=600mA VGS=-4.5V, ID=-350mA VGS=2.5V, ID=500mA Drain-Source ON Resistance RDS(ON)* VGS=-2.5V, ID=-300mA VGS=1.8V, ID=350mA VGS=-1.8V, ID=-150mA VGS=4.5V, VDS=5V ON State Drain Current ID(ON)* VGS=-4.5V, VDS=-5V VDS=10V, ID=400mA Forward Transconductance Source-Drain Diode Forward Voltage Dynamic N-Ch Total Gate Charge Qg* P-Ch Gate-Source Charge Qgs* N-Ch : VDS=10V, ID=250mA, VGS=4.5V P-Ch : VDS=-10V, ID=-250mA, VGS=-4.5V N-Ch P-Ch N-Ch Gate-Drain Charge Qgd* P-Ch Turn-on Delay time td(on)* N-Ch : VDD=10V, ID=200mA, VGS=4.5V, RG=10Ω P-Ch : VDD=-10V, VGS=-4.5V, ID=-200mA, RG=10Ω N-Ch P-Ch N-Ch P-Ch 450 5 5 25 35 ns 1500 75 150 225 pC 750 gfs* VDS=-10V, ID=-250mA IS=150mA, VGS=0V VSD* IS=-150mA, VGS=0V P-Ch -0.8 -1.2 P-Ch N-Ch 0.4 0.8 1.2 V P-Ch N-Ch -700 1.0 S P-Ch N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch N-Ch Gate Threshold Voltage Vth 0.45 -0.45 700 -0.3 ±0.5 ±1.0 0.41 0.80 0.53 1.20 0.70 1.80 -100 ±1.0 μ A ±2.0 1.0 V -1.0 0.70 1.20 0.85 1.60 1.25 2.70 mA Ω N-Ch P-Ch N-Ch 20 -20 0.3 V 100 nA SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT Turn-off Delay time td(off)* Note 2) *Pulse test : Pulse width≤300㎲, Duty Cycle≤2%. 2008. 9. 10 Revision No : 3 2/6 KML0D6NP20EA N-Channel Fig 1. ID - VDS 1.0 Fig 2. RDS(on) - ID Drain-Source On Resistance RDS(on) (Ω) 4.0 3.2 2.4 1.6 0.8 0.0 VGS=2.5V VGS=1.8V VGS=2.5V VGS=1.8V Drain Current ID (A) 0.8 VGS=2.0V 0.6 VGS=5,4,3V 0.4 0.2 VGS=1.0V 0.0 0.0 VGS=4.5V 0.5 1.0 1.5 2.0 2.5 3.0 0 0.2 0.4 0.6 0.8 1.0 Drain - Source Voltage VDS (V) Drain - Current ID (A) 1.0 -55 C Normalized Drain-Source On Resistance RDS(on) (Ω) Fig 3. ID - VGS Fig 4. RDS(ON) - Tj 1.6 1.4 1.2 1.0 0.8 0.6 -50 VGS = 4.5V ID = 350mA Drain Current ID (A) 0.8 25 C TC=125 C 0.6 0.4 0.2 0.0 0.0 0.5 1.0 1.5 2.0 2.5 -25 0 25 50 75 100 125 Gate - Source Voltage VGS (V) Junction Temperature Tj ( C) Fig 5. Vth - Tj Gate Threshold Voltage Vth (V) ID = 250µA Fig 6. IDR - VSDF Reverse Drain Current IDR (mA) 1000 Tj=125 C 0.3 0.2 0.1 -0.0 -0.1 -0.2 -0.3 -50 100 25 C 50 C 10 -25 0 25 50 75 100 125 1 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 Junction Temperature Tj ( C) Source - Drain Forward Voltage VSDF (V) 2008. 9. 10 Revision No : 3 3/6 KML0D6NP20EA Fig 7. VGS - Qg 5 100 VDS = 10V ID = 250mA Fig 8. C - VDS VGS = 0V f = 1MHz Gate - Source Voltage VGS (V) Capacitance C (pF) 4 3 2 1 0 0.0 0.2 0.4 0.6 0.8 80 Ciss 60 40 20 0 0 4 8 12 16 20 Coss Crss Total Gate - Charge Qg (nC) Drain - Source Voltage VDS (V) Normalized Effective Transient Thermal Resistance Fig 9. Transient Thermal Response Curve 100 Duty=0.5 0.2 0.1 PDM t1 t2 0.02 SINGLE 10-1 0.05 - Duty cycle D = t1/t2 - Per Unit Base = RthJA = 500 C /W 10-3 10-2 10-1 100 101 102 103 10-2 10-4 Square Wave Pulse Duration (sec) 2008. 9. 10 Revision No : 3 4/6 KML0D6NP20EA P-Channel Fig 1. ID - VDS 1.0 VGS=5V Fig 2. RDS(on) - ID Drain-Source On Resistance RDS(on) (Ω) 4.0 3.2 2.4 VGS=1.8V VGS=4V VGS=3V VGS=2.5V Drain Current ID (A) 0.8 0.6 VGS=2V 0.4 0.2 0.0 0.0 VGS=1.8V 1.6 0.8 0.0 VGS=2.5V VGS=4.5V 0.5 1.0 1.5 2.0 2.5 3.0 0 0.2 0.4 0.6 0.8 1.0 Drain - Source Voltage VDS (V) Drain - Current ID (A) 1.0 -55 C Normalized Drain-Source On Resistance RDS(on) (Ω) Fig 3. ID - VGS Fig 4. RDS(ON) - Tj 1.6 1.4 1.2 1.0 0.8 0.6 -50 VGS = 4.5V ID = 350mA Drain Current ID (A) 0.8 25 C 0.6 0.4 0.2 0.0 0.0 TC=125 C 0.5 1.0 1.5 2.0 2.5 3.0 -25 0 25 50 75 100 125 Gate - Source Voltage VGS (V) Junction Temperature Tj ( C) Fig 5. Vth - Tj Gate Threshold Voltage Vth (V) ID = 250µA Fig 6. IDR - VSDF Reverse Drain Current IDR (mA) 1000 Tj=125 C 0.3 0.2 0.1 -0.0 -0.1 -0.2 -0.3 -50 100 25 C 10 -55 C -25 0 25 50 75 100 125 1 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 Junction Temperature Tj ( C) Source - Drain Forward Voltage VSDF (V) 2008. 9. 10 Revision No : 3 5/6 KML0D6NP20EA Fig 7. VGS - Qg 5 120 VDS = 10V ID = 250mA Fig 8. C - VDS VGS = 0V f = 1MHz Gate - Source Voltage VGS (V) Capacitance C (pF) 4 3 2 1 0 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 100 80 60 40 20 0 0 4 8 12 Coss Ciss Crss 16 20 Total Gate - Charge Qg (nC) Drain - Source Voltage VDS (V) Normalized Effective Transient Thermal Resistance Fig 9. Transient Thermal Response Curve 100 Duty=0.5 0.2 0.1 PDM t1 t2 0.02 SINGLE 10-1 0.05 - Duty cycle D = t1/t2 - Per Unit Base = RthJA = 500 C /W 10-3 10-2 10-1 100 101 102 103 10-2 10-4 Square Wave Pulse Duration (sec) 2008. 9. 10 Revision No : 3 6/6