Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)
Overview
KEMET’s X7R dielectric features a 125°C maximum
operating temperature and is considered temperature
stable. The Electronics Components, Assemblies and
Materials Association (EIA) characterizes X7R dielectric as
a Class II material. Components of this classification are
fixed, ceramic dielectric capacitors suited for bypass and
decoupling applications or for frequency discriminating
circuits where Q and stability of capacitance characteristics
are not critical. X7R exhibits a predictable change in
capacitance with respect to time and voltage, boasting a
minimal change in capacitance with reference to ambient
temperature. Capacitance change is limited to ±15% from
−55°C to +125°C.
Benefits
• −55°C to +125°C operating temperature range
• Lead (Pb)-free, RoHS, and REACH Compliant
• Temperature stable dielectric
• EIA 0402, 0603, 0805, 1206, 1210, 1808, 1812, 1825, 2220,
and 2225 case sizes
• DC voltage ratings of 6.3 V, 10 V, 16 V, 25 V, 35 V, 50 V,
100 V, 200 V, and 250 V
• Capacitance offerings ranging from 10 pF to 47 μF
• Available capacitance tolerances of ±5%, ±10%, and ±20%
• Non-polar device, minimizing installation concerns
• 100% pure matte tin-plated termination finish allowing for
excellent solderability
• SnPb termination finish option available upon request
(5% Pb minimum)
Applications
Typical applications include decoupling, bypass, filtering and transient voltage suppression.
Built Into Tomorrow
© KEMET Electronics Corporation • One East Broward Boulevard
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
C1002_X7R_SMD • 12/21/2023
1
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)
Ordering Information
C
1206
Ceramic
Case Size Specification/
(L" x W")
Series1
0402
0603
0805
1206
1210
1805
1808
1812
1825
2220
2225
1
2
C
C = Standard
106
M
4
R
A
Capacitance
Code (pF)
Capacitance
Tolerance
Rated Voltage
(VDC)
Dielectric
Failure Rate/
Design
J = ±5%
K = ±10%
M = ±20%
9 = 6.3
8 = 10
4 = 16
3 = 25
6 = 35
5 = 50
1 = 100
2 = 200
A = 250
R = X7R
A = N/A
Two
significant
digits and
number of
zeros.
C
TU
Termination
Packaging/
Finish2
Grade (C-Spec)
C = 100%
Matte Sn
See
“Packaging
C-Spec
Ordering
Options
Table”
Flexible termination option is available. Please see FT-CAP product bulletin C1013_X7R_FT-CAP_SMD.
Additional termination finish options may be available. Contact KEMET for details.
Packaging C-Spec Ordering Options Table
Packaging Type1
Bulk Bag/Unmarked
7" Reel/Unmarked
13" Reel/Unmarked
7" Reel/Marked
13" Reel/Marked
7" Reel/Unmarked/2 mm pitch2
13" Reel/Unmarked/2 mm pitch2
Packaging/Grade
Ordering Code (C-Spec)
Not required (Blank)
TU
7411 (EIA 0603 and smaller case sizes)
7210 (EIA 0805 and larger case sizes)
TM
7040 (EIA 0603)
7215 (EIA 0805 and larger case sizes)
7081
7082
Default packaging is "Bulk Bag." An ordering code C-Spec is not required for "Bulk Bag" packaging.
The terms "Marked" and "Unmarked" pertain to laser marking option of capacitors. All packaging options labeled as "Unmarked" will contain capacitors
that have not been laser marked. Please contact KEMET if you require a laser marked option. For more information see "Capacitor Marking."
2
The 2 mm pitch option allows for double the packaging quantity of capacitors on a given reel size. This option is limited to EIA 0603 (1608 metric) case
size devices. For more information regarding 2 mm pitch option see "Tape & Reel Packaging Information."
1
1
© KEMET Electronics Corporation • One East Broward Boulevard
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
C1002_X7R_SMD • 12/21/2023
2
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)
Dimensions – Millimeters (Inches)
L
W
B
T
S
EIA
Size
Code
Metric
Size
Code
L
Length
W
Width
B
Bandwidth
S
Mounting
Separation
Technique
Minimum
0402
1005
1.00 (0.040)
±0.05 (0.002)
0.50 (0.020)
±0.05 (0.002)
0.30 (0.012)
±0.10 (0.004)
0.30 (0.012)
06031
1608
08052
2012
12063
3216
1210 4
3225
1805
4513
1808
4520
1812
4532
1825
4564
2220
5650
2225
5664
1.60 (0.063)
±0.15 (0.006)
2.00 (0.079)
±0.20 (0.008)
3.20 (0.126)
±0.20 (0.008)
3.20 (0.126)
±0.20 (0.008)
4.50 (0.177)
±0.50 (0.020)
4.70 (0.185)
±0.50 (0.020)
4.50 (0.177)
±0.30 (0.012)
4.50 (0.177)
±0.30 (0.012)
5.70 (0.224)
±0.40 (0.016)
5.60 (0.220)
±0.40 (0.016)
0.80 (0.032)
±0.15 (0.006)
1.25 (0.049)
±0.20 (0.008)
1.60 (0.063)
±0.20 (0.008)
2.50 (0.098)
±0.20 (0.008)
1.27 (0.050)
±0.38 (0.015)
2.00 (0.079)
±0.20 (0.008)
3.20 (0.126)
±0.30 (0.012)
6.40 (0.252)
±0.40 (0.016)
5.00 (0.197)
±0.40 (0.016)
6.40 (0.248)
±0.40 (0.016)
0.35 (0.014)
±0.15 (0.006)
0.50 (0.02)
±0.25 (0.010)
0.50 (0.02)
±0.25 (0.010)
0.50 (0.02)
±0.25 (0.010)
0.60 (0.024)
±0.35 (0.014)
0.60 (0.024)
±0.35 (0.014)
0.60 (0.024)
±0.35 (0.014)
0.60 (0.024)
±0.35 (0.014)
0.60 (0.024)
±0.35 (0.014)
0.60 (0.024)
±0.35 (0.014)
0.70 (0.028)
T
Thickness
See Table 2
for Thickness
0.75 (0.030)
N/A
Solder reflow
only
Solder wave or
Solder reflow
Solder reflow
only
For capacitance capacitance value 0.22 µF 50V add 0.10 (0.004) to length
For capacitance values ≥ 2.2 µF add 0.10 (0.004) to the length tolerance dimension.
3
For capacitance value 10 µF 16 V add 0.10 (0.004) to the length tolerance dimension. For capacitance value 10 nF 10 µF 120 Hz ±10 Hz and 0.5 ±0.1 Vrms
* See part number specifi cation sheet for voltage
Capacitance measurements (including tolerance)
are indexed to a referee time of 48 or 1,000 hours
Please refer to a part number specifi cation sheet
for referee time details
Within Tolerance
Within Specifi cation
EIA Case
Size
Rated DC
Voltage
< 16
0402
16
25
> 25
Capacitance
Dissipation Factor
(Maximum %)
< 0.1 µF
5.0
≥ 0.1 µF
10.0
< 0.1 µF
3.5
≥ 0.1 µF
10.0
< 0.1 µF
3.5
≥ 0.1 µF
10.0
All
2.5
< 16
5.0
16 / 25
0603
1
> 25
16 / 25
Dissipation
Factor (DF)
KEMET
Internal
< 16
16 / 25
08052
C > 10 µF
Frequency: 120 Hz ±10 Hz
Voltage: 0.5 ±0.1 Vrms
> 25
< 16
> 25
< 2.2 µF
≥ 2.2 µF
< 16
> 25
< 16
16 / 25
< 10 µF
10.0
5.0
3.5
2.5
≥ 10 µF
10.0
< 22 µF
> 25
3.5
2.5
< 16
≥ 22 µF
< 16
10.0
5.0
16 / 25
> 25
3.5
2.5
5.0
16 / 25
1805 – 2225
5.0
All
< 16
16 / 25
1210 4
10.0
≥ 1.0 µF
16 / 25
1206 3
≥ 1.0 µF
< 1.0 µF
16 / 25
* See part number specifi cation sheet for voltage
3.5
2.5
< 16
C ≤ 10 µF
Frequency: 1 kHz ±50 Hz
Voltage*: 1.0 ±0.2 Vrms,0.5 ±0.2 Vrms
< 1.0 µF
All
3.5
2.5
For Cap value 0.22 µF (16 V and 25 V) DF is 5% and for Cap value 4.7 µF (25 V) DF is 3.5%.
2
For Cap value 1.0 µF (16 V and 25 V) DF is 5%.
3
For Cap value 2.2 µF (25 V) and ≥ 2.2 µF (35 and 50 V) DF is 10%. For Cap Value 1.0uF
(100V) DF is 5.0%. For Cap value 1.0 µF (50V & 35V) DF is 3.5%.
4
For Cap value 10uF (16V, 25V and 50V ) DF is 5%. For Cap value 4.7µF (50 V) DF is 5%. For
Cap value 2.2uF (100V) DF is 10%. For Cap value 1.0 µF (≤50V) DF is 5.0%.
1
© KEMET Electronics Corporation • One East Broward Boulevard
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
C1002_X7R_SMD • 12/21/2023
14
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)
X7R Performance and Reliability: SMD Test Methods and Conditions cont.
Test
Reference
Test
Condition
Limits
Within Specifi cation
To obtain IR limit, divide MΩ - µF value by the capacitance and compare to GΩ limit.
Select the lower of the two limits.
Insulation Resistance (IR) Limits Table
EIA
Case Size
Rated DC
Voltage
1,000 megohm
microfarads or 100 GΩ
500 megohm
microfarads or 10 GΩ
100 megohm
microfarads or 10 GΩ
0402
ALL
< 0.012 µF
≥ 0.012 µF < 0.47 µf
≥ 0.47 µf
≤ 200 V
< 0.047 µF
≥ 0.047 µf < 0.47 µf
≥ 0.47 µf
250 V
N/A
N/A
ALL
≤ 200 V
< 0.15 µF
≥ 0.15 µF < 2.2 µf
≥ 2.2 µf
250 V
< .027 µF
N/A
≥ .027 µF
≤ 200 V
< 0.47 µF
≥ 0.47 µF < 2.2 µf
≥ 2.2 µf
250 V
< 0.12 µF
N/A
≥ 0.12 µF
≤ 200 V
< 0.39 µF
≥ 0.39 µF < 10 µf
≥ 10 µf
250 V
< 0.27 µF
N/A
≥ 0.27 µF
1805
ALL
ALL
N/A
N/A
1808
ALL
ALL
N/A
N/A
1812
ALL
< 2.2 µF
≥ 2.2 µF
N/A
1825
ALL
ALL
N/A
N/A
2220
ALL
< 10 µF
≥ 10 µF
N/A
2225
ALL
ALL
N/A
N/A
06031
08052
Insulation
Resistance
(IR)
KEMET
Internal
12063
Apply rated
voltage for
120 seconds
at 25°C
12104
For Cap value 10 nF (≤ 100 V) IR should be calculated under 500 megohm microfarads or 10 GΩ.
For Cap values 5.6nF, 6.8nF, 8.2nF & 10nF (100V) IR should be calculated under 500 megohm microfarads or 10 GΩ.
2
For Cap value 1.0µF (50 V) IR should be calculated under 100 megohm microfarads or 10 GΩ.
For Cap value 0.1uF (≤ 50V ) IR should be calculated under 500 mohms or 10GOhms
3
For Cap value 4.7µF (50 V) IR should be calculated under 100 megohm microfarads or 10 GΩ.
For Capacitance value 10nF (≤ 250V) IR should be calculated under 500 megohm microfarads or 10 GΩ.
For Capacitance value 100nF (250V & 200V) IR should be calculated under 500 megohm microfarads or 10 GΩ.
4
For Capa value 4.7µF (50 V) IR should be calculated under 100 megohm microfarads or 10 GΩ.
For Capacitance value 220nF (≤50V) IR should be calculated under 500 megohm microfarads or 10 GΩ.
1
© KEMET Electronics Corporation • One East Broward Boulevard
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
C1002_X7R_SMD • 12/21/2023
15
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)
X7R Performance and Reliability: SMD Test Methods and Conditions cont.
Test
Temperature
Coeffi cient of
Capacitance
(TCC)
Reference
Test Condition
Limits
C ≤ 10µF
Frequency: 1 kHz ±50 Hz
Voltage*: 1.0 ±0.2 Vrms, 0.5 ±0.2 Vrms, 0.2 ±0.1 Vrms
C > 10µF
Frequency: 120 Hz ±10 Hz
Voltage: 0.5 ±0.1 Vrms
KEMET
Internal
Capacitance ±15% over
−55°C to +125°C
* See part number specifi cation sheet for voltage
Step
Temperature (°C)
1
+25°C
2
−55°C
3
+25°C (Reference)
4
+125°C
Cap: Initial Limit
DF: Initial Limit
IR: Initial Limit
Dielectric
Withstanding
Voltage
(DWV)
KEMET
Internal
250% of rated voltage
(5 ±1 seconds and charge/discharge not exceeding 50 mA)
Aging Rate
(Maximum %
Capacitance
Loss/Decade Hour)
KEMET
Internal
Capacitance measurements (including tolerance) are indexed to a
referee time of 48 or 1,000 hours.
Please refer to a part number specifi c datasheet for referee time
details.
Withstand test voltage without
insulation breakdown or damage.
Please refer to a part number
specifi cation sheet for specifi c
Aging rate
Shear stress test per specifi c case size, Time: 60±1 seconds
Terminal
Strength
Board
Flex
KEMET
Internal
AEC-Q200-005
Case
Size
Force
0201
2N
0402
3N
0603
5N
0805
9N
≥1206
18N
Standard Termination system 2.0 mm
Flexible Termination System 3.0 mm
Test time: 60± 5 seconds
Ramp time: 1 mm/second
© KEMET Electronics Corporation • One East Broward Boulevard
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
No evidence of mechanical
damage
No evidence of mechanical
damage
C1002_X7R_SMD • 12/21/2023
16
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)
X7R Performance and Reliability: SMD Test Methods and Conditions cont.
Test
Reference
Test Condition
Limits
Solderability
J-STD-002
Condition: 4 hours ± 15 minutes at 155°C dry bake apply
all methods
Test 245 ±5°C (SnPb and Pb-Free)
Visual Inspection.
95% coverage on termination.
No leaching
JESD22
Method JA-104
1,000 cycles (−55°C to +125°C)
2 – 3 cycles per hour
Soak Time 1 or 5 minutes
Measurement at 24 hours ±4 hours after
test conclusion.
Cap: Initial Limit
DF: Initial Limit
IR: Initial Limit
Temperature
Cycling
Measurement at 24 hours ±4 hours after
test conclusion.
Within Post Environmental Limits
Cap: ±20% shift
IR: 10% of Initial Limit
Biased
Humidity
MIL-STD-202
Method 103
Load Humidity:
1,000 hours 85°C/85% RH and rated voltage.
Low Volt Humidity:
1,000 hours 85C°/85% RH and 1.5 V.
DF Limits
Maximum (%)
Initial
Post
2.5
3.0
3.5
5.0
5.0
7.5
10.0
20.0
Measurement at 24 hours ±4 hours after
test conclusion.
Within Post Environmental Limits
Cap: ±20% shift
IR: 10% of Initial Limit
Moisture
Resistance
Thermal Shock
MIL-STD-202
Method 106
MIL-STD-202
Method 107
Number of cycles required 10, 24 hours per cycle.
Steps 7a and 7b not required.
Number of cycles required 5, (−55°C to 125°C)
Dwell time 15 minutes.
© KEMET Electronics Corporation • One East Broward Boulevard
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
DF Limits
Maximum (%)
Initial
Post
2.5
3.0
3.5
5.0
5.0
7.5
10.0
20.0
Cap: Initial Limit
DF: Initial Limit
IR: Initial Limit
C1002_X7R_SMD • 12/21/2023
17
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)
X7R Performance and Reliability: SMD Test Methods and Conditions cont.
Test
High
Temperature
Life
Reference
MIL-STD-202
Method 108
Storage Life
Test Condition
Limits
1,000 hours at 125°C with 2 X rated voltage applied
excluding the following:
Within Post Environmental Limits
Cap: ±20% shift
IR: 10% of Initial Limit
Case Size
Capacitance
0603 & 0805
≥ 1.0 µF
1206 & 1210
≥ 10 µF
Applied
Voltage
1.5 X
DF Limits
Maximum (%)
Initial
Post
2.5
3.0
3.5
5.0
5.0
7.5
10.0
20.0
1,000 hours at 125°C, Unpowered
Vibration
MIL-STD-202
Method 204
5 g's for 20 minutes, 12 cycles each of 3 orientations.
Test from 10 – 2,000 Hz
Cap: Initial Limit
DF: Initial Limit
IR: Initial Limit
Mechanical
Shock
MIL-STD-202
Method 213
1,500 g’s 0.5 ms Half-sine,
Velocity Change 15.4 feet/second
(Condition F)
Cap: Initial Limit
DF: Initial Limit
IR: Initial Limit
Resistance to
Solvents
MIL-STD-202
Method 215
Add Aqueous wash chemical OKEMCLEAN
(A 6% concentrated Oakite cleaner) or equivalent.
Do not use banned solvents.
Visual Inspection 10X
Readable marking,
no decoloration or stains.
No physical damage.
© KEMET Electronics Corporation • One East Broward Boulevard
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
C1002_X7R_SMD • 12/21/2023
18
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)
Storage & Handling
Ceramic chip capacitors should be stored in normal working environments. While the chips themselves are quite robust in
other environments, solderability will be degraded by exposure to high temperatures, high humidity, corrosive atmospheres,
and long term storage. In addition, packaging materials will be degraded by high temperature – reels may soften or warp
and tape peel force may increase. KEMET recommends that maximum storage temperature not exceed 40°C and maximum
storage humidity not exceed 70% relative humidity. Temperature fluctuations should be minimized to avoid condensation on
the parts and atmospheres should be free of chlorine and sulfur bearing compounds. For optimized solderability chip stock
should be used promptly, preferably within 1.5 years of receipt.
Construction (Typical)
Detailed Cross Section
Dielectric Material
(BaTiO3)
Barrier Layer
(Ni)
Termination
Finish
(100% Matte Sn)
Dielectric
Material (BaTiO3)
End Termination/
External Electrode
(Cu)
Inner Electrodes
(Ni)
End Termination/
External Electrode
(Cu)
Barrier Layer
(Ni)
Termination
Finish
(100% Matte Sn)
Inner Electrodes
(Ni)
© KEMET Electronics Corporation • One East Broward Boulevard
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
C1002_X7R_SMD • 12/21/2023
19
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)
Capacitor Marking (Optional)
These surface mount multilayer ceramic capacitors are
normally supplied unmarked. If required, they can be
marked as an extra cost option. Marking is available
on most KEMET devices, but must be requested using
the correct ordering code identifi er(s). If this option is
requested, two sides of the ceramic body will be laser
marked with a “K” to identify KEMET, followed by two
characters (per EIA–198 - see table below) to identify the
capacitance value. EIA 0603 case size devices are limited
to the “K” character only.
Marking appears in legible contrast. Illustrated below
is an example of an MLCC with laser marking of “KA8”,
which designates a KEMET device with rated capacitance
of 100 µF. Orientation of marking is vendor optional.
KEMET
ID
2-Digit
Capacitance
Code
Laser marking option is not available on:
• C0G, ultra stable X8R and Y5V dielectric devices.
• EIA 0402 case size devices.
• EIA 0603 case size devices with fl exible termination
option.
• KPS commercial and automotive grade stacked
devices.
• X7R dielectric products in capacitance values outlined
below.
EIA Case Size
Metric Size Code
Capacitance
0603
0805
1206
1210
1808
1812
1825
2220
2225
1608
2012
3216
3225
4520
4532
4564
5650
5664
≤ 170 pF
≤ 150 pF
≤ 910 pF
≤ 2,000 pF
≤ 3,900 pF
≤ 6,700 pF
≤ 0.018 µF
≤ 0.027 µF
≤ 0.033 µF
© KEMET Electronics Corporation • One East Broward Boulevard
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
C1002_X7R_SMD • 12/21/2023
20
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)
Capacitor Marking (Optional) cont.
Capacitance (pF) For Various Alpha/Numeral Identifiers
Numeral
Alpha
Character
9
A
0.10
1.0
10
100
1,000
10,000
B
0.11
1.1
11
110
1,100
11,000
C
0.12
1.2
12
120
1,200
12,000
D
0.13
1.3
13
130
1,300
E
0.15
1.5
15
150
1,500
0
1
2
3
4
5
6
7
8
100,000
1,000,000
10,000,000
100,000,000
110,000
1,100,000
11,000,000
110,000,000
120,000
1,200,000
12,000,000
120,000,000
13,000
130,000
1,300,000
13,000,000
130,000,000
15,000
150,000
1,500,000
15,000,000
150,000,000
160,000,000
Capacitance (pF)
F
0.16
1.6
16
160
1,600
16,000
160,000
1,600,000
16,000,000
G
0.18
1.8
18
180
1,800
18,000
180,000
1,800,000
18,000,000
180,000,000
H
0.20
2.0
20
200
2,000
20,000
200,000
2,000,000
20,000,000
200,000,000
J
0.22
2.2
22
220
2,200
22,000
220,000
2,200,000
22,000,000
220,000,000
K
0.24
2.4
24
240
2,400
24,000
240,000
2,400,000
24,000,000
240,000,000
L
0.27
2.7
27
270
2,700
27,000
270,000
2,700,000
27,000,000
270,000,000
M
0.30
3.0
30
300
3,000
30,000
300,000
3,000,000
30,000,000
300,000,000
N
0.33
3.3
33
330
3,300
33,000
330,000
3,300,000
33,000,000
330,000,000
P
0.36
3.6
36
360
3,600
36,000
360,000
3,600,000
36,000,000
360,000,000
Q
0.39
3.9
39
390
3,900
39,000
390,000
3,900,000
39,000,000
390,000,000
R
0.43
4.3
43
430
4,300
43,000
430,000
4,300,000
43,000,000
430,000,000
470,000,000
S
0.47
4.7
47
470
4,700
47,000
470,000
4,700,000
47,000,000
T
0.51
5.1
51
510
5,100
51,000
510,000
5,100,000
51,000,000
510,000,000
U
0.56
5.6
56
560
5,600
56,000
560,000
5,600,000
56,000,000
560,000,000
V
0.62
6.2
62
620
6,200
62,000
620,000
6,200,000
62,000,000
620,000,000
W
0.68
6.8
68
680
6,800
68,000
680,000
6,800,000
68,000,000
680,000,000
X
0.75
7.5
75
750
7,500
75,000
750,000
7,500,000
75,000,000
750,000,000
Y
0.82
8.2
82
820
8,200
82,000
820,000
8,200,000
82,000,000
820,000,000
Z
0.91
9.1
91
910
9,100
91,000
910,000
9,100,000
91,000,000
910,000,000
a
0.25
2.5
25
250
2,500
25,000
250,000
2,500,000
25,000,000
250,000,000
b
0.35
3.5
35
350
3,500
35,000
350,000
3,500,000
35,000,000
350,000,000
d
0.40
4.0
40
400
4,000
40,000
400,000
4,000,000
40,000,000
400,000,000
e
0.45
4.5
45
450
4,500
45,000
450,000
4,500,000
45,000,000
450,000,000
f
0.50
5.0
50
500
5,000
50,000
500,000
5,000,000
50,000,000
500,000,000
m
0.60
6.0
60
600
6,000
60,000
600,000
6,000,000
60,000,000
600,000,000
n
0.70
7.0
70
700
7,000
70,000
700,000
7,000,000
70,000,000
700,000,000
t
0.80
8.0
80
800
8,000
80,000
800,000
8,000,000
80,000,000
800,000,000
y
0.90
9.0
90
900
9,000
90,000
900,000
9,000,000
90,000,000
900,000,000
© KEMET Electronics Corporation • One East Broward Boulevard
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
C1002_X7R_SMD • 12/21/2023
21
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)
Tape & Reel Packaging Information
KEMET offers multilayer ceramic chip capacitors packaged in 8, 12 and 16 mm tape on 7" and 13" reels in accordance with
EIA Standard 481. This packaging system is compatible with all tape-fed automatic pick and place systems. See Table 2 for
details on reeling quantities for commercial chips.
Bar code label
Anti-static reel
®
Embossed plastic* or
punched paper carrier.
ET
KEM
Chip and KPS orientation in pocket
(except 1825 commercial, and 1825 and 2225 Military)
Sprocket holes
Embossment or punched cavity
8 mm, 12 mm
or 16 mm carrier tape
180 mm (7.00")
or
330 mm (13.00")
Anti-static cover tape
(0.10 mm (0.004") maximum thickness)
*EIA 01005, 0201, 0402 and 0603 case sizes available on punched paper carrier only.
Table 5 – Carrier Tape Configuration, Embossed Plastic & Punched Paper (mm)
EIA Case Size
Tape
Size
(W)*
Embossed Plastic
7" Reel
13" Reel
Pitch (P1)*
Punched Paper
7" Reel
13" Reel
Pitch (P1)*
01005 – 0402
8
2
2
0603
8
2/4
2/4
0805
8
4
4
4
4
1206 – 1210
8
4
4
4
4
1805 – 1808
12
4
4
≥ 1812
12
8
8
KPS 1210
12
8
8
KPS 1812
and 2220
16
12
12
Array 0612
8
4
4
*Refer to Figures 1 and 2 for W and P1 carrier tape reference locations.
*Refer to Tables 6 and 7 for tolerance specifications.
© KEMET Electronics Corporation • One East Broward Boulevard
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
New 2 mm Pitch Reel Options*
Packaging
Ordering Code
(C-Spec)
Packaging Type/Options
C-3190
C-3191
C-7081
C-7082
Automotive grade 7" reel unmarked
Automotive grade 13" reel unmarked
Commercial grade 7" reel unmarked
Commercial grade 13" reel unmarked
* 2 mm pitch reel only available for 0603 EIA case size.
2 mm pitch reel for 0805 EIA case size under development.
Benefits of Changing from 4 mm to 2 mm Pitching Spacing
• Lower placement costs.
• Double the parts on each reel results in fewer reel
changes and increased effi ciency.
• Fewer reels result in lower packaging, shipping and
storage costs, reducing waste.
C1002_X7R_SMD • 12/21/2023
22
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)
Figure 1 – Embossed (Plastic) Carrier Tape Dimensions
P2
T
T2
ØD0
(10 pitches cumulative
tolerance on tape ±0.2 mm)
P0
A0
E1
F
K0
B1
E2
B0
S1
W
P1
T1
Center Lines of Cavity
B1 is for tape feeder reference only,
including draft concentric about B0.
Embossment
For cavity size,
see Note 1 Table 4
ØD1
Cover Tape
User Direction of Unreeling
Table 6 – Embossed (Plastic) Carrier Tape Dimensions
Metric will govern
Constant Dimensions — Millimeters (Inches)
Tape Size
D0
8 mm
12 mm
1.5 +0.10/−0.0
(0.059 +0.004/−0.0)
16 mm
D1 Minimum
Note 1
1.0
(0.039)
1.5
(0.059)
R Reference S1 Minimum
T
Note 2
Note 3
Maximum
25.0
(0.984)
1.75 ±0.10
4.0 ±0.10
2.0 ±0.05
0.600
0.600
(0.069 ±0.004) (0.157 ±0.004) (0.079 ±0.002)
(0.024)
(0.024)
30
(1.181)
E1
P0
P2
T1
Maximum
0.100
(0.004)
Variable Dimensions — Millimeters (Inches)
Tape Size
8 mm
12 mm
16 mm
B1 Maximum
Note 4
4.35
Single (4 mm)
(0.171)
Single (4 mm)
8.2
and double (8 mm)
(0.323)
12.1
Triple (12 mm)
(0.476)
Pitch
E2
Minimum
6.25
(0.246)
10.25
(0.404)
14.25
(0.561)
F
P1
3.5 ±0.05
4.0 ±0.10
(0.138 ±0.002) (0.157 ±0.004)
5.5 ±0.05
8.0 ±0.10
(0.217 ±0.002) (0.315 ±0.004)
7.5 ±0.05
12.0 ±0.10
(0.138 ±0.002) (0.157 ±0.004)
T2
Maximum
2.5
(0.098)
4.6
(0.181)
4.6
(0.181)
W
Maximum
8.3
(0.327)
12.3
(0.484)
16.3
(0.642)
A0,B0 & K0
Note 5
1. The embossment hole location shall be measured from the sprocket hole controlling the location of the embossment. Dimensions of the embossment
location and the hole location shall be applied independently of each other.
2. The tape with or without components shall pass around R without damage (see Figure 6.)
3. If S1 < 1.0 mm, there may not be enough area for a cover tape to be properly applied (see EIA Standard 481, paragraph 4.3, section b.)
4. B1 dimension is a reference dimension for tape feeder clearance only.
5. The cavity defined by A0, B0 and K0 shall surround the component with sufficient clearance that:
(a) the component does not protrude above the top surface of the carrier tape.
(b) the component can be removed from the cavity in a vertical direction without mechanical restriction, after the top cover tape has been
removed.
(c) rotation of the component is limited to 20° maximum for 8 and 12 mm tapes and 10° maximum for 16 mm tapes (see Figure 3.)
(d) lateral movement of the component is restricted to 0.5 mm maximum for 8 and 12 mm wide tape and to 1.0 mm maximum for 16 mm tape
(see Figure 4.)
(e) for KPS product, A0 and B0 are measured on a plane 0.3 mm above the bottom of the pocket.
(f) see addendum in EIA Standard 481 for standards relating to more precise taping requirements.
© KEMET Electronics Corporation • One East Broward Boulevard
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
C1002_X7R_SMD • 12/21/2023
23
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)
Figure 2 – Punched (Paper) Carrier Tape Dimensions
T
Po
ØDo
(10 pitches cumulative
tolerance on tape ±0.2 mm)
A0
F
P1
T1
T1
Top Cover Tape
W
E2
B0
Bottom Cover Tape
E1
G
Cavity Size,
See
Note 1, Table 7
Center Lines of Cavity
Bottom Cover Tape
User Direction of Unreeling
Table 7 – Punched (Paper) Carrier Tape Dimensions
Metric will govern
Constant Dimensions — Millimeters (Inches)
Tape Size
D0
E1
P0
P2
T1 Maximum
G Minimum
8 mm
1.5 +0.10 -0.0
(0.059 +0.004 -0.0)
1.75 ±0.10
(0.069 ±0.004)
4.0 ±0.10
(0.157 ±0.004)
2.0 ±0.05
(0.079 ±0.002)
0.10
(0.004)
maximum
R Reference
Note 2
0.75
(0.030)
25
(0.984)
Variable Dimensions — Millimeters (Inches)
Tape Size
Pitch
8 mm
Half (2 mm)
8 mm
Single (4 mm)
E2 Minimum
F
P1
T Maximum
W Maximum
A0 B 0
6.25
(0.246)
3.5 ±0.05
(0.138 ±0.002)
2.0 ±0.05
(0.079 ±0.002)
4.0 ±0.10
(0.157 ±0.004)
1.1
(0.098)
8.3
(0.327)
8.3
(0.327)
Note 1
1. The cavity defined by A0, B0 and T shall surround the component with sufficient clearance that:
a) the component does not protrude beyond either surface of the carrier tape.
b) the component can be removed from the cavity in a vertical direction without mechanical restriction, after the top cover tape has been
removed.
c) rotation of the component is limited to 20° maximum (see Figure 3.)
d) lateral movement of the component is restricted to 0.5 mm maximum (see Figure 4.)
e) see addendum in EIA Standard 481 for standards relating to more precise taping requirements.
2. The tape with or without components shall pass around R without damage (see Figure 6.)
© KEMET Electronics Corporation • One East Broward Boulevard
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
C1002_X7R_SMD • 12/21/2023
24
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)
Packaging Information Performance Notes
1. Cover Tape Break Force: 1.0 kg minimum.
2. Cover Tape Peel Strength: The total peel strength of the cover tape from the carrier tape shall be:
Tape Width
Peel Strength
8 mm
0.1 to 1.0 newton (10 to 100 gf)
12 and 16 mm
0.1 to 1.3 newton (10 to 130 gf)
The direction of the pull shall be opposite the direction of the carrier tape travel. The pull angle of the carrier tape shall be
165° to 180° from the plane of the carrier tape. During peeling, the carrier and/or cover tape shall be pulled at a velocity of
300 ±10 mm/minute.
3. Labeling: Bar code labeling (standard or custom) shall be on the side of the reel opposite the sprocket holes. Refer to EIA
Standards 556 and 624.
Figure 3 – Maximum Component Rotation
°
T
Maximum Component Rotation
Top View
Maximum Component Rotation
Side View
Typical Pocket Centerline
Tape
Maximum
Width (mm) Rotation (
8,12
20
16 – 200
10
Bo
°
T)
Typical Component Centerline
Ao
Figure 4 – Maximum Lateral Movement
8 mm & 12 mm Tape
0.5 mm maximum
0.5 mm maximum
°
s
Tape
Width (mm)
8,12
16 – 56
72 – 200
Maximum
Rotation (
20
10
5
Figure 5 – Bending Radius
Embossed
Carrier
16 mm Tape
°
S)
Punched
Carrier
1.0 mm maximum
1.0 mm maximum
R
© KEMET Electronics Corporation • One East Broward Boulevard
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
Bending
Radius
R
C1002_X7R_SMD • 12/21/2023
25
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)
Figure 6 – Reel Dimensions
Full Radius,
See Note
W3
(Includes
flange distortion
at outer edge)
Access Hole at
Slot Location
(Ø 40 mm minimum)
W2
D
A
(See Note)
N
C
(Arbor hole
diameter)
B
(see Note)
(Measured at hub)
W1
(Measured at hub)
If present,
tape slot in core
for tape start:
2.5 mm minimum width x
10.0 mm minimum depth
Note: Drive spokes optional; if used, dimensions B and D shall apply.
Table 8 – Reel Dimensions
Metric will govern
Constant Dimensions — Millimeters (Inches)
Tape Size
A
B Minimum
C
D Minimum
8 mm
178 ±0.20
(7.008 ±0.008)
or
330 ±0.20
(13.000 ±0.008)
1.5
(0.059)
13.0 +0.5/−0.2
(0.521 +0.02/−0.008)
20.2
(0.795)
12 mm
16 mm
Variable Dimensions — Millimeters (Inches)
Tape Size
N Minimum
W1
W2 Maximum
W3
50
(1.969)
8.4 +1.5/−0.0
(0.331 +0.059/−0.0)
12.4 +2.0/−0.0
(0.488 +0.078/−0.0)
16.4 +2.0/−0.0
(0.646 +0.078/−0.0)
14.4
(0.567)
18.4
(0.724)
22.4
(0.882)
Shall accommodate tape
width without interference
8 mm
12 mm
16 mm
© KEMET Electronics Corporation • One East Broward Boulevard
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
C1002_X7R_SMD • 12/21/2023
26
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)
Figure 7 – Tape Leader & Trailer Dimensions
Embossed Carrier
Punched Carrier
8 mm & 12 mm only
END
Carrier Tape
Round Sprocket Holes
START
Top Cover Tape
Elongated Sprocket Holes
(32 mm tape and wider)
Trailer
160 mm minimum
Components
100 mm
minimum leader
400 mm minimum
Top Cover Tape
Figure 8 – Maximum Camber
Elongated Sprocket Holes
(32 mm & wider tapes)
Carrier Tape
Round Sprocket Holes
1 mm maximum, either direction
Straight Edge
250 mm
© KEMET Electronics Corporation • One East Broward Boulevard
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
C1002_X7R_SMD • 12/21/2023
27
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
X7R Dielectric, 6.3 – 250 VDC (Commercial Grade)
KEMET Electronics Corporation Sales Offices
For a complete list of our global sales offi ces, please visit www.kemet.com/sales.
Disclaimer
YAGEO Corporation and its affi liates do not recommend the use of commercial or automotive grade products for high reliability applications or manned space fl ight.
All product specifi cations, statements, information and data (collectively, the “Information”) in this datasheet are subject to change. The customer is responsible for
checking and verifying the extent to which the Information contained in this publication is applicable to an order at the time the order is placed. All Information given
herein is believed to be accurate and reliable, but it is presented without guarantee, warranty, or responsibility of any kind, expressed or implied.
Statements of suitability for certain applications are based on KEMET Electronics Corporation’s (“KEMET”) knowledge of typical operating conditions for such
applications, but are not intended to constitute – and KEMET specifi cally disclaims – any warranty concerning suitability for a specifi c customer application or use.
The Information is intended for use only by customers who have the requisite experience and capability to determine the correct products for their application. Any
technical advice inferred from this Information or otherwise provided by KEMET with reference to the use of KEMET’s products is given gratis, and KEMET assumes
no obligation or liability for the advice given or results obtained.
Although KEMET designs and manufactures its products to the most stringent quality and safety standards, given the current state of the art, isolated component
failures may still occur. Accordingly, customer applications which require a high degree of reliability or safety should employ suitable designs or other safeguards
(such as installation of protective circuitry or redundancies) in order to ensure that the failure of an electrical component does not result in a risk of personal injury
or property damage.
Although all product–related warnings, cautions and notes must be observed, the customer should not assume that all safety measures are indicated or that other
measures may not be required.
KEMET is a registered trademark of KEMET Electronics Corporation.
© KEMET Electronics Corporation • One East Broward Boulevard
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
C1002_X7R_SMD • 12/21/2023
28
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