Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Overview
KEMET’s X5R dielectric features an 85°C maximum
operating temperature and is considered “semi-stable.”
The Electronics Components, Assemblies & Materials
Association (EIA) characterizes X5R dielectric as a Class
II material. Components of this classification are fixed,
ceramic dielectric capacitors suited for bypass and
decoupling applications or for frequency discriminating
circuits where Q and stability of capacitance characteristics
are not critical. X5R exhibits a predictable change in
capacitance with respect to time and voltage and boasts a
minimal change in capacitance with reference to ambient
temperature. Capacitance change is limited to ±15% from
−55°C to +85°C.
Benefits
Applications
• −55°C to +85°C operating temperature range
• Lead (Pb)-free, RoHS and REACH compliant
• Temperature stable dielectric
• EIA 0201, 0402, 0603, 0805, 1206, 1210, and 1812
case sizes
• DC voltage ratings of 4 V, 6.3 V, 10 V, 16 V, 25 V, 35 V,
and 50 V
• Capacitance offerings ranging from 0.01 μF to 100 μF
• Available capacitance tolerances of ±10% and ±20%
• Non-polar device, minimizing installation concerns
• 100% pure matte tin-plated termination finish allowing
for excellent solderability
Typical applications include decoupling, bypass, and
filtering.
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Ordering Information
C
Ceramic
1206
107
Case Size Specification/ Capacitance
(L" x W")
Series
Code (pF)
0201
0402
0603
0805
1206
1210
1
C
C = Standard
Two
significant
digits and
number of
zeros.
M
9
P
A
C
TU
Failure Rate/
Capacitance Rated Voltage
Packaging/Grade
Termination Finish1
Dielectric
Design
Tolerance
(VDC)
(C–Spec)
K = ±10%
M = ±20%
7=4
9 = 6.3
8 = 10
4 = 16
3 = 25
6 = 35
5 = 50
P = X5R
A = N/A
C = 100% matte Sn
See
"Packaging
C-Spec
Ordering
Options Table"
Additional termination finish options may be available. Contact KEMET for details.
Built Into Tomorrow
© KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
C1006_X5R_SMD • 3/9/2021
1
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Packaging C-Spec Ordering Options Table
Packaging/Grade
Ordering Code (C-Spec)
Packaging Type1
Bulk Bag/Unmarked
7" Reel/Unmarked
13" Reel/Unmarked
7" Reel/Marked
13" Reel/Marked
7" Reel/Unmarked/2mm pitch2
13" Reel/Unmarked/2mm pitch2
Not required (Blank)
TU
7411 (EIA 0603 and smaller case sizes)
7210 (EIA 0805 and larger case sizes)
TM
7040 (EIA 0603)
7215 (EIA 0805 and larger case sizes)
7081
7082
Default packaging is "Bulk Bag". An ordering code C-Spec is not required for "Bulk Bag" packaging.
The terms "Marked" and "Unmarked" pertain to laser marking option of capacitors. All packaging options labeled as "Unmarked" will contain capacitors
that have not been laser marked. Please contact KEMET if you require a laser marked option. For more information see "Capacitor Marking".
2
The 2 mm pitch option allows for double the packaging quantity of capacitors on a given reel size. This option is limited to EIA 0603 (1608 metric) case
size devices. For more information regarding 2 mm pitch option see "Tape & Reel Packaging Information".
1
1
Dimensions – Millimeters (Inches)
L
W
B
T
S
EIA Size
Code
Metric Size
Code
L
Length
W
Width
0201
0603
0402
1
1005
06032
1608
0805
2012
12063
3216
1210 4
3225
0.60 (0.024)
±0.03 (0.001)
1.00 (0.040)
±0.05 (0.002)
1.60 (0.063)
±0.15 (0.006)
2.00 (0.079)
±0.20 (0.008)
3.20 (0.126)
±0.20 (0.008)
3.20 (0.126)
±0.20 (0.008)
0.30 (0.012)
±0.03 (0.001)
0.50 (0.020)
±0.05 (0.002)
0.80 (0.032)
±0.15 (0.006)
1.25 (0.049)
±0.20 (0.008)
1.60 (0.063)
±0.20 (0.008)
2.50 (0.098)
±0.20 (0.008)
T
Thickness
B
Bandwidth
See Table 2 for
Thickness
0.15 (0.006)
±0.05 (0.002)
0.30 (0.012)
±0.10 (0.004)
0.35 (0.014)
±0.15 (0.006)
0.50 (0.02)
±0.25 (0.010)
0.50 (0.02)
±0.25 (0.010)
0.50 (0.02)
±0.25 (0.010)
S
Separation
Minimum
N/A
0.30 (0.012)
Mounting
Technique
Solder Reflow
Only
0.70 (0.028)
0.75 (0.030)
N/A
Solder Wave or
Solder Reflow
Solder Reflow
Only
For capacitance values ≥ 4.7 µF add 0.15 (0.006) to the width and length tolerance dimensions.
For capacitance values ≥ 10 µF add 0.05 (0.002) to the length and width tolerance dimension.
3
For capacitance values ≥ 22 µF add 0.10 (0.004) to the positive bandwidth tolerance dimension.
4
For capacitance values ≥ 22 µF add 0.10 (0.004) to the length and width tolerance dimension and add 0.15 (0.006) to the positive bandwidth tolerance
dimension.
1
2
© KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
C1006_X5R_SMD • 3/9/2021
2
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Qualification/Certification
Commercial Grade products are subject to internal qualification. Details regarding test methods and conditions are
referenced in Table 4, Performance & Reliability.
Environmental Compliance
Lead (Pb)-free, RoHS, and REACH compliant without exemptions.
Electrical Parameters/Characteristics
Item
Parameters/Characteristics
Operating Temperature Range
−55°C to +85°C
Capacitance Change with Reference to
+25°C and 0 Vdc Applied (TCC)
±15%
Aging Rate (Maximum % Capacitance Loss/Decade Hour)
5.0%
1
2
3
4
Dielectric Withstanding Voltage (DWV)
Dissipation Factor (DF) Maximum Limit at 25°C
Insulation Resistance (IR) Minimum Limit at 25°C
250% of rated voltage
(5 ±1 seconds and charge/discharge not exceeding 50mA)
See Dissipation Factor Limit Table
See Insulation Resistance Limit Table
(Rated voltage applied for 120 ±5 seconds at 25°C)
Regarding Aging Rate: Capacitance measurements (including tolerance) are indexed to a referee time of 48 or 1,000 hours. Please refer to a part
number specific datasheet for referee time details.
2
DWV is the voltage a capacitor can withstand (survive) for a short period of time. It exceeds the nominal and continuous working voltage of the
capacitor.
3
See part number specification sheet for frequency and voltage for Capacitance, Dissipation Factor, and TCC measurement conditions.
4
To obtain IR limit, divide MΩ-µF value by the capacitance and compare to GΩ limit. Select the lower of the two limits.
Note: When measuring capacitance it is important to ensure the set voltage level is held constant. The HP4284 and Agilent E4980 have a feature known
as Automatic Level Control (ALC). The ALC feature should be switched to "ON."
1
© KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
C1006_X5R_SMD • 3/9/2021
3
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Post Environmental Limits
High Temperature Life, Biased Humidity, Moisture Resistance
Dielectric
Rated DC
Voltage
Capacitance
Value
Dissipation Factor
(Maximum %)
< 1.0 µF
7.5
≥ 1.0 µF
20.0
< 2.2 µF
7.5
≥ 2.2 µF
20.0
< 0.56 µF
7.5
≥ 0.56 µF
20.0
> 25
X5R
25
< 25
Capacitance
Shift
Insulation
Resistance
±20%
10% of Initial
Limit
Dissipation Factor Limit Table
Rated
DC Voltage
> 25
25
< 25
Capacitance
Dissipation Factor
(Maximum %)
< 1.0 µF
5.0
≥ 1.0 µF
10.0
< 2.2 µF
5.0
≥ 2.2 µF
10.0
< 0.56 µF
5.0
≥ 0.56 µF
10.0
Insulation Resistance Limit Table
EIA Case Size
1,000 Megohm
Microfarads or 100 GΩ
500 Megohm
Microfarads or 10 GΩ
100 Megohm
Microfarads
0201
N/A
ALL
N/A
0402
< .012 µF
≥ .012 µF < 1.0 µF
≥ 1.0 µF
0603
< .047 µF
≥ .047 µf < 1.0 µF
≥ 1.0 µF
0805
< 0.15 µF
≥ 0.15 µF < 1.0 µF
≥ 1.0 µF
1206
< 0.47 µF
≥ 0.47 µF < 1.0 µF
≥ 1.0 µF
1210
< 0.39 µF
≥ 0.39 µF < 1.0 µF
≥ 1.0 µF
1812
< 2.2 µF
≥ 2.2 µF
N/A
© KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
C1006_X5R_SMD • 3/9/2021
4
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Table 1A – Capacitance Range/Selection Waterfall (0201 – 0805 Case Sizes)
4
3
5
7
9
8
4
3
5
Rated Voltage (VDC)
10
16
4
6.3
10
16
25
50
4
6.3
10
16
25
50
Case Size/Series
AB
AB
4
3
5
Product Availability and Chip Thickness Codes – See Table 2 for Chip Thickness Dimensions
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB BB¹
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
BB
CG
CG
CG
CG
CG
CG
CG
CG
CG
CG
CG
CG
CG
CG
CG
CG
CG
CG
CG
CG
CG
CG
CG
CG
CG
CG
CG
CG
CG
CG
CG
CG
CG
CG
CG
CG
CG
CG
CG
CG
CG
CG
CG
CG
BB¹
CG
CG
BE¹ BE¹
CG
CG
BF¹ BF¹
CG¹ CG¹ CK¹
CK¹ CK¹
CG
CJ
DG
DP
DP
DF
DP
DN
DN
DP
DG
DL
DL
DG
DG
DG
DG
DG
DG
DH¹
DG
DP
DP
DF
DP
DN
DN
DP
DG
DL
DL
DG
DG
DG
DG
DG
DH¹
DG
DP
DP
DF
DP
DN
DN
DP
DG
DL
DG
DG
DG
DG
DP
DE
DF
DG
DG
DH
DG
DG
6.3
10
16
25
50
4
6.3
10
16
25
50
DG
4
CG
DG
DP
DP
DF
DP
DN
DN
DP
DG
DL
DL
DG
DG
DG
DG
DG
DG
DH¹
50
BB
CG
25
BB
BB
16
AB
10
AB
6.3
Voltage Code
AB
8
4
Rated Voltage (VDC)
AB
9
16
Capacitance
Tolerance
K
M
K
M
K
M
K
M
K
M
K
M
K
M
K
M
K
M
K
M
K
M
K
M
K
M
K
M
K
M
K
M
K
M
K
M
K
M
K
M
K
M
K
M
K
M
K
M
K
M
K
M
K
M
K
M
K
M
K
M
K
M
K
M
K
M
K
M
K
M
7
50
8
25
9
16
7
10
4
6.3
8
4
9
10
Capacitance
Capacitance
Code
C0805C
7
4
103
123
153
183
223
273
333
393
473
563
683
823
104
224
274
334
394
474
564
684
824
105
125
155
185
225
275
335
395
475
565
685
106
226
476
C0603C
Voltage Code
6.3
10,000 pF
12,000 pF
15,000 pF
18,000 pF
22,000 pF
27,000 pF
33,000 pF
39,000 pF
47,000 pF
56,000 pF
68,000 pF
82,000 pF
0.10 µF
0.22 µF
0.27 µF
0.33 µF
0.39 µF
0.47 µF
0.56 µF
0.68 µF
0.82 µF
1.0 µF
1.2 µF
1.5 µF
1.8 µF
2.2 µF
2.7 µF
3.3 µF
3.9 µF
4.7 µF
5.6 µF
6.8 µF
10 µF
22 µF
47 µF
C0402C
4
Capacitance
Code
C0201C
6.3
Capacitance
Case Size/
Series
7
9
8
4
7
9
8
3
5
4
7
9
8
4
3
5
7
9
8
4
3
5
C0201C
C0402C
C0603C
C0805C
xx¹ Available only in M tolerance.
© KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
C1006_X5R_SMD • 3/9/2021
5
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Table 1B – Capacitance Range/Selection Waterfall (1206 – 1812 Case Sizes)
3
6
5
3
6.3
10
16
25
35
50
25
5
4
3
C1206C
50
8
GK
35
9
FS
25
Voltage Code
FT
50
Rated Voltage (VDC)
FD
FD
FD
FD
FF
FH
FD
FD
FD
FJ
FG
FH
FJ
FT
FG
FJ
FK
FT
FG
FG
FH
FS
FS¹
FS¹
FD
FD
FD
FD
FF
FH
FD
FD
FD
FJ
FG
FH
FJ
FT
FE
FJ
FG
FT
1
9
8
4
EH
FD
FD
FD
FD
FF
FH
35
EH¹
FD
FD
FD
FD
FF
FH
FD
FD
FD
FJ
FG
FH
FJ
FT
FG
FJ
FK
FT
FD
FF
FG
FS
FS¹
FS¹
EH
FD
FD
FD
FD
FF
FH
25
EH¹
EH¹
FD
FD
FD
FD
FF
FH
FD
FD
FD
FJ
FG
FH
FJ
FT
FG
FJ
FK
FT
FD
FF
FG
FS
FS¹
FS¹
16
EH
EH¹
EH¹
25
EB
EB
EB
EC
ED
EE
EF
EP
EC
EC
EC
EC
EF
EH
ED
EH
10
EB
EB
EB
EC
ED
EE
EF
EP
EC
EC
EC
EC
EF
EH
ED
EH
EH
EH
EH
EH
6.3
EB
EB
EB
EC
ED
EE
EF
EP
EC
EC
EC
EC
EF
EH
ED
EH
EK
EK
ED
EH
50
EB
EB
EB
EC
ED
EE
EF
EP
EC
EC
EC
EC
EF
EH
ED
EH
EK
EK
ED
EH
Case Size/Series
6
50
4
35
8
16
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
9
10
Capacitance
Code
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
K
1
6.3
Capacitance
274
334
394
474
564
684
824
105
125
155
185
225
275
335
395
475
565
685
825
106
126
156
186
226
476
107
3
Product Availability and Chip Thickness Codes – See Table 2 for Chip Thickness Dimensions
Cap Tolerance
0.27 µF
0.33 µF
0.39 µF
0.47 µF
0.56 µF
0.68 µF
0.82 µF
1.0 µF
1.2 µF
1.5 µF
1.8 µF
2.2 µF
2.7 µF
3.3 µF
3.9 µF
4.7 µF
5.6 µF
6.8 µF
8.2 µF
10 µF
12 µF
15 µF
18 µF
22 µF
47 µF
100 µF
4
50
Rated Voltage (VDC)
8
25
9
C1812C
16
Voltage Code
C1210C
10
Capacitance
Code
C1206C
6.3
Capacitance
Case Size/
Series
3
6
5
3
6
5
FS
C1210C
C1812C
xx¹ Available only in M tolerance.
© KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
C1006_X5R_SMD • 3/9/2021
6
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Table 2A – Chip Thickness/Tape & Reel Packaging Quantities
Paper Quantity1
Plastic Quantity
Thickness
Code
Case
Size1
Thickness ±
Range (mm)
7" Reel
13" Reel
7" Reel
13" Reel
AB
BB
BE
BF
CG
CJ
CK
DN
DP
DL
DE
DF
DG
DH
EB
EK
EC
ED
EE
EF
EP
EH
FD
FE
FF
FG
FH
FJ
FT
FK
FS
GK
0201
0402
0402
0402
0603
0603
0603
0805
0805
0805
0805
0805
0805
0805
1206
1206
1206
1206
1206
1206
1206
1206
1210
1210
1210
1210
1210
1210
1210
1210
1210
1812
0.30 ± 0.03
0.50 ± 0.05
0.50 ± 0.15
0.50 ± 0.20
0.80 ± 0.10*
0.80 ± 0.15*
0.80 ± 0.20*
0.78 ± 0.10*
0.90 ± 0.10*
0.95 ± 0.10
1.00 ± 0.10
1.10 ± 0.10
1.25 ± 0.15
1.25 ± 0.20
0.78 ± 0.10
0.80 ± 0.10
0.90 ± 0.10
1.00 ± 0.10
1.10 ± 0.10
1.20 ± 0.15
1.20 ± 0.20
1.60 ± 0.20
0.95 ± 0.10
1.00 ± 0.10
1.10 ± 0.10
1.25 ± 0.15
1.55 ± 0.15
1.85 ± 0.20
1.90 ± 0.20
2.10 ± 0.20
2.50 ± 0.30
1.60 ± 0.20
15,000
10,000
10,000
10,000
4,000
4,000
4,000
4,000
4,000
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
50,000
40,000
40,000
15,000
15,000
15,000
15,000
15,000
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
4,000
2,500
2,500
2,500
2,500
4,000
2,000
4,000
2,500
2,500
2,500
2,500
2,000
4,000
2,500
2,500
2,500
2,000
2,000
2,000
2,000
1,000
1,000
0
0
0
0
0
0
0
0
0
10,000
10,000
10,000
10,000
10,000
10,000
8,000
10,000
10,000
10,000
10,000
10,000
8,000
10,000
10,000
10,000
10,000
8,000
8,000
8,000
8,000
4,000
4,000
Thickness
Code
Case
Size1
Thickness ±
Range (mm)
7" Reel
13" Reel
7" Reel
13" Reel
Paper Quantity1
Plastic Quantity
Package quantity based on finished chip thickness specifications.
1
If ordering using the 2 mm Tape and Reel pitch option, the packaging quantity outlined in the table above will be doubled. This option is limited to EIA
0603 (1608 metric) case size devices. For more information regarding 2 mm pitch option see “Tape & Reel Packaging Information”.
© KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
C1006_X5R_SMD • 3/9/2021
7
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Table 2B – Bulk Packaging Quantities
Loose Packaging
Packaging Type
Bulk Bag (default)
Packaging C-Spec1
N/A 2
Case Size
Packaging Quantities (pieces/unit packaging)
EIA (in)
Metric (mm)
0402
0603
0805
1206
1210
1808
1005
1608
2012
3216
3225
4520
1812
1825
2220
2225
4532
4564
5650
5664
Minimum
Maximum
50,000
1
20,000
The "Packaging C-Spec" is a 4 to 8 digit code which identifies the packaging type and/or product grade. When ordering, the proper code must be
included in the 15th through 22nd character positions of the ordering code. See "Ordering Information" section of this document for further details.
Commercial Grade product ordered without a packaging C-Spec will default to our standard "Bulk Bag" packaging. Contact KEMET if you require a bulk
bag packaging option for Automotive Grade products.
2
A packaging C-Spec (see note 1 above) is not required for "Bulk Bag" packaging (excluding Anti-Static Bulk Bag and Automotive Grade products). The
15th through 22nd character positions of the ordering code should be left blank. All product ordered without a packaging C-Spec will default to our
standard "Bulk Bag" packaging.
1
© KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
C1006_X5R_SMD • 3/9/2021
8
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Table 3 – Chip Capacitor Land Pattern Design Recommendations per IPC–7351
EIA
Size
Code
Metric
Size
Code
0201
Density Level A:
Maximum (Most)
Land Protrusion (mm)
Density Level B:
Median (Nominal)
Land Protrusion (mm)
Density Level C:
Minimum (Least)
Land Protrusion (mm)
C
Y
X
V1
V2
C
Y
X
V1
V2
C
Y
X
V1
V2
0603
0.38
0.56
0.52
1.80
1.00
0.33
0.46
0.42
1.50
0.80
0.28
0.36
0.32
1.20
0.60
0402
1005
0.50
0.72
0.72
2.20
1.20
0.45
0.62
0.62
1.90
1.00
0.40
0.52
0.52
1.60
0.80
0603
1608
0.90
1.15
1.10
4.00
2.10
0.80
0.95
1.00
3.10
1.50
0.60
0.75
0.90
2.40
1.20
0805
2012
1.00
1.35
1.55
4.40
2.60
0.90
1.15
1.45
3.50
2.00
0.75
0.95
1.35
2.80
1.70
1206
3216
1.60
1.35
1.90
5.60
2.90
1.50
1.15
1.80
4.70
2.30
1.40
0.95
1.70
4.00
2.00
1210
3225
1.60
1.35
2.80
5.65
3.80
1.50
1.15
2.70
4.70
3.20
1.40
0.95
2.60
4.00
2.90
12101
3225
1.50
1.60
2.90
5.60
3.90
1.40
1.40
2.80
4.70
3.30
1.30
1.20
2.70
4.00
3.00
Only for capacitance values ≥ 22 µF
Density Level A: For low-density product applications. Recommended for wave solder applications and provides a wider process window for reflow
solder processes. KEMET only recommends wave soldering of EIA 0603, 0805 and 1206 case sizes.
Density Level B: For products with a moderate level of component density. Provides a robust solder attachment condition for reflow solder processes.
Density Level C: For high component density product applications. Before adapting the minimum land pattern variations the user should perform
qualification testing based on the conditions outlined in IPC Standard 7351 (IPC–7351).
1
Image below based on Density Level B for an EIA 1210 case size.
V1
Y
Y
X
X
C
C
V2
Grid Placement Courtyard
© KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
C1006_X5R_SMD • 3/9/2021
9
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Soldering Process
Recommended Soldering Technique:
• Solder wave or solder reflow for EIA case sizes 0603, 0805 and 1206
• All other EIA case sizes are limited to solder reflow only
Recommended Reflow Soldering Profile:
KEMET’s families of surface mount multilayer ceramic capacitors (SMD MLCCs) are compatible with wave (single or dual),
convection, IR or vapor phase reflow techniques. Preheating of these components is recommended to avoid extreme thermal
stress. KEMET’s recommended profile conditions for convection and IR reflow reflect the profile conditions of the IPC/
J-STD-020 standard for moisture sensitivity testing. These devices can safely withstand a maximum of three reflow passes
at these conditions.
Termination Finish
SnPb
TP
100% Matte Sn
Preheat/Soak
Temperature Minimum (TSmin)
Temperature Maximum (TSmax)
Time (tS) from TSmin to TSmax
100°C
150°C
60 – 120 seconds
150°C
200°C
60 – 120 seconds
Ramp-Up Rate (TL to TP)
3°C/second
maximum
3°C/second
maximum
Liquidous Temperature (TL)
183°C
217°C
Time Above Liquidous (tL)
60 – 150 seconds
60 – 150 seconds
Peak Temperature (TP)
235°C
260°C
Time Within 5°C of Maximum
Peak Temperature (tP)
20 seconds
maximum
30 seconds
maximum
Ramp-Down Rate (TP to TL)
6°C/second
maximum
6°C/second
maximum
TL
Temperature
Profile Feature
tP
Maximum Ramp-up Rate = 3°C/second
Maximum Ramp-down Rate = 6°C/second
tL
Tsmax
Tsmin
25
ts
25°C to Peak
Time
Time 25°C to Peak
6 minutes
8 minutes
Temperature
maximum
maximum
Note 1: All temperatures refer to the center of the package, measured on the
capacitor body surface that is facing up during assembly reflow.
© KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
C1006_X5R_SMD • 3/9/2021
10
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Table 4 – Performance & Reliability: Test Methods and Conditions
Stress
Reference
Test or Inspection Method
Terminal Strength
JIS–C–6429
Appendix 1, Note: Force of 1.8 kg for 60 seconds.
Board Flex
JIS–C–6429
Appendix 2, Note: Standard termination system – 2.0 mm (minimum) for all except 3 mm for
C0G. Flexible termination system – 3.0 mm (minimum).
Magnification 50 X. Conditions:
Solderability
J–STD–002
a) Method B, 4 hours at 155°C, dry heat at 235°C
b) Method B at 215°C category 3
c) Method D, category 3 at 260°C
Temperature Cycling
Biased Humidity
Moisture Resistance
Thermal Shock
High Temperature Life
JESD22 Method JA–104
MIL–STD–202 Method
103
MIL–STD–202 Method
106
MIL–STD–202 Method
107
MIL–STD–202 Method
108
/EIA–198
Storage Life
MIL–STD–202 Method
108
Vibration
MIL–STD–202 Method
204
Mechanical Shock
Resistance to Solvents
MIL–STD–202 Method
213
MIL–STD–202 Method
215
1,000 Cycles (−55°C to +125°C). Measurement at 24 hours +/− 4 hours after test conclusion.
Load Humidity: 1,000 hours 85°C/85% RH and rated voltage. Add 100 K ohm resistor.
Measurement at 24 hours +/− 4 hours after test conclusion.
Low Volt Humidity: 1,000 hours 85°C/85% RH and 1.5 V. Add 100 K ohm resistor.
Measurement at 24 hours +/− 4 hours after test conclusion.
t = 24 hours/cycle. Steps 7a and 7b not required.
Measurement at 24 hours +/− 4 hours after test conclusion.
−55°C/+125°C. Note: Number of cycles required – 300. Maximum transfer time – 20
seconds. Dwell time – 15 minutes. Air – Air.
1,000 hours at 85°C with 2 X rated voltage applied excluding the following:
Case Size
Capacitance
0402
≥ 0.22 µF
0603
≥ 1.0 µF
0805
≥ 4.7 µF
1206
≥ 2.2 µF
1210
≥ 10 µF
Applied Voltage
1.5 X
150°C, 0 VDC for 1,000 hours.
5 g's for 20 minutes, 12 cycles each of 3 orientations. Note: Use 8" X 5" PCB 0.031" thick
7 secure points on one long side and 2 secure points at corners of opposite sides. Parts
mounted within 2" from any secure point. Test from 10 – 2,000 Hz
Figure 1 of Method 213, Condition F.
Add aqueous wash chemical, OKEM Clean or equivalent.
Storage and Handling
Ceramic chip capacitors should be stored in normal working environments. While the chips themselves are quite robust in
other environments, solderability will be degraded by exposure to high temperatures, high humidity, corrosive atmospheres,
and long term storage. In addition, packaging materials will be degraded by high temperature–reels may soften or warp
and tape peel force may increase. KEMET recommends that maximum storage temperature not exceed 40ºC and maximum
storage humidity not exceed 70% relative humidity. Temperature fluctuations should be minimized to avoid condensation on
the parts and atmospheres should be free of chlorine and sulfur bearing compounds. For optimized solderability chip stock
should be used promptly, preferably within 1.5 years of receipt.
© KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
C1006_X5R_SMD • 3/9/2021
11
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Construction (Typical)
Detailed Cross Section
Dielectric Material
(BaTiO3)
Barrier Layer
(Ni)
Termination
Finish
(100% Matte Sn)
Dielectric
Material (BaTiO3)
End Termination/
External Electrode
(Cu)
Inner Electrodes
(Ni)
End Termination/
External Electrode
(Cu)
Barrier Layer
(Ni)
Termination
Finish
(100% Matte Sn)
Inner Electrodes
(Ni)
© KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
C1006_X5R_SMD • 3/9/2021
12
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Capacitor Marking (Optional)
These surface mount multilayer ceramic capacitors are
normally supplied unmarked. If required, they can be
marked as an extra cost option. Marking is available
on most KEMET devices, but must be requested using
the correct ordering code identifi er(s). If this option is
requested, two sides of the ceramic body will be laser
marked with a “K” to identify KEMET, followed by two
characters (per EIA–198 - see table below) to identify the
capacitance value. EIA 0603 case size devices are limited
to the “K” character only.
Marking appears in legible contrast. Illustrated below
is an example of an MLCC with laser marking of “KA8”,
which designates a KEMET device with rated capacitance
of 100 µF. Orientation of marking is vendor optional.
KEMET
ID
2-Digit
Capacitance
Code
Laser marking option is not available on:
• C0G, ultra stable X8R and Y5V dielectric devices.
• EIA 0402 case size devices.
• EIA 0603 case size devices with fl exible termination
option.
• KPS commercial and automotive grade stacked
devices.
• X7R dielectric products in capacitance values outlined
below.
EIA Case Size
Metric Size Code
Capacitance
0603
0805
1206
1210
1808
1812
1825
2220
2225
1608
2012
3216
3225
4520
4532
4564
5650
5664
≤ 170 pF
≤ 150 pF
≤ 910 pF
≤ 2,000 pF
≤ 3,900 pF
≤ 6,700 pF
≤ 0.018 µF
≤ 0.027 µF
≤ 0.033 µF
© KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
C1006_X5R_SMD • 3/9/2021
13
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Capacitor Marking (Optional) cont.
Capacitance (pF) For Various Alpha/Numeral Identifiers
Numeral
Alpha
Character
9
A
0.10
1.0
10
100
1,000
10,000
B
0.11
1.1
11
110
1,100
11,000
C
0.12
1.2
12
120
1,200
12,000
D
0.13
1.3
13
130
1,300
E
0.15
1.5
15
150
1,500
0
1
2
3
4
5
6
7
8
100,000
1,000,000
10,000,000
100,000,000
110,000
1,100,000
11,000,000
110,000,000
120,000
1,200,000
12,000,000
120,000,000
13,000
130,000
1,300,000
13,000,000
130,000,000
15,000
150,000
1,500,000
15,000,000
150,000,000
160,000,000
Capacitance (pF)
F
0.16
1.6
16
160
1,600
16,000
160,000
1,600,000
16,000,000
G
0.18
1.8
18
180
1,800
18,000
180,000
1,800,000
18,000,000
180,000,000
H
0.20
2.0
20
200
2,000
20,000
200,000
2,000,000
20,000,000
200,000,000
J
0.22
2.2
22
220
2,200
22,000
220,000
2,200,000
22,000,000
220,000,000
K
0.24
2.4
24
240
2,400
24,000
240,000
2,400,000
24,000,000
240,000,000
L
0.27
2.7
27
270
2,700
27,000
270,000
2,700,000
27,000,000
270,000,000
M
0.30
3.0
30
300
3,000
30,000
300,000
3,000,000
30,000,000
300,000,000
N
0.33
3.3
33
330
3,300
33,000
330,000
3,300,000
33,000,000
330,000,000
P
0.36
3.6
36
360
3,600
36,000
360,000
3,600,000
36,000,000
360,000,000
Q
0.39
3.9
39
390
3,900
39,000
390,000
3,900,000
39,000,000
390,000,000
R
0.43
4.3
43
430
4,300
43,000
430,000
4,300,000
43,000,000
430,000,000
470,000,000
S
0.47
4.7
47
470
4,700
47,000
470,000
4,700,000
47,000,000
T
0.51
5.1
51
510
5,100
51,000
510,000
5,100,000
51,000,000
510,000,000
U
0.56
5.6
56
560
5,600
56,000
560,000
5,600,000
56,000,000
560,000,000
V
0.62
6.2
62
620
6,200
62,000
620,000
6,200,000
62,000,000
620,000,000
W
0.68
6.8
68
680
6,800
68,000
680,000
6,800,000
68,000,000
680,000,000
X
0.75
7.5
75
750
7,500
75,000
750,000
7,500,000
75,000,000
750,000,000
Y
0.82
8.2
82
820
8,200
82,000
820,000
8,200,000
82,000,000
820,000,000
Z
0.91
9.1
91
910
9,100
91,000
910,000
9,100,000
91,000,000
910,000,000
a
0.25
2.5
25
250
2,500
25,000
250,000
2,500,000
25,000,000
250,000,000
b
0.35
3.5
35
350
3,500
35,000
350,000
3,500,000
35,000,000
350,000,000
d
0.40
4.0
40
400
4,000
40,000
400,000
4,000,000
40,000,000
400,000,000
e
0.45
4.5
45
450
4,500
45,000
450,000
4,500,000
45,000,000
450,000,000
f
0.50
5.0
50
500
5,000
50,000
500,000
5,000,000
50,000,000
500,000,000
m
0.60
6.0
60
600
6,000
60,000
600,000
6,000,000
60,000,000
600,000,000
n
0.70
7.0
70
700
7,000
70,000
700,000
7,000,000
70,000,000
700,000,000
t
0.80
8.0
80
800
8,000
80,000
800,000
8,000,000
80,000,000
800,000,000
y
0.90
9.0
90
900
9,000
90,000
900,000
9,000,000
90,000,000
900,000,000
© KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
C1006_X5R_SMD • 3/9/2021
14
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Tape & Reel Packaging Information
KEMET offers multilayer ceramic chip capacitors packaged in 8, 12 and 16 mm tape on 7" and 13" reels in accordance with
EIA Standard 481. This packaging system is compatible with all tape-fed automatic pick and place systems. See Table 2 for
details on reeling quantities for commercial chips.
Bar code label
Anti-static reel
®
Embossed plastic* or
punched paper carrier.
ET
KEM
Chip and KPS orientation in pocket
(except 1825 commercial, and 1825 and 2225 Military)
Sprocket holes
Embossment or punched cavity
8 mm, 12 mm
or 16 mm carrier tape
180 mm (7.00")
or
330 mm (13.00")
Anti-static cover tape
(0.10 mm (0.004") maximum thickness)
*EIA 01005, 0201, 0402 and 0603 case sizes available on punched paper carrier only.
Table 5 – Carrier Tape Configuration, Embossed Plastic & Punched Paper (mm)
EIA Case Size
Tape
Size
(W)*
Embossed Plastic
7" Reel
13" Reel
Pitch (P1)*
Punched Paper
7" Reel
13" Reel
Pitch (P1)*
01005 – 0402
8
2
2
0603
8
2/4
2/4
0805
8
4
4
4
4
1206 – 1210
8
4
4
4
4
1805 – 1808
12
4
4
≥ 1812
12
8
8
KPS 1210
12
8
8
KPS 1812
and 2220
16
12
12
Array 0612
8
4
4
*Refer to Figures 1 and 2 for W and P1 carrier tape reference locations.
*Refer to Tables 6 and 7 for tolerance specifications.
© KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
New 2 mm Pitch Reel Options*
Packaging
Ordering Code
(C-Spec)
Packaging Type/Options
C-3190
C-3191
C-7081
C-7082
Automotive grade 7" reel unmarked
Automotive grade 13" reel unmarked
Commercial grade 7" reel unmarked
Commercial grade 13" reel unmarked
* 2 mm pitch reel only available for 0603 EIA case size.
2 mm pitch reel for 0805 EIA case size under development.
Benefits of Changing from 4 mm to 2 mm Pitching Spacing
• Lower placement costs.
• Double the parts on each reel results in fewer reel
changes and increased effi ciency.
• Fewer reels result in lower packaging, shipping and
storage costs, reducing waste.
C1006_X5R_SMD • 3/9/2021
15
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Figure 1 – Embossed (Plastic) Carrier Tape Dimensions
P2
T
T2
ØD0
(10 pitches cumulative
tolerance on tape ±0.2 mm)
P0
A0
E1
F
K0
B1
E2
B0
S1
W
P1
T1
Center Lines of Cavity
ØD1
Cover Tape
B1 is for tape feeder reference only,
including draft concentric about B0.
Embossment
For cavity size,
see Note 1 Table 4
User Direction of Unreeling
Table 6 – Embossed (Plastic) Carrier Tape Dimensions
Metric will govern
Constant Dimensions — Millimeters (Inches)
Tape Size
D0
8 mm
12 mm
1.5 +0.10/−0.0
(0.059 +0.004/−0.0)
16 mm
D1 Minimum
Note 1
1.0
(0.039)
1.5
(0.059)
R Reference S1 Minimum
T
Note 2
Note 3
Maximum
25.0
(0.984)
1.75 ±0.10
4.0 ±0.10
2.0 ±0.05
0.600
0.600
(0.069 ±0.004) (0.157 ±0.004) (0.079 ±0.002)
(0.024)
(0.024)
30
(1.181)
E1
P0
P2
T1
Maximum
0.100
(0.004)
Variable Dimensions — Millimeters (Inches)
Tape Size
8 mm
12 mm
16 mm
B1 Maximum
Note 4
4.35
Single (4 mm)
(0.171)
Single (4 mm)
8.2
and double (8 mm)
(0.323)
12.1
Triple (12 mm)
(0.476)
Pitch
E2
Minimum
6.25
(0.246)
10.25
(0.404)
14.25
(0.561)
F
P1
3.5 ±0.05
4.0 ±0.10
(0.138 ±0.002) (0.157 ±0.004)
5.5 ±0.05
8.0 ±0.10
(0.217 ±0.002) (0.315 ±0.004)
7.5 ±0.05
12.0 ±0.10
(0.138 ±0.002) (0.157 ±0.004)
T2
Maximum
2.5
(0.098)
4.6
(0.181)
4.6
(0.181)
W
Maximum
8.3
(0.327)
12.3
(0.484)
16.3
(0.642)
A0,B0 & K0
Note 5
1. The embossment hole location shall be measured from the sprocket hole controlling the location of the embossment. Dimensions of the embossment
location and the hole location shall be applied independently of each other.
2. The tape with or without components shall pass around R without damage (see Figure 6.)
3. If S1 < 1.0 mm, there may not be enough area for a cover tape to be properly applied (see EIA Standard 481, paragraph 4.3, section b.)
4. B1 dimension is a reference dimension for tape feeder clearance only.
5. The cavity defined by A0, B0 and K0 shall surround the component with sufficient clearance that:
(a) the component does not protrude above the top surface of the carrier tape.
(b) the component can be removed from the cavity in a vertical direction without mechanical restriction, after the top cover tape has been
removed.
(c) rotation of the component is limited to 20° maximum for 8 and 12 mm tapes and 10° maximum for 16 mm tapes (see Figure 3.)
(d) lateral movement of the component is restricted to 0.5 mm maximum for 8 and 12 mm wide tape and to 1.0 mm maximum for 16 mm tape
(see Figure 4.)
(e) for KPS product, A0 and B0 are measured on a plane 0.3 mm above the bottom of the pocket.
(f) see addendum in EIA Standard 481 for standards relating to more precise taping requirements.
© KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
C1006_X5R_SMD • 3/9/2021
16
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Figure 2 – Punched (Paper) Carrier Tape Dimensions
T
Po
ØDo
(10 pitches cumulative
tolerance on tape ±0.2 mm)
A0
F
P1
T1
T1
Top Cover Tape
W
E2
B0
Bottom Cover Tape
E1
G
Cavity Size,
See
Note 1, Table 7
Center Lines of Cavity
Bottom Cover Tape
User Direction of Unreeling
Table 7 – Punched (Paper) Carrier Tape Dimensions
Metric will govern
Constant Dimensions — Millimeters (Inches)
Tape Size
D0
E1
P0
P2
T1 Maximum
G Minimum
8 mm
1.5 +0.10 -0.0
(0.059 +0.004 -0.0)
1.75 ±0.10
(0.069 ±0.004)
4.0 ±0.10
(0.157 ±0.004)
2.0 ±0.05
(0.079 ±0.002)
0.10
(0.004)
maximum
R Reference
Note 2
0.75
(0.030)
25
(0.984)
Variable Dimensions — Millimeters (Inches)
Tape Size
Pitch
8 mm
Half (2 mm)
8 mm
Single (4 mm)
E2 Minimum
F
P1
T Maximum
W Maximum
A0 B 0
6.25
(0.246)
3.5 ±0.05
(0.138 ±0.002)
2.0 ±0.05
(0.079 ±0.002)
4.0 ±0.10
(0.157 ±0.004)
1.1
(0.098)
8.3
(0.327)
8.3
(0.327)
Note 1
1. The cavity defined by A0, B0 and T shall surround the component with sufficient clearance that:
a) the component does not protrude beyond either surface of the carrier tape.
b) the component can be removed from the cavity in a vertical direction without mechanical restriction, after the top cover tape has been
removed.
c) rotation of the component is limited to 20° maximum (see Figure 3.)
d) lateral movement of the component is restricted to 0.5 mm maximum (see Figure 4.)
e) see addendum in EIA Standard 481 for standards relating to more precise taping requirements.
2. The tape with or without components shall pass around R without damage (see Figure 6.)
© KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
C1006_X5R_SMD • 3/9/2021
17
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Packaging Information Performance Notes
1. Cover Tape Break Force: 1.0 kg minimum.
2. Cover Tape Peel Strength: The total peel strength of the cover tape from the carrier tape shall be:
Tape Width
Peel Strength
8 mm
0.1 to 1.0 newton (10 to 100 gf)
12 and 16 mm
0.1 to 1.3 newton (10 to 130 gf)
The direction of the pull shall be opposite the direction of the carrier tape travel. The pull angle of the carrier tape shall be
165° to 180° from the plane of the carrier tape. During peeling, the carrier and/or cover tape shall be pulled at a velocity of
300 ±10 mm/minute.
3. Labeling: Bar code labeling (standard or custom) shall be on the side of the reel opposite the sprocket holes. Refer to EIA
Standards 556 and 624.
Figure 3 – Maximum Component Rotation
°
T
Maximum Component Rotation
Top View
Maximum Component Rotation
Side View
Typical Pocket Centerline
Tape
Maximum
Width (mm) Rotation (
8,12
20
16 – 200
10
Bo
°
T)
°
s
Tape
Width (mm)
8,12
16 – 56
72 – 200
Typical Component Centerline
Ao
Figure 4 – Maximum Lateral Movement
8 mm & 12 mm Tape
0.5 mm maximum
0.5 mm maximum
Maximum
Rotation (
20
10
5
°
S)
Figure 5 – Bending Radius
Embossed
Carrier
16 mm Tape
Punched
Carrier
1.0 mm maximum
1.0 mm maximum
R
© KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
Bending
Radius
R
C1006_X5R_SMD • 3/9/2021
18
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Figure 6 – Reel Dimensions
Full Radius,
See Note
W3
(Includes
flange distortion
at outer edge)
Access Hole at
Slot Location
(Ø 40 mm minimum)
W2
D
A
(See Note)
N
C
(Arbor hole
diameter)
B
(see Note)
(Measured at hub)
W1
(Measured at hub)
If present,
tape slot in core
for tape start:
2.5 mm minimum width x
10.0 mm minimum depth
Note: Drive spokes optional; if used, dimensions B and D shall apply.
Table 8 – Reel Dimensions
Metric will govern
Constant Dimensions — Millimeters (Inches)
Tape Size
A
B Minimum
C
D Minimum
8 mm
178 ±0.20
(7.008 ±0.008)
or
330 ±0.20
(13.000 ±0.008)
1.5
(0.059)
13.0 +0.5/−0.2
(0.521 +0.02/−0.008)
20.2
(0.795)
12 mm
16 mm
Variable Dimensions — Millimeters (Inches)
Tape Size
N Minimum
W1
W2 Maximum
W3
50
(1.969)
8.4 +1.5/−0.0
(0.331 +0.059/−0.0)
12.4 +2.0/−0.0
(0.488 +0.078/−0.0)
16.4 +2.0/−0.0
(0.646 +0.078/−0.0)
14.4
(0.567)
18.4
(0.724)
22.4
(0.882)
Shall accommodate tape
width without interference
8 mm
12 mm
16 mm
© KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
C1006_X5R_SMD • 3/9/2021
19
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
X5R Dielectric, 4 – 50 VDC (Commercial Grade)
Figure 7 – Tape Leader & Trailer Dimensions
Embossed Carrier
Punched Carrier
8 mm & 12 mm only
END
Carrier Tape
Round Sprocket Holes
START
Top Cover Tape
Elongated Sprocket Holes
(32 mm tape and wider)
Trailer
160 mm minimum
Components
100 mm
minimum leader
400 mm minimum
Top Cover Tape
Figure 8 – Maximum Camber
Elongated Sprocket Holes
(32 mm & wider tapes)
Carrier Tape
Round Sprocket Holes
1 mm maximum, either direction
Straight Edge
250 mm
© KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
C1006_X5R_SMD • 3/9/2021
20
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
X5R Dielectric, 4 – 50 VDC (Commercial Grade)
KEMET Electronics Corporation Sales Offices
For a complete list of our global sales offi ces, please visit www.kemet.com/sales.
Disclaimer
All product specifi cations, statements, information and data (collectively, the “Information”) in this datasheet are subject to change. The customer is responsible for
checking and verifying the extent to which the Information contained in this publication is applicable to an order at the time the order is placed. All Information given
herein is believed to be accurate and reliable, but it is presented without guarantee, warranty, or responsibility of any kind, expressed or implied.
Statements of suitability for certain applications are based on KEMET Electronics Corporation’s (“KEMET”) knowledge of typical operating conditions for such
applications, but are not intended to constitute – and KEMET specifi cally disclaims – any warranty concerning suitability for a specifi c customer application or use.
The Information is intended for use only by customers who have the requisite experience and capability to determine the correct products for their application. Any
technical advice inferred from this Information or otherwise provided by KEMET with reference to the use of KEMET’s products is given gratis, and KEMET assumes
no obligation or liability for the advice given or results obtained.
Although KEMET designs and manufactures its products to the most stringent quality and safety standards, given the current state of the art, isolated component
failures may still occur. Accordingly, customer applications which require a high degree of reliability or safety should employ suitable designs or other safeguards
(such as installation of protective circuitry or redundancies) in order to ensure that the failure of an electrical component does not result in a risk of personal injury
or property damage.
Although all product–related warnings, cautions and notes must be observed, the customer should not assume that all safety measures are indicted or that other
measures may not be required.
KEMET is a registered trademark of KEMET Electronics Corporation.
© KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
C1006_X5R_SMD • 3/9/2021
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