C2220C106K3R1C7289

Surface Mount Multilayer Ceramic Chip Capacitors KPS Series – Commercial Grade (X7R Dielectric) Overview KEMET’s KPS Series (KEMET Power Solutions) utilizes proprietary lead-frame technology to vertically stack one or two multilayer ceramic chip capacitors (MLCCs) into a single compact surface mount package. The attached lead-frame mechanically isolates the capacitor/s from the printed circuit board, therefore offering advanced mechanical and thermal stress performance. Isolation also addresses concerns for audible, microphonic noise that may occur when a bias voltage is applied. A two chip stack offers up to double the capacitance in the same or smaller design footprint when compared to traditional surface mount MLCC devices. Providing up to 10mm of board flex capability, KPS Series capacitors are environmentally friendly and in compliance with RoHS legislation. Available in X7R dielectric, these devices are capable of Pb-free reflow profiles and provide lower ESR, ESL and higher ripple current capability when compared to other dielectric solutions. Benefits • • • • • • • • • • Higher capacitance in the same footprint Potential board space savings. Advanced protection against thermal and mechanical stress Provides up to 10mm of board flex capability Reduces audible, microphonic noise Extremely low ESR and ESL Pb-Free and RoHS compliant Capable of Pb-Free reflow profiles Non-polar device, minimizing installation concerns Automotive grade (AEC-Q200) under development. Applications • • • • • • • Industrial, Automotive, Military, Telecom Smoothing circuits DC-to-DC converters Power supplies (input/output filters) Noise Reduction (piezoelectric / mechanical) Circuits with a direct battery or power source connection. Critical and safety relevant circuits without (integrated) current limitation. • Any application that is subject to high levels of board flexure or temperature cycling Ordering Information C Ceramic 2220 C 106 Capacitance Code (pF) 2 Sig. Digits + Number of Zeros M Capacitance Tolerance1 K = ±10% M = ±20% 5 Voltage 8 = 10V 4 = 16V 3 = 25V 5 = 50V 1 = 100V A = 250V R Dielectric R = X7R 2 Failure Rate/Design 1 = KPS Single Chip Stack 2 = KPS Double Chip Stack C TU Case Size Specification/ (L" x W") Series 1210 1812 2220 C = Standard End Packaging/Grade Metallization2 (C-Spec)3 C = 100% Matte Sn TU = 7" Reel Unmarked 7289 = 13" Reel Unmarked Double chip stacks ("2" in the 13th character position of the ordering code) are only available in M (±20%) capacitance tolerance. Single chip stacks ("1" in the 13th character position of the ordering code) are available in K (±10%) or M (±20%) tolerances. 2 Additional termination options may be available. Contact KEMET for details. 3 Additional reeling or packaging options may be available. Contact KEMET for details. 1 One WORLD One Brand One Strategy One Focus One Team One KEMET C1020-4 • 6/22/2010 1 © KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com Surface Mount Multilayer Ceramic Chip Capacitors –KPS Series – Commercial Grade (X7R Dielectric) Dimensions – Millimeters (Inches) Single or Double Chip Stack Top View Double Chip Stack Profile View Single Chip Stack Chip Stack Single EIA Size Code 1210 1812 2220 1210 1812 2220 Metric Size Code 3225 4532 5650 3225 4532 5650 L Length 3.50 (.138) ± 0.30 (.012) 5.00 (.197) ± 0.50 (.020) 6.00 (.236) ± 0.50 (.020) 3.50 (.138) ± 0.30 (.012) 5.00 (.197) ± 0.50 (.020) 6.00 (.236) ± 0.50 (.020) W Width 2.60 (.102) ± 0.30 (.012) 3.50 (.138) ± 0.50 (.020) 5.00 (.197) ± 0.50 (.020) 2.60 (.102) ± 0.30 (.012) 3.50 (.138) ± 0.50 (.020) 5.00 (.197) ± 0.50 (.020) T Thickness 3.35 (.132) ± 0.10 (.004) 2.65 (.104) ± 0.35 (.014) 3.50 (.138) ± 0.30 (.012) 6.15 (.242) ± 0.15 (.006) 5.00 (.197) ± 0.50 (.020) 5.00 (.197) ± 0.50 (.020) LW Lead Width 0.80 (.032) ± 0.15 (.006) 1.10 (.043) ± 0.30 (.012) 1.60 (.063) ± 0.30 (.012) 0.80 (.031) ± 0.15 (.006) 1.10 (.043) ± 0.30 (.012) 1.60 (.063) ± 0.30 (.012) Mounting Technique Solder Reflow Double Outline Drawing Ref A B C D E F G Leadframe Leadframe Attach Termination Electrode Dielectric Name Phosphor Bronze - Alloy 510 High Temp Solder Cu Ni Sn Ni BaTiO 3 Material Qualification/Certification Commercial grade products meet or exceed the performance and reliability standards outlined in Table 4 - Performance and Reliability of this specification. Environmental Compliance RoHS PRC ( Peoples Republic of China) compliant Electrical Parameters/Characteristics Operating Temperature Range: Capacitance Change with Reference to +25°C and 0 Vdc Applied (TCC): Aging Rate (Max % Cap Loss/Decade Hour): Dielectric Withstanding Voltage: Dissipation Factor (DF) Maximum Limits @ 25ºC: Insulation Resistance (IR) Limit @ 25°C: - 55°C to +125°C ±15% 3.5% 250% of rated voltage (5 ± 1 seconds and charge/discharge not exceeding 50mA) 5% (10V), 3.5% (16V & 25V) and 2.5% (50V to 200V) See Insulation Resistance Limit Table page 3 To obtain IR limit, divide MΩ-µF value by the capacitance and compare to GΩ limit. Select the lower of the two limits. Capacitance and Dissipation Factor (DF) measured under the following conditions: 1kHz ± 50Hz and 1.0 ± 0.2 Vrms if capacitance ≤10µF 120Hz ± 10Hz and 0.5 ± 0.1 Vrms if capacitance >10µF © KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1020-4 • 6/22/2010 2 Surface Mount Multilayer Ceramic Chip Capacitors –KPS Series – Commercial Grade (X7R Dielectric) Insulation Resistance Limit Table EIA Case Size 1210 1812 2220 1000 megohm microfarads or 100GΩ < 0.39µF < 2.2µF < 10µF 500 megohm microfarads or 10GΩ ≥ 0.39µF ≥ 2.2µF ≥ 10µF Electrical Characteristics Z and C1210C475M5R1C Z and ESR ESR C1210C475M5R1C 10 3 Z and ESR C2220C225MAR2C 10 ESR Z 4 ESR 10 3 Z 10 2 Magnitude Ohms Magnitude Ohms 0 2 4 6 8 10 10 1 10 2 10 1 10 0 10 0 10 -1 10 -2 -1 10 10 -2 10 -3 10 10 10 10 10 10 10 -3 10 0 10 2 10 4 10 6 10 8 10 10 Frequency (Hz) Frequency (Hz) Z and ESR C2220C476M3R2C 10 4 ESR Z 10 2 Magnitude Ohms 10 0 10 -2 10 -4 10 -6 10 0 10 2 10 4 10 6 10 8 10 10 Frequency (Hz) © KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1020-4 • 6/22/2010 3 Surface Mount Multilayer Ceramic Chip Capacitors –KPS Series – Commercial Grade (X7R Dielectric) Electrical Characteristics con't ESR - 1812, .10µF, 50V X7R 10 Impedance - 1812, .10µF, 50V X7R 10000 1000 ESR vs. Frequency C1812C104K5R2C (2 Chip Stack) C1812C104K5R1C (1 Chip Stack) Impedance vs. Frequency C1812C104K5R2C (2 Chip Stack) C1812C104K5R1C (1 Chip Stack) Impedance (Ohms) 1 100 10 1 0.1 ESR (Ohms) 0.1 0.01 1.E+03 1.E+04 1.E+05 1.E+06 Frequency (Hz) 1.E+07 1.E+08 0.01 1.E+03 1.E+04 1.E+05 1.E+06 Frequency (Hz) 1.E+07 1.E+08 ESR - 1210, .22µF, 50V X7R 10 Impedance - 1210, .22µF, 50V X7R 1000 ESR vs. Frequency C1210C224K5R2C (2 Chip Stack) C1210C224K5R1C (1 Chip Stack) Impedance vs. Frequency C1210C224K5R2C (2 Chip Stack) C1210C224K5R1C (1 Chip Stack) 100 Impedance (Ohms) 1.E+04 1.E+05 1.E+06 1.E+07 1.E+08 1 ESR (Ohms) 10 0.1 1 0.1 0.01 1.E+03 0.01 1.E+03 1.E+04 Frequency (Hz) 1.E+05 1.E+06 Frequency (Hz) 1.E+07 1.E+08 © KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1020-4 • 6/22/2010 4 Surface Mount Multilayer Ceramic Chip Capacitors –KPS Series – Commercial Grade (X7R Dielectric) Electrical Characteristics con't Microphonics - 1210, 4.7µF, 50V, X7R Microphonics - 2220, 22µF, 50V, X7R 60 50 40 30 20 10 0 0 5 Sound Pressure (dB) Sound Pressure (dB) 50 40 30 20 10 0 0 2 Vp-p Standard SMD MLCC KPS - 2 Chip Stack Standard SMD MLCC KPS - 1 Chip Stack Vp-p 10 15 4 6 Microphonics - 2220, 47µF, 25V, X7R Microphonics - 1210, 22µF, 25V, X7R Sound Pressure (dB) 40 30 20 10 0 0 5 Standard SMD MLCC KPS - 2 Chip Stack Sound Pressure (dB) 50 50 40 30 20 10 0 0 2 Standard SMD MLCC KPS - 2 Chip Stack 10 Vp-p 15 20 Vp-p 4 6 Competitive Comparision Microphonics - 1210, 4.7µF, 50V, X7R Ripple Current (Arms) 2220, 22µF, 50V 120 100 80 60 40 20 0 0 KEMET KPS, 2220, 22µF, 50V rated (2 Chip Stack) Competitor 2220, 22µF, 50V rated (2 Chip Stack) 60 50 40 30 20 10 0 0 5 Vp-p Sound Pressure (dB) Competitor KEMET - KPS Absolute Temperature (C) 10 15 10 20 Ripple Current (Arms) 30 Note: Refer to Table 4 for test method. © KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1020-4 • 6/22/2010 5 Surface Mount Multilayer Ceramic Chip Capacitors –KPS Series – Commercial Grade (X7R Dielectric) Electrical Characteristics con't Board Flex vs. Termination Type Weibull X7R 1210 10 uF – (22uF KPS Stacked) 2 90 80 70 60 50 40 30 20 10 Board Flex vs. Termination Type Weibull X7R 2220 22uF 25V – (47uF KPS Stacked) 2 90 80 70 60 50 40 30 20 10 Standard Termination KPS – 2 Chip Stack Standard Termination KPS – 2 Chip Stack Percent Percent 1.0 1.5 Board Flexture (mm) 2.0 3.0 4.0 5.0 6.0 7. 0 8.0 9.0 10.0 1.0 1.5 2.0 0 3. 0 4. 0 5. 0 6. Board Flexture (mm) 0 0 7. 8. 9.0 10.0 Board Flexure to 10mm Weibull X7R 1210 4.7 uF 50V 90 80 70 60 50 40 30 20 10 Board Flexure to 10mm Weibull X7R 1812 47uF 16V 2 90 80 70 60 50 40 30 20 10 2 Percent 0 1. 5 1. 0 2. 0 3. 0 4. 0 5. 0 6. 0 7. 000 8. 9. 10. Percent Board Flexture (mm) 1 Board Flexture (mm) 10 © KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1020-4 • 6/22/2010 6 Surface Mount Multilayer Ceramic Chip Capacitors –KPS Series – Commercial Grade (X7R Dielectric) Table 1 – (1210 - 2220 Case Sizes) Cap pF Cap Code Series Voltage Code Voltage Cap Tolerance 0.10 uF 0.22 uF 0.47 uF 1.0 uF 2.2 uF 3.3 uF 4.7 uF 10 uF 15 uF 22 uF 33 uF 47 uF 100 uF 0.10 uF 0.22 uF 0.47 uF 1.0 uF 2.2 uF 3.3 uF 4.7 uF 10 uF 22 uF 33 uF 47 uF 100 uF 220 uF 104 224 474 105 225 335 475 106 156 226 336 476 107 104 224 474 105 225 335 475 106 226 336 476 107 227 K K K K K K K K K K K K K M M M M M M M M M M M M M M M M M M M M M M M M M M Voltage Voltage Code 8 10 4 16 3 25 C1210 5 50 1 100 A 250 4 16 3 25 C1812 5 50 1 100 A 250 4 16 3 25 C2220 5 50 1 100 A 250 Product Availability and Chip Thickness Codes - See Table 2 for Chip Thickness Dimensions FV FV FV FV FV FV FV FV FV FV FV FV FV FV FV FV FV FV FV FV FV FV FV FV FV FV Single Chip Stack FV FV FV FV FV FV FV FV FV FV FV FV FV GP GP GP GP GP GP GP GP GP GP GP GP GP GP GP GP GP GP GP GP GP GP GP GP GP GP GP GP GP GP JS JS JS JS JS JS JS JS JS JS JS JS JS JS JS JS JS JS JS JS JS JS JS JS JS JS JS JS JS JS JS JS JS JS JS JS JS JS FW FW FW FW FW FW FW FW FW FW FW FW FW FW FW FW FW FW FW FW FW FW FW FW FW FW FW FW FW Double Chip Stack FW FW FW FW FW FW FW FW FW FW FW FW FW FW FW FW GR GR GR GR GR GR GR GR GR GR GR GR GR GR GR GR GR GR GR GR GR GR GR GR GR GR GR GR GR GR GR GR GR GR GR GR JR JR JR JR JR JR JR JR JR JR JR JR JR JR JR JR JR JR JR JR JR JR JR JR JR JR JR JR JR JR JR JR JR JR JR JR JR JR JR JR JR JR JR Cap pF Cap Code 10 8 16 4 25 3 50 5 100 1 250 A 16 4 25 3 50 5 100 1 250 A 16 4 25 3 50 5 100 1 250 A Series C1210 C1812 C2220 Table 2 – Chip Thickness / Packaging Quantities Ceramic (L" x Thickness W") Code 1210 FV 1812 2220 FW GP GR JS JR Case Size Specification/ Series Chip C =Size Standard 1210 1210 1812 1812 2220 2220 + Number 0.10 3.35 ± of Zeros 6.15 ± 0.15 2.65 ± 0.35 5.00 ± 0.50 3.50 ± 0.30 5.00 ± 0.50 C 2220 C 106 M 5 R Dielectric 2 Failure Rate/Design C End TU Packaging/Grade Capacitance Capacitance Voltage Code (pF) Thickness ± Tolerance1 Reel Qty per Metallization2 (C-Spec)3 Qty per Reel 7" Plastic 10V 13"=Plastic 1 = KPS Single Chip Stack C = 100% 2Range (mm) K = ±10% Sig. Digits 8= R X7R TU = 7” Reel M = ±20% 4 = 16V 600 3 = 25V 300 5 = 50V 500 1 = 100V 400 A = 250V 300 200 2000 1000 2000 1700 1300 800 2 = KPS Double Chip Stack Matte Sn Unmarked 7289 = 13” Reel Unmarked Package Quantity Based on Finished Chip Thickness Specifications © KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1020-4 • 6/22/2010 7 Surface Mount Multilayer Ceramic Chip Capacitors –KPS Series – Commercial Grade (X7R Dielectric) Soldering Process Recommended Soldering Technique: • Mounting technique is limited to solder reflow only. Recommended Soldering Profile • KEMET recommends following the guidelines outlined in IPC/JEDEC J-STD-020D.1 Table 3 – Chip Capacitor Land Pattern Design Recommendations per IPC-7351 EIA Size Code 1210 1812 2220 Metric Size Code 3225 4532 5650 Median (Nominal) Land Protrusion (mm) X 1.75 2.87 4.78 Y 1.14 1.35 2.08 C 3.00 4.39 5.38 Table 4 – Performance & Reliability: Test Methods and Conditions Stress Ripple Current Terminal Strength Board Flex Reference Heat Generation ∆T : 20ºC max. JIS-C-6429 JIS-C-6429 Test or Inspection Method Reflow solder the capacitor onto a PC board and apply voltage with 10kHz~1Mhz sine curve. (Ripple voltage must be < rated voltage) Appendix 1, Note:Force of 1.8kg for 60 seconds. Appendix 2, Note:2mm (min) for all except 3mm for C0G. Magnification 50X. Conditions: Solderability J-STD-002 a) Method B, 4 hrs @ 155°C, dry heat @ 235°C b) Method B @ 215°C category 3 c) Method D, category 3 @ 260°C Temperature Cycling Biased Humidity Moisture Resistance Thermal Shock High Temperature Life Storage Life Mechanical Shock Resistance to Solvents JESD22 Method JA-104 MIL-STD-202 Method 103 MIL-STD-202 Method 106 MIL-STD-202 Method 107 MIL-STD-202 Method 108 MIL-STD-202 Method 108 MIL-STD-202 Method 213 MIL-STD-202 Method 215 1000 Cycles (-55°C to +125°C), Measurement at 24 hrs. +/- 2 hrs after test conclusion. Load Humidity: 1000 hours 85°C/85%RH and Rated Voltage.Add 100K ohm resistor. Measurement at 24 hrs. +/- 2 hrs after test conclusion. Low Volt Humidity:1000 hours 85C°/85%RH and 1.5V.Add 100K ohm resistor. Measurement at 24 hrs. +/- 2 hrs after test conclusion. t = 24 hours/cycle.Steps 7a & 7b not required.Unpowered. Measurement at 24 hrs. +/- 2 hrs after test conclusion. -55°C/+125°C.Note: Number of cycles required-300, Maximum transfer time-20 seconds, Dwell time-15 minutes.Air-Air. 1000 hours at 125°C (85°C for X5R, Z5U and Y5V) with 1.5X rated voltage applied. 150°C, 0VDC, for 1000 Hours. Figure 1 of Method 213, Condition F. Add Aqueous wash chemical - OKEM Clean or equivalent. © KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1020-4 • 6/22/2010 8 Surface Mount Multilayer Ceramic Chip Capacitors –KPS Series – Commercial Grade (X7R Dielectric) Tape & Reel Packaging Information KEMET offers Multilayer Ceramic Chip Capacitors packaged in 8mm, 12mm and 16mm tape on 7" and 13" reels in accordance with EIA standard 481. This packaging system is compatible with all tape fed automatic pick and place systems. See Table 2 for details on reeling quantities for commercial chips. Bar Code Label Anti-Static Reel KE ME T ® Embossed Plastic* or Punched Paper Carrier. Chip and KPS Orientation in Pocket (except 1825 Commercial, and 1825 & 2225 Military) Sprocket Holes Embossment or Punched Cavity 8mm, 12mm or 16mm Carrier Tape 178mm (7.00") or 330mm (13.00") Anti-Static Cover Tape (.10mm (.004") Max Thickness) *EIA 01005, 0201, 0402 and 0603 case sizes available on punched paper carrier only. Table 5 - Carrier Tape Configuration (mm) EIA Case Size 01005 - 0402 0603 - 1210 1805 - 1808 ≥ 1812 KPS 1210 KPS 1812 & 2220 Array 0508 & 0612 Tape size (W)* 8 8 12 12 12 16 8 Pitch (P1)* 2 4 4 8 8 12 4 *Refer to Figure 1 for W and P1 carrier tape reference locations. *Refer to Table 4 for tolerance specifications. © KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com C1020-4 • 6/22/2010 9 Surface Mount Multilayer Ceramic Chip Capacitors –KPS Series – Commercial Grade (X7R Dielectric) Figure 1: Embossed (Plastic) Carrier Tape Dimensions T T2 P2 ØDo Po [10 pitches cumulative tolerance on tape ±0.2 mm] E1 Ao F Ko B1 Bo E2 W S1 T1 Cover Tape B 1 is for tape feeder reference only, including draft concentric about B o. Center Lines of Cavity P1 ØD 1 Embossment For cavity size, see Note 1 Table 6 User Direction of Unreeling Table 6 - Embossed (Plastic) Carrier Tape Dimensions (Metric will govern) Tape Size 8mm 12mm 16mm 1.5 +0.10/-0.0 (0.059 +0.004/-0.0) Constant Dimensions — Millimeters (Inches) D0 D1 Min. Note 1 1.0 (0.039) 1.5 (0.059) E1 P0 P2 R Ref. Note 2 25.0 (0.984) 30 (1.181) S1 Min. Note 3 0.600 (0.024) T Max. T1 Max. 1.75 ± 0.10 (0.069 ± 0.004) 4.0 ± 0.10 (0.157 ± 0.004) 2.0 ± 0.05 (0.079 ± 0.002) 0.600 (0.024) 0.100 (0.004) Variable Dimensions — Millimeters (Inches) Tape Size 8mm 12mm 16mm Pitch Single (4mm) Single (4mm) & Double (8mm) Triple (12mm) B1 Max. Note 4 4.35 (0.171) 8.2 (0.323) 12.1 (0.476) E2 Min. 6.25 (0.246) 10.25 (0.404) 14.25 (0.561) F 3.5 ± 0.05 (0.138 ± 0.002) 5.5 ± 0.05 (0.217 ± 0.002) 5.5 ± 0.05 (0.217 ± 0.002) P1 4.0 ± 0.10 (0.157 ± 0.004) 8.0 ± 0.10 (0.315 ± 0.004) 8.0 ± 0.10 (0.315 ± 0.004) T2 Max 2.5 (0.098) 4.6 (0.181) 4.6 (0.181) W Max 8.3 (0.327) 12.3 (0.484) 16.3 (0.642) A0,B0 & K0 Note 5 1. The embossment hole location shall be measured from the sprocket hole controlling the location of the embossment. Dimensions of embossment location and hole location shall be applied independent of each other. 2. The tape with or without components shall pass around R without damage (see Figure 5). 3. If S1