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CDR32BP911B3W4

CDR32BP911B3W4

  • 厂商:

    KEMET(基美)

  • 封装:

  • 描述:

    CDR32BP911B3W4 - CERAMIC CHIP CAPACITORS - Kemet Corporation

  • 数据手册
  • 价格&库存
CDR32BP911B3W4 数据手册
CERAMIC CHIP CAPACITORS INTRODUCTION Ceramic chips consist of formulated ceramic dielectric materials which have been fabricated into thin layers, interspersed with metal electrodes alternately exposed on opposite edges of the laminated structure. The entire structure is then fired at high temperature to produce a monolithic block which provides high capacitance values in a small physical volume. After firing, conductive terminations are applied to opposite ends of the chip to make contact with the exposed electrodes. Standard end terminations use a nickel barrier layer and a tin overplate to provide excellent solderability for the customer. KEMET multilayer ceramic chip capacitors are produced in plants designed specifically for chip capacitor manufacture. The process features a high degree of mechanization as well as precise controls over raw materials and process conditions. Manufacturing is supplemented by extensive Technology, Engineering and Quality Assurance programs. KEMET ceramic chip capacitors are offered in the five most popular temperature characteristics. These are designated by the Electronics Industies Association (EIA) as the ultra-stable C0G (also known as NP0, military version BP), the stable X7R (military BX or BR), the stable X5R, and the general purpose Z5U and Y5V. A wide range of sizes are available. KEMET multilayer ceramic chip capacitors are available in KEMET's tape and reel packaging, compatible with automatic placement equipment. Bulk cassette packaging is also available (0805,0603 and 0402 only) for those pick and place machines requiring its use. Table 1 – EIA Temperature Characteristic Codes for Class I Dielectrics Significant Figure of Temperature Coefficient PPM per Degree C 0.0 0.3 0.9 1.0 1.5 Letter Symbol C B A M P Multiplier Applied to Temperature Coefficient Multiplier -1 -10 -100 -1000 -10000 Number Symbol 0 1 2 3 4 Tolerance of Temperature Coefficient PPM per Degree C ± 30 ± 60 ± 120 ± 250 ± 500 Letter Symbol G H J K L KEMET supplies the C0G characteristic. For Class II and III dielectrics (including X7R, X5R, Z5U & Y5V), the first symbol indicates the lower limit of the operating temperature range, the second indicates the upper limit of the operating temperature range, and the third indicates the maximum capacitance change allowed over the operating temperature range. EIA type designation codes for Class II and III dielectrics are shown in Table 2. Table 2 – EIA Temperature Characteristic Codes for Class II & III Dielectrics Low Temperature Rating Degree Celsius +10C -30C -55C Letter Symbol Z Y X High Temperature Rating Degree Celsius +45C +65C +85C +105C +125C +150C +200C Number Symbol 2 4 5 6 7 8 9 Maximum Capacitance Shift Percent ± 1.0% ± 1.5% ± 2.2% ± 3.3% ± 4.7% ± 7.5% ± 10.0% ± 15.0% ± 22.0% + 22/-33% +22/-56% +22/-82% Letter Symbol A B C D E F P R S T U V EIA Class II II II II II II II II III III III III KEMET supplies the X7R, X5R, Z5U and Y5V characteristics. 3. 4. ELECTRICAL CHARACTERISTICS 1. Working Voltage: Refers to the maximum continuous DC working voltage permissible across the entire operating temperature range. The reliability of multilayer ceramic capacitors is not extremely sensitive to voltage, and brief applications of voltage above rated will not result in immediate failure. However, reliability will be degraded by sustained exposure to voltages above rated. Temperature Characteristics: Within the EIA classifications, various temperature characteristics are identified by a three-symbol code; for example: C0G, X7R, X5R, Z5U and Y5V. For Class I temperature compensating dielectrics (includes C0G), the first symbol designates the significant figures of the temperature coefficient in PPM per degree Celsius, the second designates the multiplier to be applied, and the third designates the tolerance in PPM per degrees Celsius. EIA temperature characteristic codes for Class I dielectrics are shown in Table 1. Capacitance Tolerance: See tables on pages 73-76. Capacitance: Within specified tolerance when measured per Table 3. The standard unit of capacitance is the farad. For practical capacitors, capacitance is usually expressed in microfarads (10 -6 farad), nanofarads (10 -9 farad), or picofarads (10 -12 farad). Standard measurement conditions are listed in Table 3 Specified Electrical Limits. Like all other practical capacitors, multilayer ceramic capacitors also have resistance and inductance. A simplified schematic for the single frequency equivalent circuit is shown in Figure 1. At high frequency more complex models apply see KEMET SPICE models at www.kemet.com for details. 2. ©KEMET Electronics Corporation, P.O. Box 5928, Greenville, S.C. 29606, (864) 963-6300 67 Ceramic Surface Mount CERAMIC CHIP CAPACITORS Figure 1 IR 6. Impedance: Since the parallel resistance (IR) is normally very high, the total impedance of the capacitor can be approximated by: Figure 3 ESL ESR C C = Capacitance ESL = Equivalent Series Inductance ESR = Equivalent Series Resistance IR = Insulation Resistance 2 2 Z= ESR + (X - X ) LC Where : Z = Total Impedance 5. Dissipation Factor: Measured under same conditions as capacitance. (See Table 3) Dissipation factor (DF) is a measure of the losses in a capacitor under AC application. It is the ratio of the equivalent series resistance to the capacitive reactance, and is usually expressed in percent. It is normally measured simultaneously with capacitance, and under the same conditions. The vector diagram below illustrates the relationship between DF, ESR and impedance. The reciprocal of the dissipation factor is called the “Q” or quality factor. For convenience, the “Q” factor is often used for very low values of dissipation factor especially when measured at high frequencies. DF is sometimes called the “loss tangent” or “tangent ”, as shown in Figure 2. ESR = Equivalent Series Resistance X = Capacitive Reactance = 1/(2 πfC) C X = Inductive Reactance = (2 πf) (ESL) L The variation of a capacitor's impedance with frequency determines its effectiveness in many applications. At high frequency more detailed models apply see KEMET SPICE models for such instances. 7. Figure 2 ESR DF(%) = ESR x 100 Xc X c O δ Ζ 1 Xc = 2 π fC Insulation Resistance: Measured after 2 minutes electrification at 25°C and rated voltage: Limits per Table 3. Insulation Resistance is the measure of a capacitor to resist the flow of DC leakage current. It is sometimes referred to as “leakage resistance”. Insulation resistance (IR) is the DC resistance measured across the terminals of a capacitor, represented by the parallel resistance (IR) shown in Figure 1. For a given dielectric type, electrode area increases with capacitance, resulting in a decrease in the insulation resistance. Consequently, insulation resistance limits are usually specified as the “RC” (IR x C) product, in terms of ohmfarads or megohm-micro-farads. The insulation resistance for a specific capacitance value is determined by dividing this product by the capacitance. However, as the nominal capacitance values become small, the insulation resistance calculated from the RC product reaches values which are impractical. Consequently, IR specifications usually include both a minimum RC product and a maximum limit based on the IR calculated Table 3 – Specified Electrical Limits Parameter Capacitance & Dissipation Factor: Measured at following conditions: C0G – 1kHz and 1 vrms if capacitance >1000 pF 1MHz and 1 vrms if capacitance ≤1000 pF X7R/X5R/Y5V – 1kHz and 1 vrms* if capacitance ≤ 10 µF X7R/X5R/Y5V – 120Hz and 0.5 vrms if capacitance > 10 µF Z5U – 1kHz and 0.5 vrms C0G Temperature Characteristics Z5U X7R/X5R Y5V DF Limits: **X5R
CDR32BP911B3W4 价格&库存

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