KK1207

TECHNICAL DESCRIPTION The KK1207 is specifically designed for LED and LED DISPLAY derivers. The KK1207 have 12/9 segment output lines, 7 to 4 grid output lines, one display memory, control circuit and 3 line serial data interface. This function are all incorporated into a single chip to build a highly reliable peripheral device for a single chip microcomputer. It is very convenience to control for numeric display. KK1207’s pin assignments and application circuit are optimized for easy PCB Layout and cost saving advantages. KK1207 FEATURES · CMOS Technology · Segment output line selection by command : 12 ~ 9 · Grid output line selection by command : 7 ~ 4 · Operation voltage : 5V · Low Power Consumption · 8-Step Dimming control by command · Serial Interface for Clock, Data Input, Strobe Pins · 24-pin, SOP Package APPLICATION · Segment LED display : VCR, DVD, MWO 1 TECHNICAL DATA KK BLOCK DIAGRAM KK1207 SG1 Control SG2 SG3 SG4 DIN CLK STB Serial Data Interface SG5 Display Memory Segment Driver / Grid Driver SG6 SG7 SG8 SG9 SG10/GR7 OSC R OSC Timing Generator SG11/GR6 SG12/GR5 GR4 GND Dimming Circuit GR3 GR2 GR1 VDD GND PIN CONFIGURATION OSC DIN CLK STB VDD SG1 SG2 SG3 SG4 SG5 SG6 SG7 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 GND GR1 GR2 GR3 GR4 GND VDD SG12/GR5 SG11/GR6 SG10/GR7 SG9 SG8 2 TECHNICAL DATA KK PIN DESCRIPTION KK1207 Pin Name I/O Description Oscillator Input Pin. A resistor is connected to this pin and GND. Data Input Pin. This pin inputs serial data at the rising edge of the shift clock (staring from the lower bit) Clock Input Pin. Rising edge trigger. Strobe pin for Serial Interface. The data input after the STB has fallen is processed as a command. When this pin is “HIGH”, CLK is ignored. Power Supply Segment Output Pins(p-channel, open drain) Segment Output Pin/ Grid Output Pin (CMOS Output) Ground Pin Grid Output Pins (n-channel, open drain) Pin No. OSC I 1 DIN CLK I I 2 3 STB I 4 VDD SG1 to SG9 SG10/GR7 to SG12/GR5 GND GR4 to GR1 O O O 5,18 6~14 15~17 19,24 20~23 3 TECHNICAL DATA FUNCTIONAL DESCRIPTION KK1207 Commands A command is the first byte (b0 to b7) inputted to KK1207 via DIN Pin after STB Pin has changed from ”HIGH” to “LOW” state. If for some reason the STB Pin is set “HIGH” while data or commands are being transmitted, the serial communication is initialized, and the data/commands being transmitted are considered invalid. COMMAND 1 : DISPLAYMODE SETTING COMMANDS KK1207 provides 4 display mode setting as shown in the diagram below: As stated earlier a command is the first one byte(b0 to b7) transmitted to KK1207 via the DIN Pin when STB is “LOW”. However, for these commands, Bit No.3 to Bit No.6(b2 to b5) are ignored, Bit No.7 & Bit No.8(b6 to b7) are given a value of “0”. The Display Mode Setting Commands determine the number of segments and grids be used (1/4 to 1/7 duty, 12 to 9 segments). When these commands are executed, the display forcibly turned off. A display command “ON” must be executed in order to resume display. If the same mode setting is selected, no command execution is take place, therefore, nothing happens. When Power is turned “ON”, the 7-Grid, 9-Segment Mode is selected. MSB 0 0 b1 LSB b0 Don’t Care Display Mode Settings : 00 : 4 Grids, 12 Segments 01 : 5 Grids, 11 Segments 10 : 6 Grids, 10 Segments 11 : 7 Grids, 9 Segments 4 TECHNICAL DATA COMMAND 2 : DATA SETTING COMMANDS KK1207 The Data Setting Commands executes the Data Write Mode for KK1207. The Data Setting Command, the bits5 and 6 (b4, b5) are ignored, bit7(b6) is given the value of “1” while bit8(b7) is given the value of “0”. Please refer to the diagram below. When power is turned ON, bit 4 to bit 1 (b3 to b0) are given the value of “0”. MSB 0 1 b3 b2 b1 b0 LSB Don’t Care Data Write Mode Settings : 00 : Write Data to Display Mode Address Increment Mode Settings (Display Mode): 0 : Increment Address after Data has been Written 1 : Fixes Address Mode Settings : 0 : Normal Operation Mode 1 : Test Mode 5 TECHNICAL DATA COMMAND 3 : ADDRESS SETTING COMMANDS KK1207 Address Setting Commands are used to set the address of the display memory. The address is considered valid if it has a value of “00H” to 0DH”. If the address is set to 0EH or higher, the data is ignored until a valid address is set. When power is turned ON, the address is set at “00H”. Please refer to the diagram below. MSB 1 1 b3 b2 b1 b0 LSB Don’t Care Address : 00H to 0DH Display Mode and RAM Address Data transmitted from an external device to KK1207 via the serial interface are stored in the Display RAM and are assigned addresses. The RAM Addresses of KK1207 are given below in 8 bit unit. SG1 00HL 02HL 04HL 06HL 08HL 0AHL 0CHL b0 xxHL Lower 4 bits SG4 SG5 00HU 02HU 04HU 06HU 08HU 0AHU 0CHU b3 b4 xxHU Higher 4 bits SG8 SG9 01HL 03HL 05HL 07HL 09HL 0BHL 0DHL b7 SG12 DIG1 DIG2 DIG3 DIG4 DIG5 DIG6 DIG7 6 TECHNICAL DATA KK PIN DESCRIPTION KK1207 Pin Name I/O Description Oscillator Input Pin. A resistor is connected to this pin and GND. Data Input Pin. This pin inputs serial data at the rising edge of the shift clock (staring from the lower bit) Clock Input Pin. Rising edge trigger. Strobe pin for Serial Interface. The data input after the STB has fallen is processed as a command. When this pin is “HIGH”, CLK is ignored. Power Supply Segment Output Pins(p-channel, open drain) Segment Output Pin/ Grid Output Pin (CMOS Output) Ground Pin Grid Output Pins (n-channel, open drain) Pin No. OSC I 1 DIN CLK I I 2 3 STB I 4 VDD SG1 to SG9 SG10/GR7 to SG12/GR5 GND GR4 to GR1 O O O 5,18 6~14 15~17 19,24 20~23 3 TECHNICAL DATA COMMAND 3 : ADDRESS SETTING COMMANDS KK1207 Address Setting Commands are used to set the address of the display memory. The address is considered valid if it has a value of “00H” to 0DH”. If the address is set to 0EH or higher, the data is ignored until a valid address is set. When power is turned ON, the address is set at “00H”. Please refer to the diagram below. MSB 1 1 b3 b2 b1 b0 LSB Don’t Care Address : 00H to 0DH Display Mode and RAM Address Data transmitted from an external device to KK1207 via the serial interface are stored in the Display RAM and are assigned addresses. The RAM Addresses of KK1207 are given below in 8 bit unit. SG1 00HL 02HL 04HL 06HL 08HL 0AHL 0CHL b0 xxHL Lower 4 bits SG4 SG5 00HU 02HU 04HU 06HU 08HU 0AHU 0CHU b3 b4 xxHU Higher 4 bits SG8 SG9 01HL 03HL 05HL 07HL 09HL 0BHL 0DHL b7 SG12 DIG1 DIG2 DIG3 DIG4 DIG5 DIG6 DIG7 6 TECHNICAL DATA SWITCHING CHARACTERISTIC WAVEFORM KK1207 Switching Characteristies Waveform is given below. fOSC KK1207 OSC PWSTB STB tCLK-STB PWCLK CLK PWCLK tsetup DIN thold tTZL Gn 90% 10% tTLZ tTZH 90% Sn 10% tTHZ PW CLK (Clock Pulse Width) ≥400ns t setup (Data Setup Time) ≥ 100ns t CLK-STB (Clock - Strobe Time) ≥ 1㎲ t TZH (Rise Time) ≤ 1㎲ t TZL