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KK4020BN

KK4020BN

  • 厂商:

    KODENSHI(可天士)

  • 封装:

  • 描述:

    KK4020BN - 14 Stage Ripple-Carry Binary Counter/Divider High-Voltage Silicon-Gate CMOS - KODENSHI KO...

  • 数据手册
  • 价格&库存
KK4020BN 数据手册
TECHNICAL DATA KK4020B 14 Stage Ripple-Carry Binary Counter/Divider High-Voltage Silicon-Gate CMOS The KK4020B is ripple-carry binary counter. All counter stages are masterslave flip-flops. The state of a counter advances one count on the negative transition of each input pulse; a high level on the RESET line resets the counter to its all zeros state. Schmitt trigger action on the input-pulse line permits unlimited rise and fall times. • Operating Voltage Range: 3.0 to 18 V • Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C • Noise margin (over full package temperature range): 1.0 V min @ 5.0 V supply 2.0 V min @ 10.0 V supply 2.5 V min @ 15.0 V supply 16 1 16 1 N S UFFIX PL AST IC DIP ORDERING INFORMATION KK4020BN Plastic DIP KK4020BD SOIC TA = -55° to 125° C for all packages LOGIC DIAGRAM 9 7 5 CLOCK 10 4 6 13 12 14 15 1 2 3 11 RESET Q1 Q4 Q5 Q6 Q7 Q8 Q9 Q10 Q11 Q12 Q13 Q14 PIN ASSIGNMENT FUNCTION TABLE Inputs Clock Reset L L X H= high level L = low level X=don’t care Output Output state No change Advance to next state All Outputs are low PIN 16 =VCC PIN 8 = GND H 1 KK4020B MAXIMUM RATINGS* Symbol VCC VIN VOUT IIN PD Ptot Tstg TL * Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ Power Dissipation per Output Transistor Storage Temperature Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package) Value -0.5 to +20 -0.5 to VCC +0.5 -0.5 to VCC +0.5 ±10 500*1 100 -65 to +150 260 Unit V V V mA mW mW °C °C Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. *1 For TA=-55 to 100°C (package plastic DIP), for TA=-55 to 65°C (package SOIC) +Derating - Plastic DIP: - 12 mW/°C from 100°С to 125°C SOIC Package: : - 7 mW/°C from 65°С to 125°C RECOMMENDED OPERATING CONDITIONS Symbol VCC VIN, VOUT TA Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage, Output Voltage (Referenced to GND) Operating Temperature, All Package Types Min 3.0 0 -55 Max 18 VCC +125 Unit V V °C This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND≤(VIN or VOUT)≤VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open. 2 KK4020B DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND) VCC Symbol VIH Parameter Minimum High-Level Input Voltage Maximum Low -Level Input Voltage Minimum High-Level Output Voltage Maximum Low-Level Output Voltage Maximum Input Leakage Current Maximum Quiescent Supply Current (per Package) Minimum Output Low (Sink) Current Test Conditions VOUT=0.5 V or VCC - 0.5 V VOUT=1.0 V or VCC - 1.0 V VOUT=1.5 V or VCC - 1.5 V VOUT=0.5 V or VCC - 0.5 V VOUT=1.0 V or VCC - 1.0 V VOUT=1.5 V or VCC - 1.5 V VIN= GND or VCC V 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 18 5.0 10 15 20 5.0 10 15 5.0 5.0 10 15 Guaranteed Limit -55°C 3.5 7.0 11.0 1.5 3.0 4.0 4.95 9.95 14.95 0.05 0.05 0.05 ±0.1 5 10 20 100 0.64 1.6 4.2 -2.0 -0.64 -1.6 -4.2 25° C 3.5 7.0 11.0 1.5 3.0 4.0 4.95 9.95 14.95 0.05 0.05 0.05 ±0.1 5 10 20 100 0.51 1.3 3.4 -1.6 -0.51 -1.3 -3.4 125° C 3.5 7.0 11.0 1.5 3.0 4.0 4.95 9.95 14.95 0.05 0.05 0.05 ±1.0 150 300 600 3000 0.36 0.9 2.4 mA -1.15 -0.36 -0.9 -2.4 Unit V VIL V VOH V VOL VIN= GND or VCC V IIN ICC VIN= GND or VCC VIN= GND or VCC µA µA IOL VIN= GND or VCC UOL=0.4 V UOL=0.5 V UOL=1.5 V VIN= GND or VCC UOH=2.5 V UOH=4.6 V UOH=9.5 V UOH=13.5 V mA IOH Minimum Output High (Source) Current 3 KK4020B AC ELECTRICAL CHARACTERISTICS (CL=50 pF, RL=200 kΩ, tr=tf=20 ns) Symbol fmax Parameter Maximum Clock Frequency (Figure 1) VCC V 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 720 320 260 660 160 120 560 240 200 400 200 160 Guaranteed Limit -55°C 25° C 3.5 8 12 360 160 130 330 80 60 280 120 100 200 100 80 7.5 720 320 260 660 160 120 560 240 200 400 200 160 125° C Unit MHz tPLH, tPHL Maximum Propagation Delay, Clock to Q1 (Figure 1) Maximum Propagation Delay, Qn to Qn+1 (Figure 2) ns tPLH, tPHL ns tPHL Maximum Propagation Delay, Reset to Any Q (Figure 3) Maximum Output Transition Time, Any Output (Figure 1) Maximum Input Capacitance ns tTLH, tTHL ns CIN pF TIMING REQUIREMENTS (CL=50 pF, RL=200 kΩ, tr=tf=20 ns) Symbol tw Parameter Minimum Pulse Width, Clock (Figure 1) VCC V 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 Guaranteed Limit -55°C 280 120 80 400 160 120 700 300 200 25° C 140 60 40 200 80 60 350 150 100 Unlimited 125° C 280 120 80 400 160 120 700 300 200 Unit ns tw Minimum Pulse Width, Reset (Figure 3) ns trem Minimum Removal Time, Reset(Figure 3) ns tr, tf Maximum Input Rise and Fall Times, Clock (Figure 1) ns Figure 1. Switching Waveforms Figure 2. Switching Waveforms 4 KK4020B Figure 3. Switching Waveforms TIMING DIAGRAM 1 Clock Reset Q1 Q4 Q5 Q6 Q7 Q8 Q9 Q10 Q11 Q12 Q13 Q14 2 4 8 16 32 64 128 256 512 1024 2048 40 96 8192 16384 EXPANDED LOGIC DIAGRAM CL1 FF1 Q1 CL2 FF2 Q2 CL3 Q13 CL14 FFI4 Q14 CLOCK RESET CL1 R Q1 Q1 CL2 R Q2 CL3 Q13 FF3-FF13 CL14 R Q14 Q1 Q4 Q13 Q14 5 KK4020B N SUFFIX PLASTIC (MS - 001BB) A 16 9 B 1 8 Dimensions, mm Symbol A B MIN 18.67 6.10 0.36 1.14 2.54 7.62 0° 2.92 7.62 0.20 0.38 10° 3.81 8.26 0.36 MAX 19.69 7.11 5.33 0.56 1.78 F L C D F G H J K L M N C -T- SEATING N G D 0.25 (0.010) M T K PLAN E M H J NOTES: 1. imensions “A”, “B” do not include mold flash or protrusions. Maximum mold flash or protrusions 0.25 mm (0.010) per side. D SUFFIX SOIC (MS - 012AC) A 16 9 Dimensions, mm Symbol. MIN 9.80 3.80 1.35 0.33 0.40 1.27 5.72 0° 0.10 0.19 5.80 0.25 8° 0.25 0.25 6.20 0.50 MAX 10.0 4.00 1.75 0.51 1.27 B P H A B C C R x 45 1 G 8 D F G -TD 0.25 (0.010) M T C M K SEATING PLANE J F M H J K M P R NOTES: 1.Dimensions A and B do not include mold flash or protrusion. 2.Maximum mold flash or protrusion 0.15 mm (0.006) per side for A, for B - 0.25 mm (0.010) per side. 6
KK4020BN 价格&库存

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