KK4021BDW

TECHNICAL DATA KK4021B 8-Bit Shift Register High-Voltage Silicon-Gate CMOS The KK4021B is an Edge-Triggered 8-Bit Shift Register (Parallel-toSerial Converter) with a synchronous Serial Data Input (DS), a Clock Input (CP), an asynchronous active HIGH Parallel Load Input (PL), eight asynchronous Parallel Data Inputs (P0-P7) and Buffered Parallel Outputs from the last three stages (Q5-Q7). Information on the Parallel Data Inputs (P0-P7) is asynchronously loaded into the register while the Parallel Load Input (PL) is HIGH, independent of the Clock (CP) and Serial Data (DS) inputs. Data present in the register is stored on the HIGH-to-LOW transition of the Parallel Load Input (PL). When the Parallel Load Input is LOW, data on the Serial Data Input (DS) is shifted into the first register position and all the data in the register is shifted one position to the right on the LOW-to-HIGH transition of the Clock Input (CP). • Operating Voltage Range: 3.0 to 18 V • Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C • Noise margin (over full package temperature range): 1.0 V min @ 5.0 V supply 2.0 V min @ 10.0 V supply 2.5 V min @ 15.0 V supply ORDERING INFORMATION KK4021BN Plastic KK4021BDW SOIC TA = -55° to 125° C for all packages PIN ASSIGNMENT LOGIC DIAGRAM FUNCTION TABLE SERIAL OPERATION: t n n+1 n+2 n+3 CP DS 0 1 0 1 X PL 0 0 0 0 0 Q5 t=n+6 0 1 0 1 Q5 P7 D Q6 t=n+7 0 1 0 Q6 Q5 D Q6 D Q7 t=n+8 0 1 Q7 Q7 D PARALLEL OPERATION: CP DS PL P5 P6 X PIN 16 =VCC PIN 8 = GND X 1 D D X = don’t care D = 1 or 0 1 KK4021B MAXIMUM RATINGS* Symbol VCC VIN VOUT IIN PD PD Tstg TL * Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ Power Dissipation per Output Transistor Storage Temperature Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package) Value -0.5 to +20 -0.5 to VCC +0.5 -0.5 to VCC +0.5 ±10 750 500 100 -65 to +150 260 Unit V V V mA mW mW °C °C Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. +Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C SOIC Package: : - 7 mW/°C from 65° to 125°C RECOMMENDED OPERATING CONDITIONS Symbol VCC VIN, VOUT TA Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage, Output Voltage (Referenced to GND) Operating Temperature, All Package Types Min 3.0 0 -55 Max 18 VCC +125 Unit V V °C This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND≤(VIN or VOUT)≤VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open. 2 KK4021B DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND) Symbol VIH Parameter Minimum High-Level Input Voltage Test Conditions VOUT=0.5 V or VCC - 0.5 V VOUT=1.0 V or VCC - 1.0 V VOUT=1.5 V or VCC - 1.5 V VCC V 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 18 5.0 10 15 20 5.0 10 15 5.0 5.0 10 15 Guaranteed Limit ≥-55°C 3.5 7 11 1.5 3 4 4.95 9.95 14.95 0.05 0.05 0.05 ±0.1 5.0 10 20 100 0.64 1.6 4.2 -2.0 -0.64 -1.6 -4.2 2 5 °C 3.5 7 11 1.5 3 4 4.95 9.95 14.95 0.05 0.05 0.05 ±0.1 5.0 10 20 100 0.51 1.3 3.4 -1.6 -0.51 -1.3 -3.4 ≤125°C 3.5 7 11 1.5 3 4 4.95 9.95 14.95 0.05 0.05 0.05 ±1.0 150 300 600 3000 0.36 0.9 2.4 mA -1.15 -0.36 -0.9 -2.4 Unit V VIL Maximum Low -Level VOUT=0.5 V or VCC - 0.5 V Input Voltage VOUT=1.0 V or VCC - 1.0 V VOUT=1.5 V or VCC - 1.5 V Minimum High-Level Output Voltage Maximum Low-Level Output Voltage Maximum Input Leakage Current Maximum Quiescent Supply Current (per Package) VIN=GND or VCC V VOH V VOL VIN=GND or VCC V IIN ICC VIN= GND or VCC VIN= GND or VCC µA µA IOL Minimum Output Low VIN= GND or VCC (Sink) Current VOL=0.4 V VOL=0.5 V VOL=1.5 V Minimum Output High VIN= GND or VCC (Source) Current VOH=2.5 V VOH=4.6 V VOH=9.5 V VOH=13.5 V mA IOH AC ELECTRICAL CHARACTERISTICS (CL=50pF, RL=200 kΩ, Input tr=tf=20 ns) Symbol fmax Parameter Maximum Clock Frequency VCC V 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 5.0 3.0 6.0 8.5 320 160 120 320 160 120 200 100 80 Guaranteed Limit ≥-55°C 2 5 °C 3.0 6.0 8.5 320 160 120 320 160 120 200 100 80 7.5 ≤125°C 1.5 3.0 4.25 640 320 240 640 320 240 400 200 160 Unit MHz tPLH, tPHL Maximum Propagation Delay, CP to Qn ns tPLH, tPHL Maximum Propagation Delay, PL to Qn ns tTLH, tTHL Maximum Output Transition Time, Any Output ns CIN Maximum Input Capacitance pF 3 KK4021B TIMING REQUIREMENTS (CL=50pF, RL=200 kΩ, Input tr=tf=20 ns) Symbol tw Parameter Minimum Pulse Width CP VCC V 5.0 10 15 5.0 10 15 5 .0 10 15 5.0 10 15 5 .0 10 15 5 .0 10 15 5.0 10 15 5.0 10 15 160 80 50 180 80 50 120 80 60 50 30 20 0 0 0 0 0 0 280 140 100 15 15 15 Guaranteed Limit ≥-55°C 2 5 °C 160 80 50 180 80 50 120 80 60 50 30 20 0 0 0 0 0 0 280 140 100 15 15 15 ≤125°C 320 160 100 360 160 100 240 160 120 100 60 40 0 0 0 0 0 0 560 240 200 15 15 15 Unit ns tw Minimum Pulse Width PL ns tsu Minimum Setup Time, DS toCP ns tsu Minimum Setup Time, Pn to PL ns th Minimum Hold Time, DS toCP ns th Minimum Hold Time, Pn to PL ns trec Minimum Recovery Time PL ns tr, tf Maximum Input Rise or Fall Time µs EXPANDED LOGIC DIAGRAM 4 KK4021B N SUFFIX PLASTIC (MS - 001BB) A 16 9 B 1 8 Dimensions, mm Symbol A B MIN 18.67 6.10 0.36 1.14 2.54 7.62 0° 2.92 7.62 0.20 0.38 10° 3.81 8.26 0.36 MAX 19.69 7.11 5.33 0.56 1.78 F L C D F C -T- SEATING PLAN E N G D 0.25 (0.010) M T K M H J G H J K L M N NOTES: 1. imensions “A”, “B” do not include mold flash or protrusions. Maximum mold flash or protrusions 0.25 mm (0.010) per side. D SUFFIX SOIC (MS - 012AC) A 16 9 Dimensions, mm Symbol. MIN 9.80 3.80 1.35 0.33 0.40 1.27 5.72 0° 0.10 0.19 5.80 0.25 8° 0.25 0.25 6.20 0.50 MAX 10.0 4.00 1.75 0.51 1.27 B P H A B C C R x 45 1 G 8 D F G -TD 0.25 (0.010) M T C M K SEATING PLANE J F M H J K M P R NOTES: 1.Dimensions A and B do not include mold flash or protrusion. 2.Maximum mold flash or protrusion 0.15 mm (0.006) per side for A, for B - 0.25 mm (0.010) per side. 5