KK4060BN

TECHNICAL DATA KK4060B 14-Stage Ripple-Carry Binary Counter/Divider and Oscillator High-Voltage Silicon-Gate CMOS The KK4060B consists of an oscillator section and 14 ripple-carry binary counter stages. The oscillator configuration allows design of either RC or crystal oscillator circuits. A RESET input is provided which resets the counter to the all-Q’s state and disables the oscillator. A high level on the RESET line accomplishes the reset function. All counter stages are master-slave flip-flops. The state of the counter is advanced one step in binary order on the negative transition of OSC In (and OSC Out). Schmitt trigger action on the input-pulse line permits unlimited input-pulse rise and fall times. • Operating Voltage Range: 3.0 to 18 V • Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C • Noise margin (over full package temperature range): 1.0 V min @ 5.0 V supply 2.0 V min @ 10.0 V supply 2.5 V min @ 15.0 V supply ORDERING INFORMATION KK4060BN Plastic KK4060BD SOIC TA = -55° to 125° C for all packages PIN ASSIGNMENT LOGIC DIAGRAM FUNCTION TABLE Inputs Osc In Reset L L PIN 16=VCC PIN 8= GND X H Outputs Q No change Advance to next state All Outputs are low X = don’t care 1 KK4060B MAXIMUM RATINGS* Symbol VCC VIN VOUT IIN PD PD Tstg TL * Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ Power Dissipation per Output Transistor Storage Temperature Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package) Value -0.5 to +20 -0.5 to VCC +0.5 -0.5 to VCC +0.5 ±10 750 500 100 -65 to +150 260 Unit V V V mA mW mW °C °C Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. +Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C SOIC Package: : - 7 mW/°C from 65° to 125°C RECOMMENDED OPERATING CONDITIONS Symbol VCC VIN, VOUT TA Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage, Output Voltage (Referenced to GND) Operating Temperature, All Package Types Min 3.0 0 -55 Max 18 VCC +125 Unit V V °C This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND≤(VIN or VOUT)≤VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open. 2 KK4060B DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND) VCC Symbol VIH Parameter Minimum High-Level Input Voltage Maximum Low Level Input Voltage Minimum High-Level Output Voltage Maximum Low-Level Output Voltage Maximum Input Leakage Current Maximum Quiescent Supply Current (per Package) Minimum Output Low (Sink) Current Test Conditions VOUT= 0.5 V or VCC - 0.5V VOUT= 1.0 V or VCC - 1.0 V VOUT= 1.5 V VCC - 1.5V VOUT= 0.5 V or VCC - 0.5V VOUT= 1.0 V or VCC - 1.0 V VOUT= 1.5 V VCC - 1.5V VIN=GND or VCC V 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 18 5.0 10 15 20 5.0 10 15 5.0 5.0 10 15 Guaranteed Limit ≥-55°C 3.5 7 11 1.5 3 4 4.95 9.95 14.95 0.05 0.05 0.05 ±0.1 5 10 20 100 0.64 1.6 4.2 -2 -0.64 -1.6 -4.2 2 5 °C 3.5 7 11 1.5 3 4 4.95 9.95 14.95 0.05 0.05 0.05 ±0.1 5 10 20 100 0.51 1.3 3.4 -1.6 -0.51 -1.3 -3.4 ≤125 °C 3.5 7 11 1.5 3 4 4.95 9.95 14.95 0.05 0.05 0.05 ±1.0 150 300 600 3000 0.36 0.9 2.4 mA -1.15 -0.36 -0.9 -2.4 Unit V VIL V VOH V VOL VIN=GND or VCC V IIN ICC VIN= GND or VCC VIN= GND or VCC µA µA IOL VIN= GND or VCC UOL=0.4 V UOL=0.5 V UOL=1.5 V mA IOH Minimum Output VIN= GND or VCC High (Source) Current UOH=2.5 V UOH=4.6 V UOH=9.5 V UOH=13.5 V 3 KK4060B AC ELECTRICAL CHARACTERISTICS (CL=50pF, RL=200kΩ, Input tr=tf=20 ns) VCC Symbol fmax Parameter Maximum Clock Frequency (50% Duty Cycle) (Figure 1) Maximum Propagation Delay, Clock to Q4 (Figure 1) Maximum Propagation Delay, Qn to Qn+1 (Figure 2) Maximum Propagation Delay, Reset to Any Q (Figure 3) Maximum Output Transition Time, Any Output (Figure 1) Maximum Input Capacitance V 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 3.5 8 12 740 300 200 200 100 80 360 160 100 200 100 80 Guaranteed Limit ≥-55°C 2 5 °C 3.5 8 12 740 300 200 200 100 80 360 160 100 200 100 80 7.5 ≤125°C 1.75 4 6 1480 600 400 400 200 160 720 320 200 400 200 160 Unit MHz tPHL, tPLH ns tPHL, tPLH ns tPHL ns tTHL, tTLH ns CIN pF TIMING REQUIREMENTS (CL=50pF, RL=200 kΩ, Input tr=tf=20 ns) VCC Symbol tw Parameter Minimum Pulse Width, Clock (Figure 1) V 5.0 10 15 5.0 10 15 5.0 10 15 100 40 30 120 60 40 Guaranteed Limit ≥-55°C 2 5 °C 100 40 30 120 60 40 Unlimited ≤125°C 200 80 60 240 120 80 Unit ns tw Minimum Pulse Width, Reset (Figure 3) ns tf, tr Maximum Input Rise and Fall Times (Figure 1) ns 4 KK4060B Figure 1. Switching Waveforms Figure 2. Switching Waveforms Figure 3. Switching Waveforms EXPANDED LOGIC DIAGRAM * R = HIGH DOMINATES (RESETS ALL STAGES) ** COUNTER ADVANCES ONE BINARY COUNT ON EACH NEGATIVE - GOING TRANSITION OF CLOCK (AND OSC OUT) 5 KK4060B N SUFFIX PLASTIC (MS - 001BB) A 16 9 B 1 8 Dimensions, mm Symbol A B MIN 18.67 6.10 0.36 1.14 2.54 7.62 0° 2.92 7.62 0.20 0.38 10° 3.81 8.26 0.36 MAX 19.69 7.11 5.33 0.56 1.78 F L C D F C -T- SEATING PLAN E N G D 0.25 (0.010) M T K M H J G H J K L M N NOTES: 1. imensions “A”, “B” do not include mold flash or protrusions. Maximum mold flash or protrusions 0.25 mm (0.010) per side. D SUFFIX SOIC (MS - 012AC) A 16 9 Dimensions, mm Symbol. MIN 9.80 3.80 1.35 0.33 0.40 1.27 5.72 0° 0.10 0.19 5.80 0.25 8° 0.25 0.25 6.20 0.50 MAX 10.0 4.00 1.75 0.51 1.27 B P H A B C C R x 45 1 G 8 D F G -TD 0.25 (0.010) M T C M K SEATING PLANE J F M H J K M P R NOTES: 1.Dimensions A and B do not include mold flash or protrusion. 2.Maximum mold flash or protrusion 0.15 mm (0.006) per side for A, for B - 0.25 mm (0.010) per side. 6