KK4069UBD

KK4069UBD

  • 厂商:

    KODENSHI(可天士)

  • 封装:

  • 描述:

    KK4069UBD - Hex Inverter High-Voltage Silicon-Gate CMOS - KODENSHI KOREA CORP.

  • 详情介绍
  • 数据手册
  • 价格&库存
KK4069UBD 数据手册
TECHNICAL DATA KK4069UB Hex Inverter High-Voltage Silicon-Gate CMOS The KK4069UB types consist of six inverter circuits. These devices are intended for all general-purpose inverter applications where the mediumpower TTL-drive and logic-level-conversion capabilities of circuits such as the IW4049UB Hex Inverter/Buffers are not required. Each of the six inverters is a single stage • Operating Voltage Range: 3.0 to 18 V • Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C • Noise margin (over full package temperature range): 0.5 V min @ 5.0 V supply 1.0 V min @ 10.0 V supply 1.5 V min @ 15.0 V supply ORDERING INFORMATION KK4069UBN Plastic KK4069UBD SOIC TA = -55° to 125° C for all packages LOGIC DIAGRAM PIN ASSIGNMENT FUNCTION TABLE Inputs A L H PIN 14 =VCC PIN 7 = GND Output Y H L L – LOW voltage level H – HIGH voltage level 1 KK4069UB MAXIMUM RATINGS* Symbol VCC VIN IIN PD Ptot Tstg TL * Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Input Current, per Pin Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ Power Dissipation per Output Transistor Storage Temperature Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package) Value -0.5 to +20 -0.5 to VCC +0.5 ±10 500 500 100 -65 to +150 260 Unit V V mA mW mW °C °C Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. +Derating - Plastic DIP: - 12 mW/°C from 100° to 125°C SOIC Package: : - 7 mW/°C from 65° to 125°C RECOMMENDED OPERATING CONDITIONS Symbol VCC VIN, VOUT TA Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage, Output Voltage (Referenced to GND) Operating Temperature, All Package Types Min 3.0 0 -55 Max 18 VCC +125 Unit V V °C This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND≤(VIN or VOUT)≤VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open. 2 KK4069UB DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND) VCC Symbol VIH Parameter Minimum High-Level Input Voltage Maximum Low Level Input Voltage Minimum High-Level Output Voltage Maximum Low-Level Output Voltage Maximum Input Leakage Current Maximum Quiescent Supply Current (per Package) Minimum Output Low (Sink) Current Test Conditions VOUT=0.5V VOUT=1.0 V VOUT=1.5V VOUT= VCC - 0.5 V VOUT= VCC - 1 V VOUT= VCC - 1.5 V VIN=GND V 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 18 5.0 10 15 20 5.0 10 15 5.0 5.0 10 15 Guaranteed Limit ≥-55°C 4.0 8.0 12.5 1.0 2.0 2.5 4.95 9.95 14.95 0.05 0.05 0.05 ±0.1 0.25 0.5 1.0 5.0 0.64 1.6 4.2 -2.0 -0.64 -1.6 -4.2 2 5 °C 4.0 8.0 12.5 1.0 2.0 2.5 4.95 9.95 14.95 0.05 0.05 0.05 ±0.1 0.25 0.5 1.0 5.0 0.51 1.3 3.4 -1.6 -0.51 -1.3 -3.4 ≤125 °C 4.0 8.0 12.5 1.0 2.0 2.5 4.95 9.95 14.95 0.05 0.05 0.05 ±1.0 7.5 15 30 150 0.36 0.9 2.4 mA -1.15 -0.36 -0.9 -2.4 Unit V VIL V VOH V VOL VIN= VCC V IIN ICC VIN= GND or VCC VIN= GND or VCC µA µA IOL VIN= GND or VCC UOL=0.4 V UOL=0.5 V UOL=1.5 V mA IOH Minimum Output VIN= GND or VCC High (Source) Current UOH=2.5 V UOH=4.6 V UOH=9.5 V UOH=13.5 V 3 KK4069UB AC ELECTRICAL CHARACTERISTICS (CL=50pF, RL=200kΩ, Input tr=tf=20 ns) VCC Symbol tPLH, tPHL Parameter Maximum Propagation Delay, Input A to Output Y (Figure 1) Maximum Output Transition Time, Any Output (Figure 1) Maximum Input Capacitance V 5.0 10 15 5.0 10 15 110 60 50 200 100 80 Guaranteed Limit ≥-55°C 2 5 °C 110 60 50 200 100 80 15 ≤125°C 110 80 80 200 100 80 Unit ns tTLH, tTHL ns CIN pF Figure 1. Switching Waveforms EXPANDED LOGIC DIAGRAM (1/6 of the Device) 4 KK4069UB N S UFFIX PLAS TIC DIP (MS - 0 0 1 AA) A 14 8 B 1 7 Dimens ion, mm Symbol A B C MIN 18.67 6.1 MAX 19.69 7.11 5.33 0.36 1.14 2.54 7.62 0° 2.92 7.62 0.2 0.38 10° 3.81 8.26 0.36 0.56 1.78 F L D F C -T- SEATING N G D 0.25 (0.010) M T K PLAN E G H H J M J K L M N NOTES : 1. Dimen s io n s “A ”, “B” d o n o t in clu d e mo ld flas h o r p ro tru s io n s . Maximu m mo ld flas h o r p ro tru s io n s 0.25 mm (0.010) p er s id e. D S UFFIX S OIC (MS - 0 1 2 AB) Dimens ion, mm 8 A 14 Symbol A MIN 8.55 3.8 1.35 0.33 0.4 1.27 5.27 0° 0.1 0.19 5.8 0.25 MAX 8.75 4 1.75 0.51 1.27 H B P B C 1 G 7 C R x 45 D F G -TD 0.25 (0.010) M T C M K SEATING PLAN E H J F M J K M P R 8° 0.25 0.25 6.2 0.5 NOTES : 1. Dimen s io ns A an d B d o n o t in clud e mo ld flas h o r p rotru s ion . 2. M aximu m mo ld flas h o r p ro tru s io n 0.15 mm (0.006) p er s id e fo r A ; fo r B ‑ 0.25 mm (0.010) p er s id e. 5
KK4069UBD
物料型号: - 型号为KK4069UB。

器件简介: - KK4069UB包含六个反相器电路,适用于一般目的的反相应用,不需要像IW4049UB六反相器/缓冲器这样的电路的中等功率TTL驱动和逻辑电平转换能力。

引脚分配: - 引脚14为VCC,引脚7为GND。

参数特性: - 工作电压范围:3.0至18V。 - 最大输入电流:在18V下,整个封装温度范围内为1µA;在18V和25°C时为100nA。 - 噪声容限:在5.0V供电下最小为0.5V;在10.0V供电下最小为1.0V;在15.0V供电下最小为1.5V。

功能详解: - 功能表显示输入和输出的关系,其中输入为L(低电平)时输出为H(高电平),输入为H(高电平)时输出为L(低电平)。

应用信息: - 该器件包含保护电路,以防止由于高静电电压或电场造成损坏。但必须小心避免对高阻抗电路施加任何高于最大额定电压的电压。为了正常操作,VIN和VOUT应限制在GND至VCC的范围内。

封装信息: - 提供了塑料DIP和SOIC两种封装类型的尺寸信息。
KK4069UBD 价格&库存

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