KK4541BD

TECHNICAL DATA KK4541B Programmable Timer High-Performance Silicon-Gate CMOS The KK4541B programmable timer consists of a 16-stage binary counter, an oscillator that is controlled by external R-C components (2 resistors and a capacitor), an automatic power-on reset circuit, and output control logic. The counter increments on positive-edge clock transitons and can also be reset via the MASTER RESET input. The output from this timer is the Q or not Q output from the 8th, 10th, 13th, or 16th counter stage. The desired stage is chosen using time-select inputs A and B. The output is available in either of two modes selectable via the MODE input, pin 10. When this MODE input is a logic “1”,the output will be a continuous square wave having a frequency equal to the oscillator frequency divided by 2N. With the MODE input set to logic ”0” ORDERING INFORMATION and after a MASTER RESET is initiated, the output (assuming Q output KK4541BN Plastic has been selected) changes from a low to a high state after 2N-1 counts and KK4541BD SOIC remains in that state until another MASTER RESET pulse is applied or TA = -55° to 125° C for all packages the MODE input is set to a logic “1”. Timing is initialized by setting the AUTO RESET input (pin 5) to logic “0”and turning power on. If pin 5 is set to logic “1”, the AUTO RESET circuit is disabled and counting will not start untill after a positive MASTER RESET pulse is applied and returns to a low level. The AUTO RESET consumes an appreciable amount of power and should not be used if low-power operation is desired. For reliable automatic power-on reset, VCC should be greater than 5V. • Operating Voltage Range: 3.0 to 18 V • Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C • Noise margin (over full package temperature range): 1.0 V min @ 5.0 V supply 2.0 V min @ 10.0 V supply 2.5 V min @ 15.0 V supply LOGIC DIAGRAM PIN ASSIGNMENT NC = NO CONNECTION PIN 14 =VCC PIN 7 = GND PINS 4,11 = NO CONNECTION 1 KK4541B MAXIMUM RATINGS* Symbol VCC VIN VOUT IIN PD PD Tstg TL * Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ Power Dissipation per Output Transistor Storage Temperature Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package) Value -0.5 to +20 -0.5 to VCC +0.5 -0.5 to VCC +0.5 ±10 750 500 100 -65 to +150 260 Unit V V V mA mW mW °C °C Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. +Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C SOIC Package: : - 7 mW/°C from 65° to 125°C RECOMMENDED OPERATING CONDITIONS Symbol VCC VIN, VOUT TA Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage, Output Voltage (Referenced to GND) Operating Temperature, All Package Types Min 3.0 0 -55 Max 18 VCC +125 Unit V V °C This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND≤(VIN or VOUT)≤VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open. 2 KK4541B DC ELECTRICAL CHARACTERISTICS Digital Section VCC Symbol VIH Parameter Minimum High-Level Input Voltage Maximum Low -Level Input Voltage Minimum High-Level Output Voltage Maximum Low-Level Output Voltage Maximum Input Leakage Current Maximum Quiescent Supply Current (per Package) Minimum Output Low (Sink) Current Test Conditions VOUT=0.5V or VCC-0.5V VOUT=1.0V or VCC-1.0V VOUT=1.5V or VCC-1.5V VOUT=0.5V or VCC-0.5V VOUT=1.0V or VCC-1.0V VOUT=1.5V or VCC-1.5V VIN=GND or VCC V 5 10 15 5 10 15 5.0 10 15 5.0 10 15 18 5.0 10 15 20 5.0 10 15 5.0 5.0 10 15 Guaranteed Limit ≥ -55 °C 3.5 7 11 1.5 3 4 4.95 9.95 14.95 0.05 0.05 0.05 ±0.1 5 10 20 100 1.9 5 12.6 -6.2 -1.9 -5 -12.6 ≤ 25 °C 3.5 7 11 1.5 3 4 4.95 9.95 14.95 0.05 0.05 0.05 ±0.1 5 10 20 100 1.55 4 10 -5 -1.55 -4 -10 ≤ 125 °C 3.5 7 11 1.5 3 4 4.95 9.95 14.95 0.05 0.05 0.05 ±1.0 150 300 600 3000 1.08 2.8 7.2 mA -3 -1.08 -2.8 -7.2 Unit V VIL V VOH V VOL VIN=GND or VCC V IIN ICC VIN= GND or VCC VIN= GND or VCC µA µA IOL VIN= GND or VCC UOL=0.4 V UOL=0.5 V UOL=1.5 V VIN= GND or VCC UOH=2.5 V UOH=4.6 V UOH=9.5 V UOH=13.5 V mA IOH Minimum Output High (Source) Current 3 KK4541B AC ELECTRICAL CHARACTERISTICS (CL=50pF, RL=200kΩ, Input tr=tf=20 ns) VCC Symbol fmax Parameter Maximum Clock Frequency (Figure 1) V 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 5.0 10 15 1.5 4 6 10.5 3.8 2.9 18 10 7.5 200 100 80 360 180 130 Guaranteed Limit ≥-55°C 2 5 °C 1.5 4 6 10.5 3.8 2.9 18 10 7.5 200 100 80 360 180 130 7.5 ≤125°C 0.75 2 3 21 7.6 5.8 36 20 15 400 200 160 720 360 260 pF ns Unit MHz tPLH, tPHL Maximum Propagation Delay, Clock to Q (Figure 1) (28) (216) tTHL Maximum Output Transition Time, Any Output (Figure 1) Maximum Output Transition Time, Any Output (Figure 1) Maximum Input Capacitance ns tTLH CIN TIMING REQUIREMENTS (CL=50pF, RL=200kΩ, Input tr=tf=20 ns) VCC Symbol tw Parameter Minimum Pulse Width, Master Reset or Clock (Figure 1) Maximum Rise and Fall Time, Clock (Figure 1) 5 10 15 5 10 15 Guaranteed Limit +25° C 900 300 225 Unlimited -4 0 ° C to +85° C 1800 600 450 Unit ns tr,tf µs 4 KK4541B Figure 1. Switching Weveforms FREQUENCY SELECTION TABLE INPUTS A B L L L H H L H H No. of Stages N 13 10 8 16 Count 2N 8192 1024 256 65536 PIN 5 6 9 FUNCTION TABLE STATE 0 1 Auto Reset On Auto Reset Disable Master Reset Off Master Reset On Output Initially Output Initially High Low After Reset After Reset (not Q) (Q) Single Transition Recycle Mode Mode 10 EXPANDED LOGIC DIAGRAM 5 KK4541B N S UFFIX PLAS TIC DIP (MS - 0 0 1 AA) A 14 8 B 1 7 Dimens ion, mm Symbol A B C MIN 18.67 6.1 MAX 19.69 7.11 5.33 0.36 1.14 2.54 7.62 0° 2.92 7.62 0.2 0.38 10° 3.81 8.26 0.36 0.56 1.78 F L D F C -T- SEATING N G D 0.25 (0.010) M T K PLAN E G H H J M J K L M N NOTES : 1. Dimen s io n s “A ”, “B” d o n o t in clu d e mo ld flas h o r p ro tru s io n s . Maximu m mo ld flas h o r p ro tru s io n s 0.25 mm (0.010) p er s id e. D S UFFIX S OIC (MS - 0 1 2 AB) Dimens ion, mm 8 A 14 Symbol A MIN 8.55 3.8 1.35 0.33 0.4 1.27 5.27 0° 0.1 0.19 5.8 0.25 MAX 8.75 4 1.75 0.51 1.27 H B P B C 1 G 7 C R x 45 D F G -TD 0.25 (0.010) M T C M K SEATING PLAN E H J F M J K M P R 8° 0.25 0.25 6.2 0.5 NOTES : 1. Dimen s io ns A an d B d o n o t in clud e mo ld flas h o r p rotru s ion . 2. M aximu m mo ld flas h o r p ro tru s io n 0.15 mm (0.006) p er s id e fo r A ; fo r B ‑ 0.25 mm (0.010) p er s id e. 6