KK74HC4060A

KK74HC4060A 14 STAGE BINARY COUNTER/OSCILLATOR The KK74HC4060A is an high speed CMOS 14-STAGE BINARY COUNTER/OSCILLATOR fabricated with silicon gate C2MOS technology. The oscillator configuration allows design of either RC or crystal oscillator circuits. A high level on the CLEAR accomplishes the reset function, i.e. all counter outputs are made low and the oscillator is disabled. A negative transition on the clock input increments the counter. Ten kinds of divided output are provided; 4 to 10 and 12 to 14 stage inclusive. The maximum division available at Q12 is 1/16384 f oscillator. The Clock Input ( ∅I ) and the CLEAR input are equipped with protection circuits against static discharge and transient excess voltage. o o o o . LOW POWER DISSIPATION: ICC =4 µA(MAX.) at TA=25°C SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH = tPHL WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2 V to 6 V KK74HC4060A ORDERING INFORMATION KK74HC4060AN Plastic KK74HC4060ADW SOIC TA = -55° to 125° C for all packages PIN DESCRIPTION PIN No 01, 02, 03 07, 05, 04, 06, 14, 13, 15 09 10 11 12 08 16 SYMBOL Q12 to Q14 Q4 to Q10 NAME AND FUNCTION Counter Outputs Counter Outputs External Capacitor Connection External Resistor Connection Clock Input / Oscillator Master Reset Ground (0V) Positive Supply Voltage PIN ASSIGNMENT ∅O ∅O ∅I CLEAR GND VCC CLEAR ∅I ∅O ∅O INPUT AND OUTPUT EQUIVALENT CIRCUIT VCC VCC INPUT OUTPUT GND GND 1 KK74HC4060A TRUTH TABLE ∅I X CLEAR H L L X : Don’t Care FUNCTION COUNTER IS RESET TO ZERO STATE ∅O OUTPUT GOES TO HIGH LEVEL ∅O OUTPUT GOES TO LOW LEVEL COUNT UP ONE STEP NO CHANGE LOGIC DIAGRAM Q4 7 ∅I 11 ∅O 10 ∅O 9 D CK CLEAR 12 R Q D CK R Q D CK R Q D CK R Q D CK R Q Q5 5 Q R CK D Q R CK D Q R CK D Q R CK D Q R CK D Q R CK D Q R CK D Q R CK D Q R CK D 3 Q14 2 Q13 1 Q12 15 Q10 Q9 13 Q8 14 Q7 6 Q6 4 This logic diagram has not be used to estimate propagation delays 2 KK74HC4060A ABSOLUTE MAXIMUM RATINGS Symbol VСС VI VO IIK IOK IO ICC or IGND Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Current DC VCC or Ground Current Parameter Value -0.5 to +7 -0.5 to VCC + 0.5 -0.5 to VCC + 0.5 ± 20 ± 20 ± 25 ± 50 Unit V V V mA mA mA mA Tstg Storage Temperature -65 to +150 °C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied RECOMMENDED OPERATING CONDITIONS Symbol VСС VI VO TOP tr, tf Supply Voltage Input Voltage Output Voltage Operating Temperature VCC = 2.0 V Input Rise and Fall Time VCC = 4.5 V VCC = 6.0 V Parameter Value 2 to 6 0 to VCC 0 to VCC -55 to +125 0 to 1000 0 to 500 0 to 400 Unit V V V °C ns ns ns 3 KK74HC4060A DC ELECTRICAL CHARACTERISTICS Test Condition Symbol VIH Parameter High Level Input Voltage VCC (V) 2.0 4.5 6.0 VIL Low Level Input Voltage 2.0 4.5 6.0 VOH High Level Output Voltage (Q Output) 2.0 4.5 6.0 4.5 6.0 VOL Low Level Output Voltage (Q Output) 2.0 4.5 6.0 4.5 6.0 VOH High Level Output Voltage (∅O, ∅O Output) VOL Low Level Output Voltage (∅O, ∅O Output) II ICC Input Leakage Current Quiescent Supply Current 2.0 4.5 6.0 2.0 4.5 6.0 6.0 6.0 IO = -20 µA IO = -20 µA IO = -20 µA IO= -4.0 µA IO = -5.2 µA IO = 20 µA IO = 20 µA IO = 20 µA IO= 4.0 µA IO= 5.2 µA IO = -20 µA IO = -20 µA IO = -20 µA IO = 20 µA IO = 20 µA IO = 20 µA VI = VCC or GND V I= VCC or GND 1.8 4.4 5.5 0.2 0.5 0.5 ±0.1 4 1.9 4.4 5.9 4.18 5.68 0.1 0.1 0.1 0.26 0.26 1.8 4.0 5.5 0.2 0.5 0.5 ±1 80 µA µA V V TA = 25°C Min 1.5 3.15 4.2 0.5 1.35 1.8 1.9 4.4 5.9 4.10 5.60 0.1 0.1 0.1 0.40 0.40 V V Max Value -55°C to 125°C Min 1.5 3.15 4.2 0.5 1.35 1.8 V Max V Unit 4 KK74HC4060A AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6 ns) Test Condition Symbol Parameter VCC (V) 2.0 4.5 6.0 tPLH, tPHL Propagation Delay Time ( ∅I-Q4 ) tPD Propagation Delay Time Difference (Qn – Qn+1) Propagation Delay Time (CLEAR – Qn) Maximum Clock Frequency 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 tW(H), tW(L) tW(H) Minimum Pulse Width ( ∅I ) Minimum Pulse Width (CLEAR) 2.0 4.5 6.0 2.0 4.5 6.0 tREM Minimum Removal Time 2.0 4.5 6.0 6 30 35 75 15 13 75 15 13 100 20 17 TA = 25°C Min Max 75 15 13 300 60 51 75 15 13 195 39 33 4 20 24 110 22 19 110 22 19 150 30 26 ns ns ns MHz Value -55°C to 125°C Min Max 110 22 19 450 90 76 110 22 19 295 59 50 ns ns ns ns Unit tTLH, tTHL Output Transition Time tPHL fMAX CAPACITIVE CHARACTERISTICS Test Condition Symbol CIN Parameter Input Capacitance VCC (V) 5.0 TA = 25°C Min Max 10 Value -55°C to 125°C Min Max 10 pF Unit 5 KK74HC4060A TEST CIRCUIT VCC PULSE GENERATOR RT D.U.T. CL CL = 50 pF or equivalent (includes jig and probe capacitance) RL = ZOUT of pulse generator (typically 50 Ω) WAVEFORM 1: PROPAGATION DELAY TIMES, MINIMUM PULSE WIDTH ( ∅I ) (f=1MHz; 50% duty cycle) 6ns 6ns ∅I 50% tW 90% 50% 10% tW VCC GND VOH Q4 tPLH 50% 50% tPHL VOL WAVEFORM 2 : PROPAGATION DELAY TIMES, MINIMUM PULSE WIDTH (CLEAR) (f=1MHz; 50% duty cycle) 6ns 90% CLEAR 50% 10% tW 6ns VCC GND VOH QN tPHL 50% VOL 6 KK74HC4060A WAVEFORM 3 :PROPAGATION DELAY TIMES (f=1MHz; 50% duty cycle) tTHL 90% QN 50% 10% tTLH 90% QN+1 tPLH 50% 10% VOL VOH VOL VOH WAVEFORM 4 : PROPAGATION DELAY TIMES (f=1MHz; 50% duty cycle) tTHL 90% QN 50% 10% tTHL 90% QN+1 50% 10% tPHL VOL VOH VOL VOH 7 KK74HC4060A N S UFFIX PLAS TIC DIP (MS - 0 0 1 BB) A Dimens ion, mm 16 9 B 1 8 Symbol A B C MIN 18.67 6.1 MAX 19.69 7.11 5.33 F L D F 0.36 1.14 2.54 7.62 0° 2.92 7.62 0.2 0.38 0.56 1.78 C -T- SEATING N G D 0.25 (0.010) M T K PLAN E G H H J M J K L M N 10° 3.81 8.26 0.36 NOTES : 1. Dimen s io n s “A ”, “B” d o n o t in clu d e mo ld flas h o r p ro tru s io n s . Maximu m mo ld flas h o r p ro tru s io n s 0.25 mm (0.010) p er s id e. D S UFFIX S OIC (MS - 0 1 2 AC) Dimens ion, mm A 16 9 Symbol A MIN 9.8 3.8 1.35 0.33 0.4 1.27 5.72 0° 0.1 0.19 5.8 0.25 MAX 10 4 1.75 0.51 1.27 H B P B C 1 G 8 C R x 45 D F G J F M -TD 0.25 (0.010) M T C M K SEAT ING PLAN E H J K M P R 8° 0.25 0.25 6.2 0.5 NOTES : 1. Dimen s io ns A an d B d o n o t in clud e mo ld flas h o r p rotru s ion . 2. M aximu m mo ld flas h o r p ro tru s io n 0.15 mm (0.006) p er s id e fo r A ; fo r B ‑ 0.25 mm (0.010) p er s id e. 8