KK74LV138N

TECHNICAL DATA 3-to-8 line decoder/demultiplexer; inverting The KK74LV138 is a low-voltage Si-gate CMOS device and is pin and function compatible 74HCT138. The74LV138 accepts three binary weighted address inputs (A0,A1,A2) and when enabled, provide 8 - mutually exclusive active LOW outputs (Y0 to Y7). The “138” features three enable inputs: two active LOW (CS2,CS3 and one active HIGH (CS1).Every output will be HIGH unless CS2, and CS3 are LOW and CS1 is HIGH. • • • • • • Optimized for Low Voltage applications:1.2 to 3.6 V Demultiplexing capability Multiple input enable for easy expansion Ideal for memory chip select decoding Active LOW mutually exclusive outputs Output capability: standard KK74LV138 N SUFFIX PL AST IC 16 1 16 1 D SUFFIX S O IC ORDERING INFORMATION KK74LV138N Plastic KK74LV138D SOIC TA = -40° to 125° C for all packages PIN ASSIGNMENT LOGIC DIAGRAM FUNCTION TABLE Inputs CS1 CS2 CS3 XXH XHX LXX H H H H H H H H Outputs A2 A1 A0 XXX XXX XXX L L L L H H H H Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 H H H HHHHH H H H HHHHH H H H HHHHH L H H H H H H H PIN 16 =VCC PIN 8 = GND L L L L L L L L L L L L L L L L L L H H L L H H L H L H L H L H H L H H H H H H H H L H H H H H H H H L H H H H H H H H L H H H H H H H H L H H H H H H H H L H H H H H H H H L H = high level (steady state) L = low level (steady state) X = don’t care 1 KK74LV138 MAXIMUM RATINGS Symbol VCC IIK IOK IO ICC Tstg PD * Parameter Value -0.5 to +7.0 ±20 ±50 ±25 ±50 -65 to +150 750 500 260 °C VI< - 0.5 or VI> Vcc+0.5V VO< - 0.5 or VO> Vcc+0.5V -0.5В