2.5Gb Ethernet MAC
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2.5Gb Ethernet MAC
Overview
The 2.5Gb MAC core can support data rates of 1Gbps or 2.5Gbps in LatticeSC/M™
devices. The 2.5Gb MAC transmits and receives data between a host processor and
an Ethernet network. The main function of the Ethernet MAC is to ensure that the
Media Access rules specified in the 802.3 IEEE standards are met while transmitting
and receiving Ethernet frames.
The data received from the GMII interface is first buffered until sufficient data is available to be processed by the Receive
MAC (Rx MAC). The Preamble and the Start of Frame Delimiter (SFD) information are then extracted from the incoming
frame to determine the start of a valid frame. The Receive MAC checks the address of the received packet and validates
whether the frame can be received before transferring it into the FIFO. Only valid frames are transferred into the FIFO. The
2.5Gb MAC however always calculates CRC to check whether the frame was received error-free or not.
Block Diagram
Features
Compliant to IEEE 802.3z standard
Generic 8-bit host interface
8-bit wide internal data path
Generic transmit and receive FIFO interface
http://www.latticesemi.com/products/intellectualproperty/ipcores/2.5gbethernetmac.cfm
10/7/2011
2.5Gb Ethernet MAC
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Full-duplex operation
Transmit and receive statistics vector
Programmable Inter Packet Gap (IPG)
Multicast address filtering
Supports
Full-duplex control using PAUSE frames
VLAN tagged frames
Automatic re-transmission on collision
Automatic padding of short frames
Multicast and Broadcast frames
Optional FCS transmission and reception
Optional MII management interface module
Supports jumbo frames up to 9600 bytes
The 2.5Gb MAC is a user-configurable IP core, which allows the configuration of the IP and generation of a netlist and
simulation file for use in designs. Please note that generating a bitstream may be prevented or the bitstream may have
time logic present unless a license for the IP is purchased.
Performance and Resource Utilization
Results for LatticeSC/M1
Mode
SLICEs LUTs Registers sysMEM EBRs
fMAX (MHz)
With MIIM_module
1008
1428
1032
1
125(-5, -6) / 312.5(-7)
Without MIIM_module
1168
1606
1186
1
125(-5, -6) / 312.5(-7)
1
Performance and utilization characteristics are in Lattice's ispLEVER® v7.0 SP1 software. When using this IP core in a
different density, speed, or grade within the LatticeSC family or in a different software version, performance may vary.
Ordering Information
Part Numbers:
For LatticeSC/M: 2PT5-MAC-SC-U1
To download a full evaluation version of this IP, please go to the Lattice IP Server tab in the IPexpress Main Window. All
ispLeverCORE IP modules available for download are visible on this tab.
To find out how to purchase the 2.5Gb MAC IP Core, please contact your local Lattice Sales Office.
http://www.latticesemi.com/products/intellectualproperty/ipcores/2.5gbethernetmac.cfm
10/7/2011
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