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DC1525A-G

DC1525A-G

  • 厂商:

    LINEAR(凌力尔特)

  • 封装:

    -

  • 描述:

    BOARD DEMO 125MSPS LTC2175-12

  • 数据手册
  • 价格&库存
DC1525A-G 数据手册
DEMO MANUAL DC1525A LTC2175-14/-12, LTC2174-14/-12, LTC2173-14/-12, LTC2172-14/-12, LTC2171-14/-12, LTC2170-14/-12 12-Bit/14-Bit, 25Msps to 125Msps Quad ADCs DESCRIPTION Demonstration circuit 1525A supports a family of 14-Bit/12-Bit 25Msps to 125Msps ADCs. Each assembly features one of the following devices: LTC®2175-14, LTC2175-12, LTC2174-14, LTC2174-12, LTC2173-14, LTC2173-12, LTC2172-14, LTC2172-12, LTC2171-14, LTC2171-12, LTC2170-14, LTC2170-12 high speed, quad ADCs. The versions of the 1525A demo board are listed in Table 1. Depending on the required resolution and sample rate, the DC1525A is supplied with the appropriate ADC. The circuitry on the analog inputs is optimized for analog input frequencies from 5MHz to 140MHz. Refer to the data sheet for proper input networks for different input frequencies. Design files for this circuit board are available at http://www.linear.com/demo L, LT, LTC, LTM, μModule, Linear Technology and the Linear logo are registered trademarks and QuikEval and PScope are trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Table 1. DC1525A Variants DC1525A VARIANTS ADC PART NUMBER RESOLUTION MAXIMUM SAMPLE RATE INPUT FREQUENCY 1525A-A LTC2175-14 14-Bit 125Msps 5MHz to 140MHz 1525A-B LTC2174-14 14-Bit 105Msps 5MHz to 140MHz 1525A-C LTC2173-14 14-Bit 80Msps 5MHz to 140MHz 1525A-D LTC2172-14 14-Bit 65Msps 5MHz to 140MHz 1525A-E LTC2171-14 14-Bit 40Msps 5MHz to 140MHz 1525A-F LTC2170-14 14-Bit 25Msps 5MHz to 140MHz 1525A-G LTC2175-12 12-Bit 125Msps 5MHz to 140MHz 1525A-H LTC2174-12 12-Bit 105Msps 5MHz to 140MHz 1525A-I LTC2173-12 12-Bit 80Msps 5MHz to 140MHz 1525A-J LTC2172-12 12-Bit 65Msps 5MHz to 140MHz 1525A-K LTC2171-12 12-Bit 40Msps 5MHz to 140MHz 1525A-L LTC2170-12 12-Bit 25Msps 5MHz to 140MHz dc1525af 1 DEMO MANUAL DC1525A PERFORMANCE SUMMARY (TA = 25°C) PARAMETER CONDITION VALUE Supply Voltage: DC1525A Depending on Sampling Rate and the A/D Converter Provided, this Supply Must Provide Up to 500mA. Optimized for 3V [3V ↔ 6.0V Min/Max] Analog Input Range Depending on SENSE Pin Voltage 1VP-P to 2VP-P Logic Input Voltages Logic Output Voltages (Differential) Minimum Logic High 1.3V Maximum Logic Low 0.6V Nominal Logic Levels (100Ω Load, 3.5mA Mode) 350mV/1.25V Common Mode Minimum Logic Levels (100Ω Load, 3.5mA Mode) 247mV/1.25V Common Mode Sampling Frequency (Convert Clock Frequency) See Table 1 Encode Clock Level Single-ended Encode Mode (ENC– Tied to GND) 0V to 3.6V Encode Clock Level Differential Encode Mode (ENC– Not Tied to GND) 0.2V to 3.6V Resolution See Table 1 Input Frequency Range See Table 1 SFDR See Applicable Data Sheet SNR See Applicable Data Sheet QUICK START PROCEDURE Demonstration circuit 1525A is easy to set up to evaluate the performance of the LTC2175 A/D converters. Refer to Figure 1 for proper measurement equipment setup and follow this procedure. Setup If a DC1371 QuikEval™ II Data Acquisition and Collection System was supplied with the DC1525A demonstration circuit, follow the DC1371 Quick Start Guide to install the required software and for connecting the DC1371 to the DC1525A and to a PC. DC1525A Demonstration Circuit Board Jumpers The DC1525A demonstration circuit board should have the following jumper settings as default positions: (as per Figure 1). J13: PAR/SER: Selects Parallel or Serial programming mode. (Default – Serial) J14: LANE: Selects either 1 lane or 2 lane output modes (Default – Removed) NOTE: The DC1371 does not support 1 lane operation. J15: SHDN: Enables and disables the LTC2175. (Default – Removed) J2: WP: Enable/Disables write protect for the EEPROM. (Default – Removed) Note: optional jumper should be left open to ensure proper serial configuration. Applying Power and Signals to the DC1525A Demonstration Circuit The DC1371 is used to acquire data from the DC1525A, the DC1371 must FIRST be connected to a powered USB port and have equal to 5V applied power BEFORE applying 3.6V to 6V across the pins marked V+ and GND on the DC1525A. DC1525A requires 3.6V for proper operation. J8: Term: Enables/Disable optional output termination. (Default – Removed) Regulators on the board produce the voltages required for the ADC. The DC1525A demonstration circuit requires up to 500mA depending on the sampling rate and the A/D converter supplied. J5: ILVDS: Selects either 1.75mA or 3.5mA of output current for the LVDS drivers. (Default – Removed) The DC1525A should not be removed, or connected to the DC1371 while power is applied. Optional Jumpers: dc1525af 2 DEMO MANUAL DC1525A QUICK START PROCEDURE 3.5V TO 6V ANALOG INPUTS CHANNEL 1 TO PROVIDED POWER SUPPLY CHANNEL 2 USE PROVIDED USB CABLE PARALLEL/SERIAL CHANNEL 3 CHANNEL 4 dc1525a F01 SINGLE-ENDED ENCODE CLOCK USE PROVIDED DC1075 Figure 1. DC1525A Setup Analog Input Network For optimal distortion and noise performance the RC network on the analog inputs may need to be optimized for different analog input frequencies. For input frequencies above 140MHz, refer to the LTC2175 data sheet for a proper input network. Other input networks may be more appropriate for input frequencies less that 5MHz. In almost all cases, filters will be required on both analog input and encode clock to provide data sheet SNR. The filters should be located close to the inputs to avoid reflections from impedance discontinuities at the driven end of a long transmission line. Most filters do not present 50Ω outside the passband. In some cases, 3dB to 10dB pads may be required to obtain low distortion. If your generator cannot deliver full-scale signals without distortion, you may benefit from a medium power amplifier based on a Gallium Arsenide Gain block prior to the final filter. This is particularly true at higher frequencies where IC based operational amplifiers may be unable to deliver the combination of low noise figure and High IP3 point required. A high order filter can be used prior to this final amplifier, and a relatively lower Q filter used between the amplifier and the demo circuit. Apply the analog input signal of interest to the SMA connectors on the DC1525A demonstration circuit board marked J3 AIN1, J4 AIN2, J6 AIN3, J7 AIN4. These inputs correspond with channels 1 to 4 of the ADC respectively. These inputs are capacitive coupled to Balun transformers ETC1-1-13. Encode Clock NOTE: Apply an encode clock to the SMA connector on the DC1525A demonstration circuit board marked J11 CLK+. As a default the DC1525A is populated to have a single-ended input. For the best noise performance, the ENCODE INPUT must be driven with a very low jitter, square wave source. The amplitude should be large, up to 3VP-P or 13dBm. When dc1525af 3 DEMO MANUAL DC1525A QUICK START PROCEDURE using a sinusoidal signal generator a squaring circuit can be used. Linear Technology also provides demo board DC1075A that divides a high frequency sine wave by four, producing a low jitter square wave for best results with the LTC2175. Using bandpass filters on the clock and the analog input will improve the noise performance by reducing the wideband noise power of the signals. In the case of the DC1525A a bandpass filter used for the clock should be used prior to the DC1075A. Data sheet FFT plots are taken with 10 pole LC filters made by TTE (Los Angeles, CA) to suppress signal generator harmonics, non-harmonically related spurs and broadband noise. Low phase noise Agilent 8644B generators are used for both the Clock input and the Analog input. PScope is available in the DC1371 Quick Start Guide and in the online help available within the PScope program itself. Serial Programming PScope has the ability to program the DC1525A board serially through the DC1371. There are several options available in the LTC2175 family that are only available through serially programming. PScope allows all of these features to be tested. These options are available by first clicking on the Set Demo Bd Options icon on the PScope toolbar (Figure 3). This will bring up the menu shown in Figure 4. Digital Outputs Data outputs, data clock, and frame clock signals are available on J1 of the DC1525A. This connector follows the VITA-57/FMC standard, but all signals should be verified when using an FMC carrier card other than the DC1371. Figure 3. PScope Toolbar Software The DC1371 is controlled by the PScope™ System Software provided or downloaded from the Linear Technology website at http://www.linear.com/software/. To start the data collection software if PScope.exe is installed (by default) in \Program Files\LTC\PScope\, double click the PScope Icon or bring up the run window under the start menu and browse to the PScope directory and select PScope. If the DC1525A demonstration circuit is properly connected to the DC1371, PScope should automatically detect the DC1525A, and configure itself accordingly. If everything is hooked up properly, powered and a suitable convert clock is present, clicking the Collect button should result in time and frequency plots displayed in the PScope window. Additional information and help for Figure 4. Demobd Configuration Options dc1525af 4 DEMO MANUAL DC1525A QUICK START PROCEDURE This menu allows any of the options available for the LTC2175 family to be programmed serially. The LTC2175 family has the following options: Randomizer: Enables Data Output Randomizer • Off (Default): Disables data output randomizer • On: Enables data output randomizer Two’s Complement: Enables two’s complement mode • Off (Default): Selects offset binary mode • On: Selects two’s complement mode Sleep Mode: Selects between normal operation, sleep mode: • Off (Default): Entire ADC is powered, and active • On: The entire ADC is powered down. Channel 1 Nap: Selects between normal operation and putting channel 1 in nap mode. Channel 4 Nap: Selects between normal operation and putting channel 4 in nap mode. • Off (Default): Channel four is active • On: Channel four is in nap mode Output Current: Selects the LVDS output drive current • 1.75mA (Default): LVDS output driver current • 2.1mA: LVDS output driver current • 2.5mA: LVDS output driver current • 3.0mA: LVDS output driver current • 3.5mA: LVDS output driver current • 4.0mA: LVDS output driver current • 4.5mA: LVDS output driver current Internal Termination: Enables LVDS internal termination • Off (Default): Disables internal termination • Off (Default): Channel one is active • On: Enables internal termination • On: Channel one is in nap mode Outputs: Enables Digital Outputs Channel 2 Nap: Selects between normal operation and putting channel 2 in nap mode. • Enabled (Default): Enables digital outputs • Off (Default): Channel two is active Test Pattern: Selects Digital output test patterns. The desired test pattern can be entered into the text boxes provided. • On: Channel two is in nap mode Channel 3 Nap: Selects between normal operation and putting channel 3 in nap mode. • Disabled: Disables digital outputs • Off(default): ADC input data is displayed • Off (Default): Channel three is active • On: Test pattern is displayed. • On: Channel three is in nap mode Once the desired settings are selected hit OK and PScope will automatically update the register of the device on the DC1525A demo board. dc1525af 5 DEMO MANUAL DC1525A PARTS LIST ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER Required Circuit Components 1 2 C1, C17 CAP., X5R, 2.2μF, 10V, 10% 0603 NIC, NMC0603X5R225K10TRPF 2 19 C2, C3, C5, C7-C9, C15, C16, C18, C28, C29, C30, C36, C38, C48, C52, C58, C59, C67 CAP., X5R, 0.1μF, 10V, 10% 0402 AVX, 0402ZD104KAT2A 3 1 C4 CAP., X5R, 1μF, 10V, 10% 0402 MURATA, GRM155R61A105ME15 4 1 C6 CAP., TANT, 100μF, 10V% 6032 AVX, TAJW107K010R 5 3 C10, C53, C54 CAP., X7R, 1μF, 10V, 10% 0603 AVX, 0603ZC105KAT2A 6 8 C25, C26, C33, C34, C41, C42, C64, C65 CAP., X7R, 0.01μF, 50V, 10% 0603 AVX, 06035C103KAT2A 7 4 C27, C35, C57, C66 CAP., NPO, 12pF, 16V, 10% 0402 AVX, 0402YA120KAT2A 8 8 C31, C32, C39, C40, C61, C63, C70, C71 CAP., C0G, 8.2pF, 50V, 5% 0402 AVX, 04025A8R2JAT2A 9 3 C43, C44, C45 CAP., X7R, 0.01μF, 16V, 10% 0402 AVX, 0402YC103KAT2A 10 0 C49, C50 OPT 11 1 C51 CAP., X5R, 4.7μF, 6.3V 20% 0603 AVX, 06036D475MAT2A 12 0 D1 OPT 13 1 J1 BGA CONNECTOR, 40 x 10 SAMTEC, SEAM-40-02.0-S-10-2-A 14 2 J2, J13 3 PIN 0.079 SINGLE ROW HEADER SAMTEC, TMM103-02-L-S 15 2 XJ2, XJ13 SHUNT, 0.079" CENTER SAMTEC, 2SN-BK-G 16 4 J3, J4, J6, J7 CON., SMA 50Ω EDGE-LANCH E. F. JOHNSON, 142-0701-851 17 0 J5, J8, J14, J15 OPT 18 0 J10 OPT HEADER, 2X7 PIN, 0.079CC MOLEX, 87831-1420 19 2 J11, J12 CON., SMA 50Ω STRAIGHT MOUNT CONNEX., 132134 20 4 L4, L5, L6, L12 INDUCTOR, 56nH 0603 MURATA, LQP18MN56NG02D 21 0 L7, L8 OPT 22 2 L11, L9 FERRITE BEAD, 1206 MURATA, BLM31PG330SN1L 23 1 RN1 RES 2X4 ARRAY, CHIP, 33Ω, ISO VISHAY, CRA06E08333R0JTA 24 4 R4, R5, R10, R36 RES., CHIP, 10k, 1/16W, 5% 0402 VISHAY, CRCW040210K0JNED 25 13 R8, R30, R47, R69, R84, R92, R93, R94, R95, RES., CHIP, 100Ω, 1/16W, 5% 0402 R96, R97, R98, R99 VISHAY, CRCW0402100RJNED 26 6 R9, R11, R14, R72, R73, R74 VISHAY, CRCW04021K00JNED 27 1 R12 RES., CHIP, 31.6k, 1/16W, 1% 0402 VISHAY, CRCW040231K6FKED 28 10 R26, R29, R39, R40, R41, R46, R55, R68, R82, R83 RES., CHIP, 49.9Ω, 1/16W, 1% 0402 VISHAY, CRCW040249R9FKED 29 4 R35, R52, R79, R89 RES., CHIP, 86.6Ω, 1/16W, 1% 0402 VISHAY, CRCW040286R6FKED 30 8 R37, R38, R53, R54, R80, R81, R90, R91 RES., CHIP, 86.6Ω, 1/16W, 1% 0603 VISHAY, CRCW060386R6FNEA 31 8 R1, R61, R62, R63, R65, R101, C46, C47 RES., 0Ω, 0402 VISHAY, CRCW04020000Z0ED 32 0 R2, R42, R43, R56, R57, R58, R59, R60, R64, RES., OPT R100, R110, R111, R112, R113, R114, R115, R116, R117 33 8 R102, R103, R104, R105, R106, R107, R108, RES., CHIP, 33k, 1/16W, 5% 0402 R109 VISHAY, CRCW040233K0JNED 34 3 TP1, TP6, TP7 TESTPOINT, TURRET, 0.094" PBF MILL-MAX, 2501-2-00-80-00-00-07-0 35 5 T5, T9, T11, T13, T15 TRANSFORMER, MABA-007159-000000 M/A-COM, MABA-007159-000000 36 4 T8, T10, T12, T14 TRANSFORMER, MABAES0060 M/A-COM, MABAES0060 RES., CHIP, 1k, 1/16W, 5% 0402 dc1525af 6 DEMO MANUAL DC1525A PARTS LIST ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER 37 1 U2 I.C., LT1763CS8-1.8, SO8 LINEAR, LT1763CS8-1.8#TRPBF 38 1 U3 I.C., 24LC32A, TSSOP-8 MICROCHIP, 24LC32A I /ST 1 1 DC1525A GENERAL BOM 2 1 U1 (DC1525A-A) I.C., LTC2175-14, 7mm × 8mm QFN LINEAR., LTC2175IUKG-14#PBF 3 1 FAB, PRINTED CIRCUIT BOARD DEMO CIRCUIT 1525A 1 1 DC1525A GENERAL BOM 2 1 U1 (DC1525A-B) I.C., LTC2174-14, 7mm × 8mm QFN LINEAR., LTC2174IUKG-14#PBF 3 1 FAB, PRINTED CIRCUIT BOARD DEMO CIRCUIT 1525A 1 1 DC1525A GENERAL BOM 2 1 U1 (DC1525A-C) I.C., LTC2173-14, 7mm × 8mm QFN LINEAR., LTC2173IUKG-14#PBF 3 1 FAB, PRINTED CIRCUIT BOARD DEMO CIRCUIT 1525A 1 1 DC1525A GENERAL BOM 2 1 U1 (DC1525A-D) I.C., LTC2172-14, 7mm × 8mm QFN LINEAR., LTC2172IUKG-14#PBF 3 1 FAB, PRINTED CIRCUIT BOARD DEMO CIRCUIT 1525A 1 1 DC1525A GENERAL BOM 2 1 U1 (DC1525A-E) I.C., LTC2171-14, 7mm × 8mm QFN LINEAR., LTC2171IUKG-14#PBF 3 1 FAB, PRINTED CIRCUIT BOARD DEMO CIRCUIT 1525A 1 1 DC1525A GENERAL BOM 2 1 U1 (DC1525A-F) I.C., LTC2170-14, 7mm × 8mm QFN LINEAR., LTC2170IUKG-14#PBF 3 1 FAB, PRINTED CIRCUIT BOARD DEMO CIRCUIT 1525A 1 1 DC1525A GENERAL BOM 2 1 U1 (DC1525A-G) I.C., LTC2175-12, 7mm × 8mm QFN LINEAR., LTC2175IUKG-12#PBF 3 1 FAB, PRINTED CIRCUIT BOARD DEMO CIRCUIT 1525A 1 1 DC1525A GENERAL BOM 2 1 U1 (DC1525A-H) I.C., LTC2174-12, 7mm × 8mm QFN LINEAR., LTC2174IUKG-12#PBF 3 1 FAB, PRINTED CIRCUIT BOARD DEMO CIRCUIT 1525A 1 1 DC1525A GENERAL BOM 2 1 U1 (DC1525A-I) I.C., LTC2173-12, 7mm × 8mm QFN LINEAR., LTC2173IUKG-12#PBF 3 1 FAB, PRINTED CIRCUIT BOARD DEMO CIRCUIT 1525A 1 1 DC1525A GENERAL BOM 2 1 U1 (DC1525A-J) I.C., LTC2172-12, 7mm × 8mm QFN LINEAR., LTC2172IUKG-12#PBF 3 1 FAB, PRINTED CIRCUIT BOARD DEMO CIRCUIT 1525A 1 1 DC1525A GENERAL BOM 2 1 U1 (DC1525A-K) I.C., LTC2171-12, 7mm × 8mm QFN LINEAR., LTC2171IUKG-12#PBF 3 1 FAB, PRINTED CIRCUIT BOARD DEMO CIRCUIT 1525A 1 1 DC1525A GENERAL BOM 2 1 U1 (DC1525A-L) I.C., LTC2170-12, 7mm × 8mm QFN LINEAR., LTC2170IUKG-12#PBF 3 1 FAB, PRINTED CIRCUIT BOARD DEMO CIRCUIT 1525A dc1525af 7 A B C D CLK- CLK+ GND 5 LTC2175IUKG-14 LTC2174IUKG-14 LTC2173IUKG-14 LTC2172IUKG-14 LTC2171IUKG-14 LTC2170IUKG-14 DC1525A-B DC1525A-C DC1525A-D DC1525A-E DC1525A-F opt L8 opt D1 R63 R61 0 C10 1uF 3 2 1 14 14 14 25 40 4 DC1525A-L DC1525A-K DC1525A-J DC1525A-I 80 65 DC1525A-H 105 14 VDD OVDD L7 R65 0 U1 R40 49.9 R41 49.9 opt opt R42 opt R43 C29 0.1uF VCM12 C27 12pF EXT REF VDD LTC2170IUKG-12 LTC2171IUKG-12 LTC2172IUKG-12 LTC2173IUKG-12 LTC2174IUKG-12 LTC2175IUKG-12 C45 0.01uF DC1525A-G ASSY R101 0 R64 opt 3 2 1 100 R30 R29 49.9 R26 49.9 BEAD L11 BEAD L9 C28 0.1uF 125 4 5 MABA-007159-000000 T5 MABAES0060 4 5 T8 + C6 100uF 14 Msps 0.01uF C43 0.01uF C44 3 2 1 C54 1uF 14 Bits R62 0 C26 0.01uF C32 8.2pF C31 8.2pF R100 opt 4 5 R38 86.6 0 4 1 2 T9 MABA-007159-000000 BYP OUT SEN/ADJ R37 86.6 56nH L4 86.6 SHDN R35 5 DC1525A-A C49 opt C50 opt 0.01uF C53 1uF U1 * J3 C25 C51 4.7uF IN ASSY J12 J11 AIN1 TP7 TP6 U2 LT1763CS8-1.8 12 12 12 12 12 12 Bits opt R60 TP1 C52 0.1uF 25 40 65 80 105 125 R14 1K R59 opt R57 opt R58 opt C3 0.1uF C1 2.2uF Msps C2 0.1uF R8 100 C17 2.2uF AIN4- AIN4+ VCM34 AIN3- AIN3+ opt R56 C48 0.1uF 3 U1 C5 0.1uF C36 0.1uF AIN2- AIN2+ C30 0.1uF VDD 14 13 12 11 10 9 8 7 6 5 4 3 2 1 C46 C47 VDD * NC EEVCC EESDA EESCL EEGND CS SCK/SCL MOSI/SDA MISO VUNREG 5V J10 OPT 0 0 AIN4- AIN4+ VCM34 AIN3- AIN3+ REFL REHL REFH REFH AIN2- AIN2+ VCM12 AIN1- AIN1+ C4 1uF MISO PAR/SER 50 8 3 14 10 9 11 12 6 4 7 5 1 2 49 V+ 3V - 6V 4 46 47 48 RN1 33 1 8 2 7 3 6 4 5 OUT3B- OUT3B+ OUT3A- OUT3A+ FR- FR+ OGND OVDD DCO- DCO+ OUT2B- OUT2B+ OUT2A_ OUT2A+ 2 THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS. ENG. CLARENCE M. AK. APPROVALS PCB DES. VDD DATE: A SIZE MOSI MISO J5 OPT 2 R9 1K VDD DEMO CIRCUIT 1525A LTC217XIUKG FAMILY QUAD ADC FAMILY 1 2 SCK J14 OPT CS0 SHEET 1 OF 2 3 REV 1630 McCarthy Blvd. Milpitas, CA 95035 Phone: (408)432-1900 Fax: (408)434-0507 LTC Confidential-For Customer Use Only C15 0.1uF LANE R73 1K VDD DATE 10-29-09 APPROVED CLARENCE M. 1 LANE 2 LANE C16 0.1uF 1.75mA 3.5mA ILVDS PAR/SER OVDD Friday, November 20, 2009 IC NO. 2 J8 OPT R11 1K VDD TECHNOLOGY C9 0.1uF 1 DESCRIPTION REVISION HISTORY PRODUCTION R96 100 J15 OPT 2 R74 1K VDD J13 2 R72 1K TITLE: SCHEMATIC C8 0.1uF RUN SHDN SHDN PAR SER PAR/SER TERM EN DIS VDD 3 REV R12 31.6K 10K R10 ECO 3.3_AUX C7 0.1uF CONTRACT NO. OVDD CUSTOMER NOTICE CS0 SCK MOSI OUT4B- OUT4B+ OUT4A- OUT4A+ OUT3B- OUT3B+ OUT3A- OUT3A+ FR- FR+ DCO- DCO+ OUT2B- OUT2B+ OUT2A- OUT2A+ LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. MISO MOSI SCK CS0 27 28 29 30 31 32 33 34 35 36 37 38 39 40 OUT1B- OUT1B+ OUT1A- OUT1A+ 2 1 3 GND GND GND 3 6 7 1 52 GND GND GND 3 8 13 3 2 51 VDD VDD 15 VDD VDD 16 SENSE CLK+ 17 GND CLK18 VREF CS 19 PAR/SER SCK 20 45 SDO SDI 21 GND GND 22 43 44 OUT1A+ OUT4B- 42 OUT1A- 23 1 3 1 3 1 3 41 OUT1B- OUT1B+ OUT4B+ 24 OUT4A25 OUT4A+ 26 GND 53 1 8 3 5 A B C D DEMO MANUAL DC1525A SCHEMATIC DIAGRAM dc1525af Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. A B C D AIN4 AIN3 AIN2 J7 J6 J4 0.01uF C64 0.01uF C41 0.01uF C33 T13 C65 0.01uF C71 8.2pF C70 8.2pF 5 4 5 R91 86.6 56nH R90 86.6 L12 3 2 1 3 2 1 T10 2 1 2 1 2 1 4 3 MABAES0060 5 T14 4 3 MABAES0060 5 T12 4 3 MABAES0060 5 T15 MABA-007159-000000 C42 0.01uF C63 8.2pF C61 8.2pF 86.6 4 5 R81 86.6 R89 3 2 1 MABA-007159-000000 R80 86.6 86.6 56nH L6 C34 0.01uF C40 8.2pF C39 8.2pF R79 4 5 T11 MABA-007159-000000 R54 86.6 56nH L5 R53 86.6 86.6 R52 C67 0.1uF R83 49.9 R82 49.9 100 C58 0.1uF R69 R68 49.9 R55 49.9 C38 0.1uF C66 12pF C59 0.1uF C57 12pF C35 12pF R84 100 100 R47 R46 49.9 R39 49.9 R93 100 4 R94 100 R92 100 4 VCM34 AIN4- AIN4+ VCM34 AIN3- AIN3+ VCM12 AIN2- AIN2+ GND CLK0_C2M_P CLK0_C2M_N GND GND LA00_P_CC LA00_N_CC GND LA03_P LA03_N GND LA08_P LA08_N GND LA12_P LA12_N GND LA16_P LA16_N GND LA20_P LA20_N GND LA22_P LA22_N GND LA25_P LA25_N GND LA29_P LA29_N GND LA31_P LA31_N GND LA33_P LA33_N GND VADJ GND SEAM-10X40PIN J1G GND DP0_C2M_P DP0_C2M_N GND GND DP0_M2C_P DP0_M2C_N GND GND LA06_P LA06_N GND GND LA10_P LA10_N GND GND LA14_P LA14_N GND GND LA18_P_CC LA18_N_CC GND GND LA27_P LA27_N GND GND SCL SDA GND GND GA0 12P0V GND 12P0V GND 3P3V GND SEAM-10X40PIN J1C G1 G2 G3 G4 G5 G6 G7 G8 G9 G10 G11 G12 G13 G14 G15 G16 G17 G18 G19 G20 G21 G22 G23 G24 G25 G26 G27 G28 G29 G30 G31 G32 G33 G34 G35 G36 G37 G38 G39 G40 C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C15 C16 C17 C18 C19 C20 C21 C22 C23 C24 C25 C26 C27 C28 C29 C30 C31 C32 C33 C34 C35 C36 C37 C38 C39 C40 R98 100 R99 100 R97 100 R95100 OUT4B+ OUT4A+ OUT3B+ OUT3A+ OUT2B+ OUT2A+ OUT1B+ OUT1A+ OUT4B- OUT4A- OUT3B- OUT3A- OUT2B- OUT2A- OUT1B- OUT1A- J2 EN WP DIS SCK MOSI FR- FR+ MISO CS0 CS1 CS2 CS3 CS4 3 CHANNEL 4 CHANNEL 3 CHANNEL 2 3 6 5 7 3 2 1 SCL SDA WP A2 A1 A0 R36 10K U3 24LC32-IST R4 10K CHANNEL 1 2 R5 10K FRAME CLOCK 1 3 8 VCC VSS VREF_A_M2C PRSNT_M2C_N GND CLK0_M2C_P CLK0_M2C_N GND LA02_P LA02_N GND LA04_P LA04_N GND LA07_P LA07_N GND LA11_P LA11_N GND LA15_P LA15_N GND LA19_P LA19_N GND LA21_P LA21_N GND LA24_P LA24_N GND LA28_P LA28_N GND LA30_P LA30_N GND LA32_P LA32_N GND VADJ SEAM-10X40PIN A0 C18 0.1uF 3.3_AUX J1H R2 opt R1 0 4 5 H1 H2 H3 H4 H5 H6 H7 H8 H9 H10 H11 H12 H13 H14 H15 H16 H17 H18 H19 H20 H21 H22 H23 H24 H25 H26 H27 H28 H29 H30 H31 H32 H33 H34 H35 H36 H37 H38 H39 H40 R110 opt A1 R102 33K R111 opt A2 R103 33K D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 D33 D34 D35 D36 D37 D38 D39 D40 GND HA01_P_CC HA01_N_CC GND GND HA05_P HA05_N GND HA09_P HA09_N GND HA13_P HA13_N GND HA16_P HA16_N GND HA20_P HA20_N GND HB03_P HB03_N GND HB05_P HB05_N GND HB09_P HB09_N GND HB13_P HB13_N GND HB21_P HB21_N GND HB20_P HB20_N GND VADJ GND A4 SEAM-10X40PIN J1E R113 opt R105 33K E1 E2 E3 E4 E5 E6 E7 E8 E9 E10 E11 E12 E13 E14 E15 E16 E17 E18 E19 E20 E21 E22 E23 E24 E25 E26 E27 E28 E29 E30 E31 E32 E33 E34 E35 E36 E37 E38 E39 E40 R114 opt A5 R106 33K 2 THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS. ENG. CLARENCE PCB DES. ANTONINA APPROVALS A3 DATE: A SIZE TECHNOLOGY J1 J2 J3 J4 J5 J6 J7 J8 J9 J10 J11 J12 J13 J14 J15 J16 J17 J18 J19 J20 J21 J22 J23 J24 J25 J26 J27 J28 J29 J30 J31 J32 J33 J34 J35 J36 J37 J38 J39 J40 R116 opt A7 R108 33K SEAM-10X40PIN DEMO CIRCUIT 1525A 1 K1 K2 K3 K4 K5 K6 K7 K8 K9 K10 K11 K12 K13 K14 K15 K16 K17 K18 K19 K20 K21 K22 K23 K24 K25 K26 K27 K28 K29 K30 K31 K32 K33 K34 K35 K36 K37 K38 K39 K40 SHEET 2 OF 2 3 REV 1630 McCarthy Blvd. Milpitas, CA 95035 Phone: (408)432-1900 Fax: (408)434-0507 LTC Confidential-For Customer Use Only VREF_B_M2C GND GND CLK1_M2C_P CLK1_M2C_N GND HA02_P HA02_N GND HA06_P HA06_N GND HA10_P HA10_N GND HA17_P_CC HA17_N_CC GND HA21_P HA21_N GND HA23_P HA23_N GND HB00_P_CC HB00_N_CC GND HB06_P_CC HB06_N_CC GND HB10_P HB10_N GND HB14_P HB14_N GND HB17_P_CC HB17_N_CC GND VIO_B_M2C SEAM-10X40PIN J1K R117 opt R109 33K B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33 B34 B35 B36 B37 B38 B39 B40 LTC217XIUKG FAMILY Friday, November 20, 2009 IC NO. 1 RES1 GND GND DP9_M2C_P DP9_M2C_N GND GND DP8_M2C_P DP8_M2C_N GND GND DP7_M2C_P DP7_M2C_N GND GND DP6_M2C_P DP6_M2C_N GND GND GBTCLK1_M2C_P GBTCLK1_M2C_N GND GND DP9_C2M_P DP9_C2M_N GND GND DP8_C2M_P DP8_C2M_N GND GND DP7_C2M_P DP7_C2M_N GND GND DP6_C2M_P DP6_C2M_N GND GND RES0 J1B QUAD ADC FAMILY TITLE: SCHEMATIC SEAM-10X40PIN GND CLK1_C2M_P CLK1_C2M_N GND GND HA03_P HA03_N GND HA07_P HA07_N GND HA11_P HA11_N GND HA14_P HA14_N GND HA18_P HA18_N GND HA22_P HA22_N GND HB01_P HB01_N GND PB07_P HB07_N GND HB11_P HB11_N GND HB15_P HB15_N GND HB18_P HB18_N GND VIO_B_M2C GND R115 opt A6 R107 33K A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A34 A35 A36 A37 A38 A39 A40 J1J GND DP1_M2C_P DP1_M2C_N GND GND DP2_M2C_P DP2_M2C_N GND GND DP3_M2C_P DP3_M2C_N GND GND DP4_M2C_P DP4_M2C_N GND GND DP5_M2C_P DP5_M2C_N GND GND DP1_C2M_P DP1_C2M_N GND GND DP2_C2M_P DP2_C2M_N GND GND DP3_C2M_P DP3_C2M_N GND GND DP4_C2M_P DP4_C2M_N GND GND DP5_C2M_P DP5_C2M_N GND SEAM-10X40PIN CONTRACT NO. F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 F32 F33 F34 F35 F36 F37 F38 F39 F40 VDD R112 opt R104 33K 3.3_AUX A7 A6 A5 A4 DCO+ DCO- A3 A2 A1 A0 DATA CLOCK J1A CUSTOMER NOTICE 2 LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. PG_M2C GND GND HA00_P_CC HA00_N_CC GND HA04_P HA04_N GND HA08_P HA08_N GND HA12_P HA12_N GND HA15_P HA15_N GND HA19_P HA19_N GND HB02_P HB02_N GND HB04_P HB04_N GND HB08_P HB08_N GND HB12_P HB12_N GND HB16_P HB16_N GND HB19_P HB19_N GND VADJ SEAM-10X40PIN J1F PG_C2M GND GND GBTCLK0_M2C_P GBTCLK0_M2C_N GND GND LA01_P_CC LA01_N_CC GND LA05_P LA05_N GND LA09_P LA09_N GND LA13_P LA13_N GND LA17_P_CC LA17_N_CC GND LA23_P LA23_N GND LA26_P LA26_N GND TCK TDI TDO 3P3VAUX TMS TRST_N GA1 3P3V GND 3P3V GND 3P3V SEAM-10X40PIN J1D A B C D DEMO MANUAL DC1525A SCHEMATIC DIAGRAM dc1525af 9 DEMO MANUAL DC1525A DEMONSTRATION BOARD IMPORTANT NOTICE Linear Technology Corporation (LTC) provides the enclosed product(s) under the following AS IS conditions: This demonstration board (DEMO BOARD) kit being sold or provided by Linear Technology is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not provided by LTC for commercial use. As such, the DEMO BOARD herein may not be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including but not limited to product safety measures typically found in finished commercial goods. As a prototype, this product does not fall within the scope of the European Union directive on electromagnetic compatibility and therefore may or may not meet the technical requirements of the directive, or other regulations. If this evaluation kit does not meet the specifications recited in the DEMO BOARD manual the kit may be returned within 30 days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY THE SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THIS INDEMNITY, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES. The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user releases LTC from all claims arising from the handling or use of the goods. Due to the open construction of the product, it is the user’s responsibility to take any and all appropriate precautions with regard to electrostatic discharge. Also be aware that the products herein may not be regulatory compliant or agency certified (FCC, UL, CE, etc.). No License is granted under any patent right or other intellectual property whatsoever. LTC assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind. LTC currently services a variety of customers for products around the world, and therefore this transaction is not exclusive. Please read the DEMO BOARD manual prior to handling the product. Persons handling this product must have electronics training and observe good laboratory practice standards. Common sense is encouraged. This notice contains important safety information about temperatures and voltages. For further safety concerns, please contact a LTC application engineer. Mailing Address: Linear Technology 1630 McCarthy Blvd. Milpitas, CA 95035 Copyright © 2004, Linear Technology Corporation dc1525af 10 Linear Technology Corporation LT 0412 • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2012
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