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DC1796A-D

DC1796A-D

  • 厂商:

    LINEAR(凌力尔特)

  • 封装:

    -

  • 描述:

    DEMO BOARD SAR ADC 16BIT .25MSPS

  • 数据手册
  • 价格&库存
DC1796A-D 数据手册
DEMO MANUAL DC1796A LTC6360 Driving 18-Bit SAR ADC Description The LTC®6360 is a very low noise, high precision, high speed amplifier, suitable for driving SAR ADCs. The LTC6360 features a total output noise of 2.3nV/√Hz combined with 150ns settling time to 16-bit levels (A V = 1). While powered from a single 5V supply, the amplifier output can swing to 0V while maintaining high linearity. This is made possible with the inclusion of a very low noise onchip charge pump that generates a negative voltage to bias the output stage of the amplifier, increasing the allowable negative voltage swing. The LTC2370/LTC2369/LTC2368/ LTC2367/LTC2364 are low power, low noise ADCs with serial outputs that can operate from a single 2.5V supply. Demonstration circuit 1796A demonstrates the DC and AC performance of the LTC6360 driving the LTC2369-18 in conjunction with the DC590B QuikEval™ and DC718 fast DAACS data collection boards. Use the DC590B to demonstrate DC performance such as peak-to-peak noise and DC linearity. Use the DC718 if precise sampling rates are required or to demonstrate AC performance, such as SNR, THD, SINAD and SFDR. The demonstration circuit 1796A is intended to demonstrate recommended grounding, component placement and selection, routing and bypassing for the LTC6360 and the ADC. Design files for this circuit board are available at http://www.linear.com/demo L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and QuikEval and PScope are trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Board Photo GND 9V TO 10V CLKIN 100MHz Max 3.3VP-P Max TO DC718 AIN+/AIN– TO DC590 dc1796a F01 Figure 1. Demo Circuit 1796A dc1796af 1 DEMO MANUAL DC1796A Assembly Options Table 1. DC1796A Assembly Options ASSEMBLY VERSION U1 PART NUMBER MAX CONVERSION RATE NUMBER OF BITS MAX CLKIN FREQUENCY DC1796A-A LTC2370CMS-16 2Msps 16 100MHz DC1796A-B LTC2368CMS-16 1Msps 16 50MHz DC1796A-C LTC2367CMS-16 0.5Msps 16 25MHz DC1796A-D LTC2364CMS-16 0.25Msps 16 12.5MHz DC1796A-E LTC2369CMS-18 1.6Msps 18 99.2MHz DC1796A-F LTC2368CMS-18 1Msps 18 62MHz DC1796A-G LTC2367CMS-18 0.5Msps 18 31MHz DC1796A-H LTC2364CMS-18 0.25Msps 18 15.5MHz Quick Start Procedure This board is tested by measuring the distortion at –1dBFS, 2kHz single-ended input, as shown in Figure 2. A low noise, low distortion generator such as Audio Precision SYS-2722, B&K Type 1051 or Stanford Research DS360, should be used for SINAD, THD or SNR testing. A low jitter RF oscillator, such as the Marconi Instruments Multisource Generator 2026, should be used as the clock source. To test the boards follow the steps below: 1. Make sure that all the jumpers are set as shown in Figure 2 (DC1796A test diagram). 2. Power up the board by applying +9VDC. 3. Apply the clock signal to connector J1. Set the clock frequency to 99.2MHz (to achieve a 1.6Msps conver- sion rate for an 18-bit SAR ADC). Refer to the Clock Source section for more detailed information. Set the clock amplitude to 3.3VPP. 4. For best SNR measurement data, a 2.3kHz cutoff frequency lowpass filter is used in the input signal at J2. See the Analog Input section for more details. 5. Apply a 2kHz, –1dBFS signal to connector J2. There are several ways of level shifting the input signal. In this case, the VREF /2 turret on the demo board was used to provide level shifting of the input signal. VREF /2 should be properly bypassed to ground to minimize noise on the input signal. The performance that results from these connections is displayed in Figure 7. dc1796af 2 DEMO MANUAL DC1796A quick start procedure dc1796a F02 Figure 2. DC1796A Test Diagram DC718 Setup Connect the DC1796A to a DC718 USB high speed data collection board using connector J3. Then, connect the DC718 to a host PC with a standard USB A/B cable. Apply +9V to the indicated terminals. Run the QuikEval II software (pscope.exe version K72, or later) supplied with the DC718, or download it from www.linear.com. Complete software documentation is available from the Help menu. Updates can be downloaded from the Tools menu. Check for updates periodically, as new features may be added. The PScope™ software should recognize the DC1796A and configure itself automatically. Click the Collect button (See Figure 7) to begin acquiring data. The Collect button then changes to Pause, which can be clicked to stop data acquisition. dc1796af 3 DEMO MANUAL DC1796A DC590B Setup IMPORTANT! To avoid damage to the DC1796A, make sure that VCCIO (JP5) is set to 3.3V before connecting the DC590B to the DC1796A. Connect the DC590B to a host PC with a standard USB A/B cable. Connect the DC1796A to a DC590B USB serial controller using the supplied 14-conductor ribbon cable. Run the evaluation software supplied with the DC590B, or download it from www.linear.com. The correct control panel will be loaded automatically. Click the Collect button to begin reading the ADC (see Figure 8). DC1796A Setup DC Power Analog Input The DC1796A requires +9VDC and draws about 60mA. Most of the supply current is consumed by the CPLD, regulators and discrete logic on the board. The +9VDC input voltage powers the LTC6360 and the ADC through LT1763 regulators, which provide protection against accidental reverse bias. Additional regulators provide power for the CPLD. The default driver configuration of the DC1796A is shown in Figure 3. This circuit buffers a single-ended 0V to 4V input signal applied at AIN+. Clock Source For better distortion, the feedback impedance R22 should be matched to the source impedance. Impedance matching negates the effects of input bias current. However, no impedance matching was used for the results provided in Figure 7, for simplicity of measurements. Provide a low jitter 3.3VP-P sine or square wave to J1. The clock input is AC-coupled, so the DC level of the clock signal is not important. A low jitter RF oscillator, such as the Marconi Instruments Multisource Generator 2026, is recommended. Even a good generator can start to produce noticeable jitter at low frequencies. Therefore, it is recommended for lower sample rates to divide down a higher frequency clock to the desired sample rate. The ratio of clock frequency to conversion rate is 62:1 for 18-bit parts and 50:1 for 16-bit parts. If the clock input is to be driven with logic, it is recommended that the 50Ω terminator (R6) be removed. Slow rising edges may compromise the SNR of the converter in the presence of high amplitude, higher frequency input signals. Audio Precision SYS-2722 has a 40Ω source input impedance in the configuration used. Adding another 5Ω (a total of 45Ω) with a C = 1.5µF to GND in a simple RC filter fixture off the board creates a lowpass filter with a 2.3kHz cutoff frequency. This filter is not added on the board due to various input frequencies that the user might select. It is important to use a very low distortion capacitor for the input filter. Shown in Figure 4, Figure 5 and Figure 6, are other DC1796A driver configurations. In order to create the configurations shown in Figure 5 and Figure 6, component R14 (0Ω) needs to be removed from the board. Reference For component values for various circuit gains, refer to the Application Information section of the LTC6360 data sheet. The default reference is a LTC6655 4.096V reference. An external reference can be used by removing (U3) and populating (R3). If an external reference is used, it must settle quickly in the presence of glitches on the REF pin. AC-coupling the input may degrade the distortion performance due to nonlinearity of the coupling capacitor. dc1796af 4 DEMO MANUAL DC1796A DC1796A Setup dc1796a F03 Figure 3. DC-Coupled Noninverting LTC6360 Drives LTC2369-18 18-Bit SAR ADC dc1796a F04 Figure 4. AC-Coupled Noninverting LTC6360 Drives LTC2369-18 18-Bit SAR ADC dc1796af 5 DEMO MANUAL DC1796A DC1796A Setup dc1796a F05 Figure 5. DC-Coupled Inverting LTC6360 Drives LTC2369-18 18-Bit SAR ADC dc1796a F06 Figure 6. AC-Coupled Inverting LTC6360 Drives LTC2369-18 18-Bit SAR ADC dc1796af 6 DEMO MANUAL DC1796A DC1796A Setup Layout As with any high performance ADC, system layout is critical to achieve optimal performance. The area immediately surrounding the ADC on the DC1796A should be used as a guideline for placement and routing of the various components associated with the ADC. The following are some things to consider when laying out a board for the LTC6360 and LTC2369-18: n n n n A ground plane is necessary to obtain best performance. Keep bypass capacitors as close to supply pins as possible. Use individual low impedance returns for all bypass capacitors. Use of a symmetrical layout around the analog inputs will minimize the effects of parasitic elements. n n n Shield analog input traces with ground to minimize coupling from other traces. Keep critical traces as short as possible. Remove ground plane metal from under the –IN pin of the LTC6360 (Pin 1) to reduce parasitic capacitance at this node. Component Selection When driving a low noise, low distortion ADC, such as the LTC2369-18 with the LTC6360, component selection is important so as to not degrade performance. Resistors should have low values to minimize noise and distortion. Metal film resistors are recommended to reduce distortion caused by self-heating. Because of their low voltage coefficients, to further reduce distortion, NPO or silver mica capacitors should be used. DC1796A Jumpers Definitions JP2: CM sets the DC bias for AIN+/AIN– when the inputs are AC-coupled. VREF /2 is the default setting. JP3: Toggles the LTC6360 ON and OFF. Part ON (+5V) is the default setting. JP4: Ties the WP pin of the EEPROM to VCC or GND. WP is the hardware write-protect pin. If tied to VCC, hardware write-protection is enabled. If WP is tied to GND, the hardware write-protection is disabled. JP5: VCCIO sets the output levels at J3 to either 3.3V or 2.5V. Use 3.3V to interface to the DC718, which is the default setting. dc1796af 7 DEMO MANUAL DC1796A Application Screenshots dc1796a F07 Figure 7. PScope Screenshot dc1796af 8 DEMO MANUAL DC1796A Application Screenshots dc1796a F08 Figure 8. QuikEval Screenshot Parts List ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER DC1826A Required Circuit Components 1 17 C1-C6, C10, C12, C14, C15, C20, C21, C22, C24, C26, C28, C33 CAP., X7R, 0.1µF, 25V, 10%, 0603 AVX, 06033C104KAT2A 2 7 C7, C31, C34, C36, C39, C42, C45 CAP., X7R, 1µF, 16V, 10%, 0603 AVX, 0603YC105KAT2A 3 3 C8, C18, C27 CAP., X5R, 10µF, 10V, 20%, 0805 TAIYO YUDEN, LMK212BJ106MG 4 1 C9 CAP., X5R, 47µF, 6.3V, 20%, 0805 TAIYO YUDEN, JMK212BJ476MG-T 5 1 C11 CAP., X7R, 1µF, 16V, 10%, 0805 TDK, C2012X7R1C105K/0.85 6 6 C13, C19, C38, C41, C44, C47 CAP., X5R, 10µF, 6.3V, 20%, 0603 TDK, C1608X5R0J106MT 7 1 C16 CAP., X7R, 470pF 16V, 10%, 0402 AVX, 0402YC471KAT4A 8 1 C17 CAP., X7R, 0.01µF, 16V, 10%, 0402 AVX, 0402YC103KAT2A 9 0 C23, C29, C56, C58, C59 (OPT) CAP., 0603 OPT C57 CAP., NPO, 50pF, 100V, 5%, 0603 AVX, 06031A500JAT2A 10 11 2 C25, C30 CAP., NPO, 10000pF, 50V, 1206 PANASONIC, ECJ-3FC1H103J 12 1 C32 CAP., X5R, 3.3µF, 16V, 10%, 0805 MURATA, GRM21BR61C335KA88L 13 1 C35 CAP., X5R, 22µF, 16V, 20%, 1210 TAIYO YUDEN, EMK325BJ226MM-T 14 5 C37, C40, C43, C46, C60 CAP., X7R, 0.01µF, 16V, 10%, 0603 AVX, 0603YC103KAT dc1796af 9 DEMO MANUAL DC1796A parts list ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER 15 8 C48-C55 CAP., X7R, 0.1µF, 16V, 10%, 0402 TDK, C1005X7R1C104KT 16 6 E1, E2, E3, E4, E9, E10 TP, TURRET, 0.094" MILL-MAX, 2501-2-00-80-00-00-07-0 17 4 E5-E8 TP, TURRET, 0.064" MILL-MAX, 2308-2-00-80-00-00-07-0 18 2 J1, J2 CONN., BNC-5PINS CONNEX, 112404 19 1 J3 CONN., 40PINS SMT, CON-EDGE40-100 SAMTEC, TSW-120-07-L-D 20 1 J4 HEADER, 2×7, 0.079" MOLEX, 87831-1420 21 1 J5 HEADER, 2×5, 0.100", HD2X5-100 SAMTEC, TSW-105-07-L-D 22 4 JP2-JP5 JMP., 1×3, 0.100", HD1X3-100 SAMTEC, TSW-103-07-L-S 23 4 XJP2, XJP3, XJP4, XJP5 SHUNT, 0.100" CENTER SAMTEC, SNT-100-BK-G 24 1 JP1 (PINS 1-2, REF) SHUNT, 0.100" CENTER, FOR PINS 1-2, REF SAMTEC, JL-100-25-T 25 5 R1, R4, R8, R9, R28 RES., CHIP, 33Ω, 0603, 1/10W, 1% NIC, NRC06F33R0TRF 26 8 R2, R7, R12, R16, R19, R24, R32, R43 RES., CHIP, 1.00kΩ, 0603, 1/10W, 1% NIC, NRC06F1001TRF 27 0 R3, R15, R29, R30, R31 (OPT) RES., 0603 OPT 28 6 R5, R10, R11, R13, R14, R22 RES., CHIP, 0Ω, 1/16W, 0603 VISHAY, CRCW06030000Z0ED 29 1 R6 RES., CHIP, 49.9Ω, 1/4W, 1%, 1206 NIC, NRC12F49R9TRF 30 2 R17, R23 RES., CHIP, 4.99Ω, 1/10W, 1%, 0603 VISHAY, CRCW06034R99FKEA 31 2 R18, R20 RES., CHIP, 0.0Ω, 1/16W, 0402 VISHAY, CRCW04020000Z0ED 32 1 R21 RES., CHIP, 2.00kΩ, 1/10W, 1%, 0603 NIC, NRC06F2001TRF 33 3 R25, R26, R27 RES., CHIP, 4.99kΩ, 1/10W, 1%, 0603 NIC, NRC06F4991TRF 34 1 R34 RES., CHIP, 10kΩ, 1/16W, 1%, 0402 NIC, NRC04F1002TRF 35 1 R36 RES., CHIP, 1.69kΩ,1/10W, 1%, 0603 NIC, NRC06F1691TRF 36 1 R37 RES., CHIP, 1.54kΩ, 1%, 0603 NIC, NRC06F1541TRF 37 1 R38 RES., CHIP, 2.80kΩ, 1%, 0603 NIC, NRC06F2801TRF 38 3 R39, R40, R41 RES., CHIP, 1kΩ, 1/16W, 1%, 0402 NIC, NRC04F1001TRF 39 1 R42 RES., CHIP, 10kΩ, 1/10W, 1%, 0603 NIC, NRC06F1002TRF 40 2 U1, U6 IC., TINYLOGIC UHS INVERTER, SC70-5 FAIRCHILD, NC7SZ04P5X 41 2 U2, U5 IC., TINYLOGIC ULP-A UNBUFFERED INVERTER, SC70-5 FAIRCHILD, NC7SVU04P5X 42 1 U3 IC., LTC6655CHMS8-4.096, MS8 LINEAR TECHNOLOGY, LTC6655CHMS8-4.096#PBF 43 1 U4 IC., SINGLE D FLIP FLOP, US8 ON SEMI., NL17SZ74 44 1 U7 IC., SINGLE SPST BUS SWITCH, SC70-5 FAIRCHILD, NC7SZ66P5X 45 1 U9 IC., LTC6360CMS8E, MS8E LINEAR TECHNOLOGY, LTC6360CMS8E#PBF 46 1 U10 IC., SERIAL EEPROM, TSSOP MICROCHIP, 24LC024-I/ST 47 1 U11 IC., LT1763CS8-1.8, SO8 LINEAR TECHNOLOGY, LT1763CS8-1.8#PBF 48 1 U12 IC., LT1763CS8, SO8 LINEAR TECHNOLOGY, LT1763CS8#PBF 49 1 U13 IC., MAX II FAMILY, TQFP100 ALTERA, EPM240GT100C5N 50 1 U14 IC., LT1763CS8-2.5, SO8 LINEAR TECHNOLOGY, LT1763CS8-2.5#PBF 51 1 U15 IC., LT1763CS8-5, SO8 LINEAR TECHNOLOGY, LT1763CS8-5#PBF 52 4 MH1-MH4 STAND-OFF, NYLON (SNAP-ON), 0.375" TALL KEYSTONE, 8832(SNAP ON) dc1796af 10 DEMO MANUAL DC1796A parts list ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER DC1796A-A Required Circuit Components 1 1 DC1796A-2 GENERAL BOM 2 1 U8 IC., LTC2370CMS-16, MS16 LINEAR TECHNOLOGY, LTC2370CMS-16, MS16 3 1 FAB, PRINTED CIRCUIT BOARD DEMO CIRCUIT 1796A-2 4 0 RES., CHIP, 300Ω, 1%, 0402 OPT R35 (OPT) DC1796A-B Required Circuit Components 1 1 DC1796A-2 GENERAL BOM 2 1 U8 IC., LTC2368CMS-16, MS16 LINEAR TECHNOLOGY, LTC2368CMS-16 3 1 FAB, PRINTED CIRCUIT BOARD DEMO CIRCUIT 1796A-2 4 0 RES., CHIP, 300Ω, 1%, 0402 OPT R35 (OPT) DC1796A-C Required Circuit Components 1 1 DC1796A-2 GENERAL BOM 2 1 U8 IC., LTC2367CMS-16, MS16 LINEAR TECHNOLOGY, LTC2367CMS-16 3 1 FAB, PRINTED CIRCUIT BOARD DEMO CIRCUIT 1796A-2 4 0 RES., CHIP, 300Ω, 1%, 0402 OPT R35 (OPT) DC1796A-D Required Circuit Components 1 1 DC1796A-2 U8 2 1 3 1 4 0 R35 (OPT) GENERAL BOM IC., LTC2364CMS-16, MS16 LINEAR TECHNOLOGY, LTC2364CMS-16 FAB, PRINTED CIRCUIT BOARD DEMO CIRCUIT 1796A-2 RES., CHIP, 300Ω, 1%, 0402 OPT DC1796A-E Required Circuit Components 1 1 DC1796A-2 U8 2 1 3 1 4 1 R35 GENERAL BOM IC., LTC2369CMS-18, MS16 LINEAR TECHNOLOGY, LTC2369CMS-18 FAB, PRINTED CIRCUIT BOARD DEMO CIRCUIT 1796A-2 RES., CHIP, 300Ω, 1%, 0402 NIC, NRC04F3000TRF DC1796A-F Required Circuit Components 1 1 DC1796A-2 GENERAL BOM 2 1 U8 IC., LTC2368CMS-18, MS16 FAB, PRINTED CIRCUIT BOARD DEMO CIRCUIT 1796A-2 R35 RES., CHIP, 300Ω, 1%, 0402 NIC, NRC04F3000TRF 3 1 4 1 LINEAR TECHNOLOGY, LTC2368CMS-18 DC1796A-G Required Circuit Components 1 1 DC1796A-2 GENERAL BOM 2 1 U8 IC., LTC2367CMS-18, MS16 FAB, PRINTED CIRCUIT BOARD DEMO CIRCUIT 1796A-2 R35 RES., CHIP, 300Ω, 1%, 0402 NIC, NRC04F3000TRF 3 1 4 1 LINEAR TECHNOLOGY, LTC2367CMS-18 DC1796A-H Required Circuit Components 1 1 DC1796A-2 GENERAL BOM 2 1 U8 IC., LTC2364CMS-18, MS16 FAB, PRINTED CIRCUIT BOARD DEMO CIRCUIT 1796A-2 R35 RES., CHIP, 300Ω, 1%, 0402 NIC, NRC04F3000TRF 3 1 4 1 LINEAR TECHNOLOGY, LTC2364CMS-18 dc1796af 11 A B C D E10 EXT_CM 0V - VREF AIN+ / AIN- GND VREF / 2 E9 0 C31 1uF CM 1 2 3 JP2 5 R32 1K R12 1K C4 0.1uF R6 49.9 1206 R15 OPT R13 BNC VREF / 2 EXT BNC J1 C34 1uF E2 J2 CLK 100MHz Max 3.3Vpp C23 OPT R2 1k 0 R5 R7 1k 2 5 3 C26 0.1uF C60 0.01uF C27 10uF 6.3V 0805 C58 OPT 0 JP3 1 2 3 +5V R30 OPT C15 0.1uF 3 SHDN R31 OPT C57 50pF NPO 2 +5V GND C32 3.3uF 0805 R14 U1 NC7SZ04P5X 4 5 +3.3V 8 7 6 5 R11 0 C56 OPT +IN SHDN VCPI VCPO C16 470pF 0402 U2 NC7SVU04P5X 4 C2 0.1uF U9 * 18 LTC2364CMS-18 -H 4 LTC2368CMS-18 LTC2367CMS-18 -F -G 0.25 0.5 1.0 C30 10nF NPO 1206 C25 10nF 1206 NPO SHDN GND GND GND GNDVOUT_S VIN VOUT_F 5 6 7 8 R20 0 0402 5 4 IN- IN+ * U8 C20 0.1uF LTC23XXCMS C13 10uF 6.3V C14 0.1uF C7 1uF R3 OPT E1 EXT_REF SCK R24 1k RDL/SDI BUSY SDO SDO BUSY RD 14 11 12 3 2. INSTALL SHUNTS AS SHOWN. 1. ALL RESISTORS ARE IN OHMS, 0603. ALL CAPACITORS ARE IN MICROFARADS, 0603. SDO R16 1k SCK 13 9 JP1 C10 0.1uF REF GND REF / SEL 1 2 3 CNV C9 47uF 6.3V 0805 NOTE: UNLESS OTHERWISE SPECIFIED C19 10uF 6.3V R18 0 0402 +2.5V +3.3V LTC6655CHMS8-4.096 4 3 2 1 U3 2 SDO 4 4 HD2X12-079-MOLEX 1 3 5 7 9 11 13 J4 DC590 2 4 6 8 10 12 14 U6 NC7SZ04P5X DC590_DETECT +3.3V TO CPLD 7 8 SCK CNV 2 THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS. CUSTOMER NOTICE 9V-10V R9 33 PR VCC 1 U7 NC7SZ66P5X OE A 0.1uF CLR GND 2 C33 0.1uF 33 R8 ERJON Q. SCALE = NONE APP ENG. PCB DES. NC APPROVALS CNV SCK R21 2k R19 1k C3 0.1uF C24 0.1uF 2 LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. B 6 4 C21 NL17SZ74 U4 33 R1 +3.3V +3.3V CNV BUSY RD Figure 9. LTC6360 Driving 18-Bit SAR ADC 18 18 1.6 18 LTC2369CMS-18 -E 16 R23 4.99 R17 4.99 C22 0.1uF 0805 C18 10uF C6 0.1uF +5V Msps 2.0 1.0 0.5 -B -C 0.25 OPT C59 R29 OPT R22 0 LTC2364CMS-16 C29 OPT 0 R10 -D 1 2 3 4 0402 C17 0.01uF 0.1uF C12 1uF 0805 C11 0805 C8 10uF 9V-10V U8 BITS LTC2370CMS-16 16 LTC2368CMS-16 16 LTC2367CMS-16 16 ASSY -A -IN OUT VCC VDD CLK LTC6360CMS8E 33 R4 VCC C1 0.1uF VDD GND 3 1 Q 3 +3.3V OVDD GND 6 2 GND 10 15 GND 16 8 REF/SEL 3 7 REF CHAIN 1 5 VCC GND 3 2 D CP Q 5 +3.3V GND 9 5 3 4 8 VCC VSS 29 27 25 23 21 19 17 15 13 11 9 7 DB4 DB5 DB6 DB7 DB8 DB9 DB10 DB11 DB12 DB13 DB14 DB15 3 2 1 6 5 7 DATE: N/A SIZE JP4 1 3 R27 4.99k 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 12-9-11 1 LTC6360CMS8E DEMO CIRCUIT 1796A - A / H SHEET 1 LTC6360 DRIVING 18 - BIT SAR ADC IC NO. DATE 12-9-11 OF 2 2 REV. 1630 McCarthy Blvd. Milpitas, CA 95035 Phone: (408)432-1900 www.linear.com Fax: (408)434-0507 LTC Confidential-For Customer Use Only PROG WP R26 4.99k 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 DB16 40 ERJON Q. APPROVED CNVST_33 DB17 3201S-40G1 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 TECHNOLOGY 1 2 3 31 DB3 R25 4.99k 33 DB2 TITLE: SCHEMATIC A2 A1 A0 SCL SDA WP 35 5 37 39 J3 FROM CPLD DB17 DB16 2 C5 0.1uF PROD. FABRICATION DB1 CLKOUT U10 24LC024-I/ST C28 0.1uF +3.3V 1 DESCRIPTION REVISION HISTORY DB0 NC7SVU04P5X U5 2 - 4 REV ECO 5 3 12 4 5 A B C D DEMO MANUAL DC1796A Schematic Diagram dc1796af A B C D +3.3V 21 20 19 18 17 16 15 8 7 7 5 3 1 6 4 2 C49 0.1uF JP2X5/100 9 8 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 5 R43 1k C51 0.1uF R42 10k U13B EPM240T 50 49 48 47 42 41 40 39 38 37 36 35 34 33 30 29 28 27 26 C52 0.1uF IO50 IO49 IO48 IO47 IO42 IO41 IO40 IO39 IO38 IO37 IO36 IO35 IO34 IO33 IO30 IO29 IO28 IO27 IO26 0402 X 8 PLCS C50 0.1uF IO21 10 JTAG DB15 CLKOUT 5 J5 DB14 4 CNVST_33 DB13 3 6 DB12 DB11 2 1 C48 0.1uF IO21 IO20 IO19 IO18 IO17 IO16 IO15 IO8 IO7 IO6 IO5 IO4 IO3 IO2 IO1 +3.3V U13A EPM240T R35 300 OPT 0402 R34 10k 0402 +3.3V C53 0.1uF C54 0.1uF 1K R41 +1.8V 1K 1K R40 R39 13 63 9 31 45 59 80 94 C55 0.1uF CLK IO38 BUSY SCK RD SCK SDO 0402 X 3 PLCS 33 R28 DC590_DETECT IO75 IO74 IO73 IO72 IO71 IO70 IO69 IO68 IO67 IO66 IO61 IO58 IO57 IO56 IO55 IO54 IO53 IO52 IO51 CNTRL TDO TCK TDI TMS DEV_CLRN DEV_OE GCLK3 GCLK2 GCLK1 GCLK0 U13E EPM240T POWER VCCINT VCCINT VCCIO1 VCCIO1 VCCIO1 VCCIO2 VCCIO2 VCCIO2 U13F EPM240T 25 24 23 22 44 43 64 62 14 12 U13C EPM240T 75 74 73 72 71 70 69 68 67 66 61 58 57 56 55 54 53 52 51 4 GND GND GND GND GND GND GND GND 4 10 11 32 46 60 93 65 79 DB2 DB1 DB0 DB17 DB16 IO68 IO56 IO100 IO99 IO98 IO97 IO96 IO95 IO92 IO91 IO90 IO89 IO88 IO87 IO86 IO85 IO84 IO83 IO82 IO81 IO78 IO77 IO76 100 99 98 97 96 95 92 91 90 89 88 87 86 85 84 83 82 81 78 77 76 DB10 DB9 DB8 DB7 IO86 DB6 DB5 DB3 DB4 GND 9V-10V 3 E4 E3 9V-10V C35 22uF 16V 1210 5 5 8 5 8 5 8 SHDN IN LT1763CS8-5 U15 SHDN IN LT1763CS8-2.5 U14 SHDN IN U12 LT1763CS8 SHDN IN U11 LT1763CS8-1.8 4 2 1 BYP SEN OUT BYP SEN OUT BYP SEN OUT BYP SEN OUT 2 4 2 1 4 2 1 4 2 1 2 THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS. LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. CUSTOMER NOTICE C45 1uF 16V 9V-10V C42 1uF 16V 9V-10V C39 1uF 16V 9V-10V 16V C36 1uF 8 Figure 10. LTC6360 Driving 18-Bit SAR ADC U13D EPM240T 3 GND GND GND 3 6 7 GND GND GND 3 6 7 GND GND GND 3 6 7 GND GND GND 3 6 7 5 ERJON Q. APP ENG. SCALE = NONE NC PCB DES. APPROVALS C46 0.01uF C43 0.01uF C40 0.01uF 0.01uF C37 DATE: N/A SIZE 12-9-11 IC NO. 3 2 1 R38 2.80k E5 C47 10uF 6.3V C44 10uF 6.3V E8 E7 C41 10uF 6.3V C38 10uF 6.3V +3.3 V +5 V +2.5 V E6 +1.8 V 1 LTC6360CMS8E DEMO CIRCUIT 1796A - A / H SHEET 2 OF 2 2 REV. 1630 McCarthy Blvd. Milpitas, CA 95035 Phone: (408)432-1900 www.linear.com Fax: (408)434-0507 LTC Confidential-For Customer Use Only +5V +2.5V R37 1.54k R36 1.69k +3.3V +1.8V LTC6360 DRIVING 18 - BIT SAR ADC TECHNOLOGY JP5 VCCIO TITLE: SCHEMATIC +2.5V +3.3V 1 A B C D DEMO MANUAL DC1796A Schematic Diagram dc1796af 13 DEMO MANUAL DC1796A DEMONSTRATION BOARD IMPORTANT NOTICE Linear Technology Corporation (LTC) provides the enclosed product(s) under the following AS IS conditions: This demonstration board (DEMO BOARD) kit being sold or provided by Linear Technology is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not provided by LTC for commercial use. As such, the DEMO BOARD herein may not be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including but not limited to product safety measures typically found in finished commercial goods. As a prototype, this product does not fall within the scope of the European Union directive on electromagnetic compatibility and therefore may or may not meet the technical requirements of the directive, or other regulations. If this evaluation kit does not meet the specifications recited in the DEMO BOARD manual the kit may be returned within 30 days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY THE SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THIS INDEMNITY, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES. The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user releases LTC from all claims arising from the handling or use of the goods. Due to the open construction of the product, it is the user’s responsibility to take any and all appropriate precautions with regard to electrostatic discharge. Also be aware that the products herein may not be regulatory compliant or agency certified (FCC, UL, CE, etc.). No License is granted under any patent right or other intellectual property whatsoever. LTC assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind. LTC currently services a variety of customers for products around the world, and therefore this transaction is not exclusive. Please read the DEMO BOARD manual prior to handling the product. Persons handling this product must have electronics training and observe good laboratory practice standards. Common sense is encouraged. This notice contains important safety information about temperatures and voltages. For further safety concerns, please contact a LTC application engineer. Mailing Address: Linear Technology 1630 McCarthy Blvd. Milpitas, CA 95035 Copyright © 2004, Linear Technology Corporation dc1796af 14 Linear Technology Corporation LT 0512 • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com  LINEAR TECHNOLOGY CORPORATION 2012
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