DC2032A

DEMO MANUAL DC2032A LTC6430-15 50MHz to 1000MHz 75Ω Input/Output CATV Amplifier Description Demonstration circuit 2032A is a 75Ω input and 75Ω output push-pull CATV amplifier featuring the LTC®6430-15. The LTC6430-15 has a power gain of 15.2dB and is part of the LTC643X-YY amplifier series. The DC2032A demo board is optimized for a frequency range from 50MHz to 1000MHz. It incorporates a minimum of passive support components to configure the Performance Summary SYMBOL amplifier for the CATV applications with 75Ω input and output impedance. Design files for this circuit board are available at http://www.linear.com/demo L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Specifications are at TA = 25°C PARAMETER CONDITIONS VCC Operating Supply Range All VCC Pins Plus OUT Pins ICC Current Consumption Total Current VALUE/UNIT Power Supply 4.75V to 5.25V 160mA GND (PINS 8, 14, 17, 23, AND PADDLE 25) VCC (PINS 9, 22) BIAS AND TEMPERATURE COMPENSATION +IN (PIN 24) +OUT (PIN 18) T_DIODE (PIN 16) –IN (PIN 7) –OUT (PIN 13) GND (PINS 8, 14, 17, 23, AND PADDLE 25) DC2032a F01 Figure 1. LTC6430-15 Device Block Diagram dc2032af 1 DEMO MANUAL DC2032A Quick Start Procedure Demo circuit 2032A can be set up to evaluate the performance of the LTC6430-15. Refer to Figures 2 and 3 for proper equipment connections and follow this procedure: Single-Tone Measurement: Connect all test equipment as suggested in Figure 2. 1. The power labels of 5V and GND directly correspond to the power supply. Typical current consumption of the LTC6430-15 is about 160mA. 2. Apply an input signal to J1. A low distortion, low noise signal source with an external high order low pass filter will yield the best performance. The input CW signal is –10dBm. 3. Observe the output via J2. The measured power at the J2 connector should be about 4dBm. Two-Tone Measurement: Connect all test equipment as suggested in Figure 3. 1. The power labels of 5V and GND directly correspond to the power supply. Typical current consumption of the LTC6430-15 is about 160mA. 2. Apply to J1 two independent signals f1 and f2 from SG1 and SG2 at 400MHz and 401MHz respectively. 3. Monitor the output tone level on the spectrum analyzer. Adjust signal generator levels such that output power measures 1dBm/tone at the amplifier output J2, after correcting for external cable losses, minimum loss matching pads and attenuations. 4. Change the spectrum analyzer’s center frequency and observe the two IM3 tones at 1MHz below and above the input frequencies. The frequencies of IM3_LOW and IM3_HIGH are 399MHz and 402MHz, respectively. The measurement levels should be approximately –90dBc; 46dBm is a typical performance of OIP3 at 400MHz. For this setup, the Rohde and Schwarz FSEM30 spectrum analyzer was used. This SA has a typical 20dBm thirdorder intercept point (TOI). So, the SA input attenuation is set to 20dB with an external 14dB attenuation pad (matches DUT gain), resulting in an attenuation total of 34dB. The system as described can measure OIP3 up to 50dBm. DC POWER SUPPLY GND V+ VCC = 4.75V TO 5.25V SIGNAL GENERATOR (HP8644A) COAXIAL CABLE –5.7dB –5.7dB MINIMUM LOSS MATCHING PAD LOW PASS FILTER (OPTIONAL) 3dB ATTENUATION PAD (OPTIONAL) 50Ω 75Ω MINI-CIRCUITS BMP-5075R OR EQUIVALENT MINIMUM LOSS MATCHING PAD 75Ω 50Ω MINI-CIRCUITS BMP-5075R OR EQUIVALENT SPECTRUM ANALYZER ROHDE AND SCHWARZ FSEM30 DC2032a F02 Figure 2. Proper Equipment Setup for Gain and Single-Tone Measurement dc2032af 2 DEMO MANUAL DC2032A Quick Start Procedure SIGNAL GENERATOR 1 (HP8644A) DC POWER SUPPLY GND AMPLIFIER MINI-CIRCUITS, ZHL-2 OR EQUIVALENT V+ VCC = 4.75V TO 5.25V 14dB ATTENUATION PAD (MATCHES DUT GAIN) LOW PASS FILTER 3dB ATTENUATION PAD 6dB ATTENUATION PAD (OPTIONAL) COAXIAL CABLE –5.7dB –5.7dB COMBINER MINI-CIRCUITS ADP-2-9 OR EQUIVALENT MINIMUM LOSS MATCHING PAD MINIMUM LOSS MATCHING PAD 50Ω 6dB ATTENUATION PAD (OPTIONAL) LOW PASS FILTER 75Ω 75Ω MINI-CIRCUITS BMP-5075R OR EQUIVALENT MINI-CIRCUITS BMP-5075R OR EQUIVALENT APPROX. –7dBm/TONE 50Ω APPROX. –13dBm/TONE DUT GAIN APPROX. 14dB SPECTRUM ANALYZER ROHDE AND SCHWARZ FSEM30 DC2032a F03 1dBm/TONE AMPLIFIER MINI-CIRCUITS, ZHL-2 OR EQUIVALENT SIGNAL GENERATOR 2 (HP8644A) Figure 3. Proper Equipment Setup for IP3 Measurement dc2032af 3 DEMO MANUAL DC2032A OPERATION Demo circuit 2032A is a highly linear fixed gain amplifier. To configure the demo circuit 2032A for use in the 75Ω CATV environment, a transformer with 1:1.33 impedance ratio is added at the board’s input and output. These transformers transform the differential 100Ω impedance of the LTC6430-15 to single-ended 75Ω impedance. The frequency range of the circuit is limited by the balun transformers. Hence, the demo board has a nominal working frequency range from 50MHz to 1000MHz. Figure 4 shows the S-parameters of demo board. 16 0 14 –4 |S21| |S21| (dB) –8 –12 10 |S22| 8 –16 |S12| 6 –20 4 –24 2 0 240 Demo circuit 2032A is shipped with 75Ω F-type connectors (J1 and J2) at both input and output. Depending on the user’s preference, the board may also accept other connector types such as BNC or SMA. Please note that the use of substandard connectors can limit the usable bandwidth of the circuit. The input and output transformers (T3 and T4) convert the differential to single-ended 75Ω for compatibility with the CATV environment, while preserving all the exceptional characteristics of the LTC6430-15. In addition, the balun’s excellent phase balance and the second order linearity of the LTC6430-15 combine to further suppress second order products across the entire CATV band. Figure 5 shows the spurious products (in dBc) within the passband frequency of the output third-order intermodulation (OIM3) and the second harmonic distortion (HD2). –28 |S11| 40 |S11|, |S12|, |S22| (dB) 12 Figure 6 shows the simplified demo circuit schematic. It requires a minimum of passive supporting components. 640 440 FREQUENCY (MHz) 840 –32 1040 DC2032a F04 Figure 4. Demo Board DC2032A S-Parameters Table 1. Typical Demo Board Performance Summary TA = 25°C, VCC = 5V FREQUENCY (MHz) POWER GAIN |S21| (dB) OUTPUT THIRD-ORDER INTERCEPT POINT1 OIP3 (dBm) 50 13.5 46.4 –90.8 –88.1 –87.6 19.5 4.3 100 13.5 46.1 –90.2 –90.1 –82.7 21.3 4.3 200 13.7 45.1 –88.2 –83.5 –79.7 21.4 4.2 300 13.8 44.9 –87.9 –88.4 –73.8 21.4 4.1 400 14.0 45.3 –88.6 –72.0 –71.8 22.0 4.0 500 14.2 46.7 –91.4 –73.7 21.9 4.0 600 14.2 46.7 –91.5 21.9 4.1 700 13.9 46.6 –91.3 21.9 4.4 800 13.7 45.4 –88.8 21.3 4.7 900 13.7 44.9 –87.8 20.9 5.1 1000 13.9 44.5 –87.1 20.5 5.1 OUTPUT THIRD-ORDER INTERMODULATION1 OIM3 (dBc) SECOND HARMONIC DISTORTION2 HD2 (dBc) THIRD HARMONIC DISTORTION2 HD3 (dBc) OUTPUT 1dB COMPRESSION POINT P1dB (dBm) NOISE FIGURE3 NF (dB) Notes: All figures are referenced to J1 (Input Port) and J2 (Output Port). 1. Two-tone test condition: Output power level = 1dBm/tone; Tone spacing = 1MHz. 2. Single-tone test condition: Output power level = 8dBm. 3. Small signal noise figure. dc2032af 4 DEMO MANUAL DC2032A OPERATION 0 The input stability networks (C3, C4, R1, R2) are not required since the LTC6430-15 is preceded by a low frequency termination from the balun transformer. OIM3, POUT = 1dBm/TONE HD2, POUT = 8dBm –10 OIM3, HD2 (dBc) –20 –30 Table 2 shows the function of each input and output on the board. –40 –50 –60 Table 2. DC2032A Board I/O Descriptions –70 HD2 –80 –90 –100 OIM3 0 200 600 400 FREQUENCY (MHz) 800 1000 DC2032a F05 Figure 5. OIM3 and HD2 vs Frequency The input and output DC blocking capacitors (C1, C2, C7 and C8) are required because this device is internally biased for optimal operation. FUNCTION J1 IN) Single-Ended Input. Impedance Matched to 75Ω. J2 (OUT) Single-Ended Output. Impedance Matched to 75Ω. E1 (VCC) Positive Supply Voltage Source. E2 (GND) Negative Supply Ground. Additional Information As with any RF device, minimizing ground inductance is critical. Care should be taken with the board layout because of the exposed pad packages. The maximum number of minimum diameter vias holes should be placed underneath the exposed pad. This will ensure good RF ground and low The frequency appropriate choke (L1 and L2) and the decoupling capacitors (C9, C10, C11 and C12) provide bias to the RF ±OUT nodes. Only a single 5V supply is necessary for the VCC pins on the device. C5 1000pF CONNECTOR VCC VCC C1 0.047µF C10 1000pF 0603 6 DNC DNC VCC DNC GND LTC6430-15 DNC DNC DNC GND DNC –OUT C2 0.047µF 7 8 9 10 11 12 VCC C6 1000pF 17 16 15 T4 TC1.33-282+ 3 R3 OPT C8 0.047µF 14 13 L2 560nH 1 4 • 5 T_DIODE DNC 4 3 DNC 18 C7 0.047µF • 4 GND DNC J1 DNC DNC 3 +OUT VCC 1 L1 560nH DNC GND 2 –IN • IN • 6 1 T3 TC1.33-282+ +IN GND 25 24 23 22 21 20 19 C9 0.1µF 0603 6 OUT J2 VCC C11 0.1µF 0603 C12 1000pF 0603 E1 E2 VCC 4.75V TO 5.25V GND DC2032a F06 Figure 6. Demo Board DC2032A Simplified Schematic dc2032af 5 DEMO MANUAL DC2032A OPERATION thermal impedance. Maximizing the copper ground plane will also improve heat spreading and reduce inductance. It is a good idea to cover the via holes with solder mask on the back side of the PCB to prevent solder from wicking away from the critical PCB to the exposed pad interface. The DC2032A has a nominal working frequency range from 50MHz to 1000MHz. It is not intended for operation down to DC. The lower frequency cutoff is limited by on-chip matching elements. Setup and Testing Signal Sources The LTC6430-15 is an amplifier with high linearity performance; therefore, output intermodulation products are very low. For this reason, it drives most test equipment and test setups to their limits. Consequently, accurate measurement of IP3 for a low distortion IC such as the LTC6430-15 requires certain precautions to be observed in the test setup and testing procedure. Setup Signal Sources Figure 3 shows a proposed IP3 test setup. This setup has low phase noise, good reverse isolation, high dynamic range, sufficient harmonic filtering and wideband impedance matching. The setup is outlined here: a. High performance signal generators 1 and 2 (HP8644A) should be used in the setup. These suggested generators have low harmonic distortion and very low phase noise. b. High linearity amplifiers to improve isolation. They prevent the two signal generators from cross talking with each other and provide higher output power. c. A low pass filter to suppress harmonic contents from interfering with the test signal. d. The signal combiner from Mini-Circuits ADP-2-9 combines the two isolated input signals. This combiner has a typical isolation of 27dB. For better VSWR and isolation, use the H-9 signal combiner from MA/COM, which features >40dB isolation and a wider frequency range. Passive devices (e.g., combiners) with magnetic elements can contribute nonlinearity to the signal chain and should be used cautiously. e. The attenuator pads, on all three ports of the signal combiner, will support further isolation of the two input signal sources. They will reduce reflection and promote maximum power transfer with wideband impedance matching. f. The minimum loss matching pads, (Mini-Circuits BMP5075R or equivalents) are added to the test setup at the DUT input and output. These matching pads transform the DUT impedance from 75Ω to 50Ω to match the characteristic impedance of modern RF instrumentation. Testing Signal Sources The testing signal should be evaluated and optimized before it is used for measurements. The following outlines the necessary steps to achieve optimization. a. Apply two independent signals f1 and f2 from signal generator 1 and signal generator 2 at 240MHz and 241MHz, while setting amplitude = –7dBm per tone at the combined output. b. Connect the combined signal to the spectrum analyzer without the DUT (i.e. The combined signal, the minimum loss matching pad, the F-type thru adaptor, the minimum loss matching pad and the spectrum analyzer; at this point, the spectrum analyzer should read about –18dBm/tone for each main tone power). c. Adjust the spectrum analyzer for the maximum possible resolution of the intermodulation products amplitude in dBc relative to the main tone power. A narrower resolution bandwidth will take a longer time to sweep. Optimize the dynamic range of the spectrum analyzer by adjusting input attenuation. First increase the spectrum analyzer input attenuation (normally in steps of 5dB or 10dB). If the IMD product levels decrease when the input attenuation is increased, then the input power level was too high for the spectrum analyzer to make a dc2032af 6 DEMO MANUAL DC2032A OPERATION Testing the DUT valid measurement. In other words, the spectrum analyzer 1st mixer was overloaded and producing its own IMD products. If the IMD reading holds constant with increased input attenuation, then a sufficient amount of attenuation was present. Adding too much attenuation will raise the noise floor and bury the intended IMD signal. Therefore, select just enough attenuation to achieve a stable and valid measurement. At this point, the input level has been established at –7dBm per tone (–13dBm at the DUT), and the input IMD from the test setup is well suppressed at –96dBc max. Furthermore, the SA is setup to measure very low level IMD components. d. In order to achieve a valid measurement result, the test system must have lower distortion than the DUT intermodulation. For example, to measure a 46dBm OIP3, the measured intermodulation products will be –90dBc below the –19dBm per tone input level and the test system must have intermodulation products approx. –96dBc or better. For best results, the IMD or noise floor should be at least –100dBc before connecting the DUT. b. Fine tune the signal generator levels by a small amount if necessary (