LS840-2

LS840 LS841 LS842 Linear Integrated Systems FEATURES LOW NOISE LOW LEAKAGE LOW DRIFT LOW OFFSET VOLTAGE LOW NOISE LOW DRIFT LOW CAPACITANCE MONOLITHIC DUAL N-CHANNEL JFET en= 8nV/√Hz TYP. IG = 10pA TYP. |∆VGS1-2 /∆T|= 5µV/°C max. IVGS1-2I= 2mV TYP. ABSOLUTE MAXIMUM RATINGS NOTE 1 @ 25°C (unless otherwise noted) Maximum Temperatures Storage Temperature Operating Junction Temperature -65° to +150°C +150°C D1 S1 G1 G2 S2 D2 31 X 32 MILS G1 3 5 S2 D1 2 6 D2 Maximum Voltage and Current for Each Transistor NOTE 1 Gate Voltage to Drain or Source 60V -VGSS -VDSO -IG(f) Drain to Source Voltage Gate Forward Current 60V 50mA 1 S1 7 G2 Maximum Power Dissipation Device Dissipation @ Free Air - Total BOTTOM VIEW 400mW @ +125°C ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted) SYMBOL CHARACTERISTICS LS840 LS841 LS842 UNITS 5 10 40 µV/°C |∆VGS1-2 /∆T| max. Drift vs. Temperature |VGS1-2| max. SYMBOL BVGSS BVGGO Yfss Yfs |Yfs1-2/Yfs| IDSS |IDSS1-2/IDSS| VGS(off) or VP VGS -IG -IG -IG -IGSS Offset Voltage CHARACTERISTICS Breakdown Voltage Gate-to-Gate Breakdown TRANSCONDUCTANCE Full Conduction Typical Conduction Mismatch DRAIN CURRENT Full Conduction Mismatch at Full Conduction GATE VOLTAGE Pinchoff Voltage Operating Range GATE CURRENT Operating High Temperature Reduced VDG At Full Conduction ----10 -5 -50 50 -100 pA nA pA pA 1 0.5 2 -4.5 4 V V 0.5 -2 1 5 5 mA % 1000 500 -0.6 4000 1000 3 µmho µmho % 5 MIN. 60 60 10 TYP. --25 MAX. --mV UNITS V V CONDITIONS VDG= 20V VDG= 20V TA= -55°C to +125°C ID= 200µA ID= 200µA CONDITIONS VDS= 0 ID= 1nA IG= 1nA VDG= 20V VDG= 20V ID= 0 VGS= 0 I S= 0 f= 1kHz ID= 200µA VDG= 20V VGS= 0 VDS= 20V VDS= 20V VDG= 20V VDG= 20V VDG= 10V VDG= 20V ID= 1nA ID= 200µA ID= 200µA ID= 200µA ID= 200µA VDS= 0 TA= +125°C Linear Integrated Systems 4042 Clipper Court, Fremont, CA 94538 • TEL: (510) 490-9160 • FAX: (510) 353-0261 SYMBOL YOSS YOS |YOS1-2| CMR CMR CHARACTERISTICS OUTPUT CONDUCTANCE Full Conduction Operating Differential COMMON MODE REJECTION -20 log |∆VGS1-2/∆VDS| NOISE MIN. ------ TYP. -0.1 0.01 100 75 ---- MAX. UNITS 10 1 0.1 --0.5 10 15 µmho µmho µmho dB dB dB nV/√Hz nV/√Hz CONDITIONS VDG= 20V VDG= 20V VGS= 0 ID= 200µA ∆VDS= 10 to 20V ∆VDS= 5 to 10V ID= 200µA VGS= 0 RG= 10MΩ NBW= 6Hz ID= 200µA f= 1KHz ID= 200µA f= 10Hz ID= 200µA ID= 200µA ID= 200µA NF en en Figure Voltage Voltage CAPACITANCE Input Reverse Transfer Drain-to-Drain ---- VDS= 20V f= 100Hz VDS= 20V NBW= 1Hz VDS= 20V NBW= 1Hz VDS= 20V VDG= 20V CISS CRSS CDD ---- 4 1.2 0.1 10 5 -- pF pF pF TO-71 Six Lead 0.195 DIA. 0.175 0.030 MAX. 0.230 DIA. 0.209 0.150 0.115 TO-78 0.305 0.335 0.335 0.370 MAX. 0.040 0.165 0.185 MIN. 0.500 SEATING PLANE 0.200 0.100 P-DIP 0.320 (8.13) 0.290 (7.37) 0.405 (10.29) MAX. S1 D1 SS G1 1 2 3 4 8 7 6 5 G2 SS D2 S2 0.016 0.019 DIM. A 0.016 0.021 DIM. B 0.029 0.045 2 34 1 5 8 76 6 LEADS 0.019 DIA. 0.016 0.100 0.500 MIN. 0.050 234 1 8 5 6 7 SOIC 0.150 (3.81) 0.158 (4.01) 0.100 45° 0.046 0.036 45° 0.048 0.028 0.028 0.034 0.188 (4.78) 0.197 (5.00) S1 D1 SS G1 1 2 3 4 8 7 6 5 G2 SS D2 S2 0.228 (5.79) 0.244 (6.20) NOTES: 1. These ratings are limiting values above which the serviceability of any semiconductor may be impaired. Linear Integrated Systems 4042 Clipper Court, Fremont, CA 94538 • TEL: (510) 490-9160 • FAX: (510) 353-0261