LT1251/LT1256
40MHz Video Fader and
DC Gain Controlled Amplifier
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DESCRIPTION
FEATURES
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■
■
■
■
■
■
Accurate Linear Gain Control: ± 1% Typ, ± 3% Max
Constant Gain with Temperature
Wide Bandwidth: 40MHz
High Slew Rate: 300V/µs
Fast Control Path: 10MHz
Low Control Feedthrough: 2.5mV
High Output Current: 40mA
Low Output Noise
45nV/√Hz at AV = 1
270nV/√Hz at AV = 100
Low Distortion: 0.01%
Wide Supply Range: ±2.5V to ±15V
Low Supply Current: 13mA
Low Differential Gain and Phase: 0.02%, 0.02°
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APPLICATIONS
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Composite Video Gain Control
RGB, YUV Video Gain Control
Video Faders, Keyers
Gamma Correction Amplifiers
Audio Gain Control, Faders
Multipliers, Modulators
Electronically Tunable Filters
The LT ®1251/LT1256 are 2-input, 1-output, 40MHz current feedback amplifiers with a linear control circuit that
sets the amount each input contributes to the output.
These parts make excellent electronically controlled variable gain amplifiers, filters, mixers and faders. The only
external components required are the power supply bypass capacitors and the feedback resistors. Both parts
operate on supplies from ±2.5V (or single 5V) to ±15V
(or single 30V).
Absolute gain accuracy is trimmed at wafer sort to minimize part-to-part variations. The circuit is completely
temperature compensated.
The LT1251 includes circuitry that eliminates the need for
accurate control signals around zero and full scale. For
control signals of less than 2% or greater than 98%, the
LT1251 sets one input completely off and the other
completely on. This is ideal for fader applications because
it eliminates off-channel feedthrough due to offset or gain
errors in the control signals.
The LT1256 does not have this on/off feature and operates
linearly over the complete control range. The LT1256 is
recommended for applications requiring more than 20dB
of linear control range.
, LTC and LT are registered trademarks of Linear Technology Corporation.
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TYPICAL APPLICATION
LT1256
Gain Accuracy vs Control Voltage
Two-Input Video Fader
5
LT1251/LT1256
1
14
+
2
–
+
1
2
–
3
13
CONTROL
0V TO 2.5V
CONTROL
IC
3
4
5
NULL
V–
+
–
C
5k
IC IFS
+
FS
5k
–
12 2.5VDC
INPUT
11
IFS
10
6
9
7
8
VS = ±5V
VFS = 2.5V
4
IN2
RF2
1.5k
RF1
1.5k
GAIN ACCURACY (%)
IN1
2
1
0
–1
–2
–3
V+
(
–4 GAIN ACCURACY (%) = AVMEAS –
–5
0
VOUT
1251/56 TA01
0.5
)(
VC
100
2.5
1.5
2.0
1.0
CONTROL VOLTAGE (V)
)
2.5
1251/56 TA02
1
LT1251/LT1256
W
U
U
W W
W
Total Supply Voltage (V + to V –) .............................. 36V
Input Current ...................................................... ±15mA
Input Voltage on Pins 3,4,5,10,11,12 ............... V – to V +
Output Short-Circuit Duration (Note 1) ........ Continuous
Specified Temperature Range (Note 2) ....... 0°C to 70°C
Operating Temperature Range ............... – 40°C to 85°C
Storage Temperature Range ................. – 65°C to 150°C
Junction Temperature (Note 3)............................ 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
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ABSOLUTE MAXIMUM RATINGS
PACKAGE/ORDER INFORMATION
ORDER PART
NUMBER
TOP VIEW
IN1
+
14
IN2
–
13
FB2
+
12
VFS
11
IFS
10
RFS
6
9
V+
7
8
VOUT
1
+
FB1
2
–
VC
3
+
IC
4
RC
5
NULL
V–
1
2
CONTROL
–
C
N PACKAGE
14-LEAD PDIP
FS
–
LT1251CN
LT1251CS
LT1256CN
LT1256CS
(Note 2)
S PACKAGE
14-LEAD PLASTIC SO
TJMAX = 150°C, θJA = 70°C/ W (N)
TJMAX = 150°C, θJA = 100°C/ W (S)
Consult factory for Industrial and Military grade parts.
W
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SIG AL A PLIFIER AC CHARACTERISTICS
0°C ≤ TA ≤ 70°C, VS = ±5V, VIN = 1VRMS, f = 1kHz, AVMAX = 1, RF1 = RF2 = 1.5k, VFS = 2.5V, IC = IFS = NULL = Open, Pins 5,10 = GND,
unless otherwise noted.
SYMBOL
2%IN1
PARAMETER
2% Input 1 Gain
CONDITIONS
VC (Pin 3) = 0.05V
10%IN1
20%IN1
30%IN1
40%IN1
50%IN1
60%IN1
70%IN1
80%IN1
90%IN1
98%IN1
10% Input 1 Gain
20% Input 1 Gain
30% Input 1 Gain
40% Input 1 Gain
50% Input 1 Gain
60% Input 1 Gain
70% Input 1 Gain
80% Input 1 Gain
90% Input 1 Gain
98% Input 1 Gain
VC (Pin 3) = 0.25V
VC (Pin 3) = 0.50V
VC (Pin 3) = 0.75V
VC (Pin 3) = 1.00V
VC (Pin 3) = 1.25V
VC (Pin 3) = 1.50V
VC (Pin 3) = 1.75V
VC (Pin 3) = 2.00V
VC (Pin 3) = 2.25V
VC (Pin 3) = 2.45V
2%IN2
2% Input 2 Gain
VC (Pin 3) = 2.45V
10%IN2
20%IN2
30%IN2
40%IN2
50%IN2
60%IN2
70%IN2
80%IN2
90%IN2
98%IN2
10% Input 2 Gain
20% Input 2 Gain
30% Input 2 Gain
40% Input 2 Gain
50% Input 2 Gain
60% Input 2 Gain
70% Input 2 Gain
80% Input 2 Gain
90% Input 2 Gain
98% Input 2 Gain
VC (Pin 3) = 2.25V
VC (Pin 3) = 2.00V
VC (Pin 3) = 1.75V
VC (Pin 3) = 1.50V
VC (Pin 3) = 1.25V
VC (Pin 3) = 1.00V
VC (Pin 3) = 0.75V
VC (Pin 3) = 0.50V
VC (Pin 3) = 0.25V
VC (Pin 3) = 0.05V
Gain Drift with Temperature
(Worst Case at 30% Gain)
VC (Pin 3) = 0.75V
VC (Pin 3) = 0.75V
2
LT1251
LT1256
●
●
●
●
●
●
●
●
●
●
●
LT1251
LT1256
LT1251
LT1256
●
●
●
●
●
●
●
●
●
●
●
●
●
LT1251
LT1256
N Package
S Package
●
●
MIN
0
0.1
7
17
27
37
47
57
67
77
87
99.9
95.0
0
0.1
7
17
27
37
47
57
67
77
87
99.9
95.0
TYP
50
400
MAX
0.1
5.0
13
23
33
43
53
63
73
83
93
100.0
99.9
0.1
5.0
13
23
33
43
53
63
73
83
93
100.0
99.9
UNITS
%
%
%
%
%
%
%
%
%
%
%
%
%
%
%
%
%
%
%
%
%
%
%
%
%
%
ppm/°C
ppm/°C
LT1251/LT1256
W
U
SIG AL A PLIFIER AC CHARACTERISTICS
0°C ≤ TA ≤ 70°C, VS = ±5V, VIN = 1VRMS, f = 1kHz, AVMAX = 1, RF1 = RF2 = 1.5k, VFS = 2.5V, IC = IFS = NULL = Open, Pins 5,10 = GND,
unless otherwise noted.
SYMBOL
SR
BW
PARAMETER
Gain Supply Rejection
External Resistor Gain
50% Input 1
Slew Rate
Control Feedthrough
Full Power Bandwidth
Small-Signal Bandwidth
Differential Gain (Notes 4,5)
Differential Phase (Notes 4,5)
THD
Total Harmonic Distortion
t r, tf
OS
t PD
tS
Rise Time, Fall Time
Overshoot
Propagation Delay
Settling Time
CONDITIONS
VC = 1.25V, VS = ±5V to ±15V
Pins 5,10 = Open, External 5k Resistors
from Pins 4,11 to Ground, VC = 1.25V
VIN = ±2.5V, VO at ±2V, RL = 150Ω
VC = 1.25VDC + 2.5VP-P at 1kHz
VO = 1VRMS
VS = ±5V
VS = ±15V
Control = 0% or 100%
Control = 25% or 75%
Control = 0% or 100%
Control = 25% or 75%
Gain = 100%
Gain = 50%
Gain = 10%
10% to 90%, VO = 100mV
VO = 100mV
VO = 100mV
0.1%, ∆VO = 2V
MIN
●
●
45
●
150
TYP
0.03
MAX
0.10
55
300
2.5
20
30
40
0.02
0.90
0.02
0.55
0.002
0.015
0.4
11
3
10
65
UNITS
%/V
%
V/µs
mVP-P
MHz
MHz
MHz
%
%
DEG
DEG
%
%
%
ns
%
ns
ns
W
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SIG AL A PLIFIER DC CHARACTERISTICS
0°C ≤ TA ≤ 70°C, VS = ±5V, VCM = 0V, VFS = 2.5V, IC = IFS = NULL = Open, Pins 5,10 = GND, unless otherwise noted.
SYMBOL
VOS
PARAMETER
Input Offset Voltage
IIN+
IIN–
Input Offset Voltage Drift
Noninverting Input Bias Current
Inverting Input Bias Current
en
+in
–in
RIN
CIN
CMRR
Inverting Input Bias Current Null Change
Input Noise Voltage Density
Noninverting Input Noise Current Density
Inverting Input Noise Current Density
Input Resistance
Input Capacitance
Input Voltage Range
Common Mode Rejection Ratio
Inverting Input Current Common Mode Rejection
PSRR
Power Supply Rejection Ratio
Noninverting Input Current Power Supply Rejection
Inverting Input Current Power Supply Rejection
CONDITIONS
Either Input
Difference Between Inputs
Either Input
Either Input
Difference Between Inputs
Null (Pin 6) Open to V –
f = 1kHz
f = 1kHz
f = 1kHz
Either Noninverting Input
Either Noninverting Input
VS = ±5V
VS = 5V
VCM = – 3V to 3V
VS = 5V, VCM = 2V to 3V, VO = 2.5V
VCM = – 3V to 3V
VS = 5V, VCM = 2V to 3V, VO = 2.5V
VS = ±5V to ±15V
VS = ±5V to ±15V
VS = ±5V to ±15V
MIN
●
●
–3
●
– 2.5
– 30
–1
– 280
●
5
●
●
●
●
●
●
●
●
±3
2
55
50
●
●
●
●
●
70
TYP
2
1
10
0.5
10
0.5
– 170
2.7
1.5
29
17
1.5
±3.2
MAX
5
3
2.5
30
1
– 60
3
61
57
0.07
0.17
76
30
30
0.25
0.70
100
200
UNITS
mV
mV
µV/°C
µA
µA
µA
µA
nV/√Hz
pA/√Hz
pA/√Hz
MΩ
pF
V
V
dB
dB
µA/ V
µA/ V
dB
nA/V
nA/V
3
LT1251/LT1256
W
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SIG AL A PLIFIER DC CHARACTERISTICS
0°C ≤ TA ≤ 70°C, VS = ±5V, VCM = 0V, VFS = 2.5V, IC = IFS = NULL = Open, Pins 5,10 = GND, unless otherwise noted.
SYMBOL
AVOL
PARAMETER
Large-Signal Voltage Gain
ROL
Transresistance, ∆VOUT /∆IIN–
CONDITIONS
VO = – 3V to 3V, RL = 150Ω
VO = – 2.75V to 2.75V, RL = 150Ω
VO = – 3V to 3V, RL = 150Ω
VO = – 2.75V to 2.75V, RL = 150Ω
No Load
RL = 150Ω
Maximum Output Voltage Swing
IO
Maximum Output Current
IS
Supply Current
VS = ±15V, No Load
VS = 5V, VCM = 2.5V, (Note 6)
VS = ±5V
VS = 5V, VCM = VO = 2.5V
VC = VFS = 2.5V
VC = VFS = 1.25V
VC = VFS = 0V
VC = VFS = 2.5V, VS = ±15V
VC = VFS = 0V, VS = ±15V
●
●
●
●
●
●
●
●
●
●
●
●
TYP
93
MAX
1.8
±4.2
±3.5
±14.2
3.8
±40
±30
13.5
7.5
1.3
14.5
1.4
17.0
9.5
1.8
18.5
2.0
UNITS
dB
dB
MΩ
MΩ
V
V
V
V
V
mA
mA
mA
mA
mA
mA
mA
W
VOUT
●
MIN
83
83
0.75
0.75
±4.0
±3.0
±2.75
±14.0
1.2
±30
±20
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CO TROL A D FULL SCALE A PLIFIER CHARACTERISTICS
0°C ≤ TA ≤ 70°C, VS = ±5V, VFS = 2.5V, IC = IFS = NULL = Open, Pins 5,10 = GND, unless otherwise noted.
SYMBOL
RC
RFS
PARAMETER
Control Amplifier Input Offset Voltage
Full-Scale Amplifier Input Offset Voltage
Control Amplifier Input Resistance
Full-Scale Amplifier Input Resistance
Control Amplifier Input Bias Current
Full-Scale Amplifier Input Bias Current
Internal Control Resistor
Internal Full-Scale Resistor
Resistor Temperature Coefficient
Control Path Bandwidth
Control Path Rise and Fall Time
Control Path Transition Time
Control Path Propagation Delay
CONDITIONS
Pin 4 to Pin 3
Pin 11 to Pin 12
●
●
●
●
●
TA = 25°C
TA = 25°C
Small Signal, VC = 100mV, (Note 7)
Small Signal, VC = 100mV, (Note 7)
0% to 100%
Small Signal, ∆VC = 100mV
VC from 0% or 100%
The ● denotes specifications which apply over the specified operating
temperature range.
Note 1: A heat sink may be required depending on the power supply
voltage.
Note 2: Commercial grade parts are designed to operate over the
temperature range of – 40°C to 85°C but are neither tested nor guaranteed
beyond 0°C to 70°C. Industrial grade parts specified and tested over
– 40°C to 85°C are available on special request. Consult factory.
Note 3: TJ is calculated from the ambient temperature TA and the power
dissipation PD according to the following formulas:
LT1251CN/LT1256CN:
TJ = TA + (PD • 70°C/W)
LT1251CS/LT1256CS:
TJ = TA + (PD • 100°C/W)
4
MIN
●
25
25
– 750
– 750
3.75
4
TYP
5
5
100
100
– 300
– 300
5
5
0.2
10
35
150
50
90
MAX
15
15
6.25
6
UNITS
mV
mV
MΩ
MΩ
nA
nA
kΩ
kΩ
%/°C
MHz
ns
ns
ns
ns
Note 4: Differential gain and phase are measured using a Tektronix
TSG120YC/NTSC signal generator and a Tektronix 1780R Video
Measurement Set. The resolution of this equipment is 0.1% and 0.1°. Five
identical amplifier stages were cascaded giving an effective resolution of
0.02% and 0.02°.
Note 5: Differential gain and phase are best when the control is set at 0%
or 100%. See the Typical Performance Characteristics curves.
Note 6: Tested with RL = 150Ω to 2.5V to simulate an AC coupled load.
Note 7: Small-signal control path response is measured driving RC (Pin 5)
to eliminate peaking caused by stray capacitance on Pin 4.
LT1251/LT1256
U W
TYPICAL PERFORMANCE CHARACTERISTICS
LT1256
Gain vs Control Voltage
LT1251
Gain vs Control Voltage
100
0.8
0.8
IN2
0.6
IN2
GAIN (V/V)
VFS = 2.5V
0.4
0.6
VFS = 2.5V
0.4
IN1
IN1
0.2
0.2
0
0
0.5
0
1.5
2.0
1.0
CONTROL VOLTAGE (V)
0.5
0
2.5
1.5
2.0
1.0
CONTROL VOLTAGE (V)
10
4
0
PIN 4 NOT IN SOCKET
–4
8
0
–2
–4
–6
–8
–8
1M
10M
FREQUENCY (Hz)
100k
1M
10M
FREQUENCY (Hz)
1251/56 G04
VS = ±5V, VIN = 1VRMS
AV = 1, RF = 1.5k, VFS = 2.5V
3
VS = ±5V
RL = 1k
RF = 1.5k
VC = VFS = 2.5V
1M
10M
FREQUENCY (Hz)
1251/56 G07
3rd Order Intercept vs Frequency
VS = ±5V
AV = 1
RF = 1.5k
RL = 1k
VO = 2VP-P
VC = VFS = 2.5V
VS = ±15V
AV = 1
RF = 1.5k
RL = 100Ω
VC = VFS = 2.5V
CC
–30
DISTORTION (dBc)
VC = 10%
CC
0.1
VC = 50%
CC
0.01
100M
50
CC
–40
CC
45
–50
2ND
–60
3RD
40
35
30
25
20
15
VC = 100%
CC
–70
0.001
1k
10k
FREQUENCY (Hz)
4
2nd and 3rd Harmonic Distortion
vs Frequency
10
100
5
1
100k
100M
–20
10
AV = 1
1251/56 G05
THD Plus Noise vs Frequency
1
6
2
–10
10k
100M
AV = 10
7
2
–6
10k
Undistorted Output Voltage
vs Frequency
OUTPUT VOLTAGE (VP-P)
4
VOLTAGE GAIN (dB)
VOLTAGE GAIN (dB)
6
2
100
1k
FREQUENCY (Hz)
1251/56 G06
VOLTAGE DRIVE RC
VC = GND
VS = ±5V
8
6
100k
+in
10
10
VOLTAGE DRIVE VC
VS = ±5V
–10
10k
en
LT1251/LT1256
Control Path Bandwidth
LT1251/LT1256
Control Path Bandwidth
–2
10
1251/56 G02
1251/56 G01
8
–in
1
2.5
3RD ORDER INTERCEPT (dBm)
GAIN (V/V)
SPOT NOISE (nV/√Hz OR pA/√Hz)
1.0
1.0
THD + NOISE (%)
Spot Input Noise Voltage and
Current vs Frequency
100k
1251/56 G08
1
10
FREQUENCY (MHz)
100
1251/56 G09
10
0
5
10
15
20
FREQUENCY (MHz)
25
30
1251/56 G10
5
LT1251/LT1256
U W
TYPICAL PERFORMANCE CHARACTERISTICS
Bandwidth vs Feedback
Resistance, AV = 1, RL = 100Ω
PEAKING ≤ 0.5dB
PEAKING ≤ 5.0dB
–3dB BANDWIDTH (MHz)
60
50
VS = ±15V
40
VS = 5V
30
VS = ±5V
20
45
PHASE
4
50
VS = ±15V
40
VS = 5V
30
–45
2
–90
1
–135
GAIN
0
–225
–2
VS = ±5V
1.6
1.0
1.2
1.4
0.8
FEEDBACK RESISTANCE (kΩ)
10
1.8
0.6
1.6
1.0
1.2
1.4
0.8
FEEDBACK RESISTANCE (kΩ)
1251/56 G11
VS = ±15V
30
VS = 5V
20
Off-Channel Isolation
vs Frequency
VS = ±15V
40
VS = 5V
30
VS = ±5V
VFS = 2.5V
VC = 0V
RL = 100Ω
RF = 1.5k
–10
50
VS = ±5V
20
VS = ±5V
0
PEAKING ≤ 0.5dB
PEAKING ≤ 5.0dB
OFF-CHANNEL ISOLATION (dB)
40
–3dB BANDWIDTH (MHz)
–3dB BANDWIDTH (MHz)
60
PEAKING ≤ 0.5dB
PEAKING ≤ 5.0dB
100M
1251/56 G13
Bandwidth vs Feedback
Resistance, AV = 10, RL = 1k
50
1M
10M
FREQUENCY (Hz)
1251/56 G12
Bandwidth vs Feedback
Resistance, AV = 10, RL = 100Ω
60
–5
100k
1.8
–270
VS = ±5V
RF = 1.3k
RL = 100Ω
–3
20
0.6
–180
–1
–4
10
0
3
–20
–30
–40
AV = 10
–50
–60
–70
AV = 1
–80
–90
10
10
0.8
1.0
1.2
1.4
0.6
FEEDBACK RESISTANCE (kΩ)
1.6
0.4
0.8
1.0
1.2
1.4
0.6
FEEDBACK RESISTANCE (kΩ)
1251/56 G14
–3dB BANDWIDTH (MHz)
–3dB BANDWIDTH (MHz)
9
VS = ±5V
6
VS = 5V
4
VS = ±5V
RL = 100Ω
VFS = 2.5V
RF = 1.3k
7
35
VS = ±15V
VS = ±5V
6
5
VS = 5V
4
30
25
20
15
3
3
2
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
FEEDBACK RESISTANCE (kΩ)
2
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
FEEDBACK RESISTANCE (kΩ)
1251/56 G17
6
8
100M
40
NO PEAKING
9
7
1M
10M
FREQUENCY (Hz)
–3dB Bandwidth vs
Control Voltage
10
NO PEAKING
VS = ±15V
100k
1251/56 G16
Bandwidth vs Feedback
Resistance, AV = 100, RL = 1k
10
5
–100
10k
1251/56 G15
Bandwidth vs Feedback
Resistance, AV = 100, RL = 100Ω
8
1.6
–3dB BANDWIDTH (MHz)
0.4
1251/56 G18
10
0
0.5
1.0
1.5
2.0
CONTROL VOLTAGE (V)
2.5
1251/56 G19
PHASE SHIFT (DEG)
–3dB BANDWIDTH (MHz)
60
5
70
PEAKING ≤ 0.5dB
PEAKING ≤ 5.0dB
Voltage Gain and Phase
vs Frequency
VOLTAGE GAIN (dB)
70
Bandwidth vs Feedback
Resistance, AV = 1, RL = 1k
LT1251/LT1256
U W
TYPICAL PERFORMANCE CHARACTERISTICS
Supply Current vs
Full-Scale Voltage
Supply Current vs
Full-Scale Current
14
TA = 125°C
4
10
8
TA = – 55°C
6
4
2
0
0.5
1.0
2.0
1.5
FULL-SCALE VOLTAGE, VFS (V)
0
V – +1
300
400
100
200
FULL-SCALE CURRENT, IFS (µA)
V–
–50
500
TA = –55°C
TA = 125°C
100
0
–100
–200
–300
150
TA = –55°C
TA = 25°C
TA = 125°C
50
0
–50
–100
–150
250
100
150
200
300
50
NULL VOLTAGE, REFERENCED TO V – (mV)
1.7
0
1.1
TA = –55°C
0.9
TA = 125°C
0
30
20
10
LOAD CURRENT (mA)
–100
0
40
1251/56 G26
1
2
3
INPUT VOLTAGE (V)
4
5
1251/56 G25
Output Short-Circuit Current
vs Temperature
60
VS = ±5V
2.5
TA = 25°C
2.0
TA = 125°C
1.5
TA = –55°C
1.0
0.5
0
–30
–10
–20
LOAD CURRENT (mA)
–40
1251/56 G27
OUTPUT SHORT-CIRCUIT CURRENT (mA)
SATURATION VOLTAGE, VOUT – V – (V)
1.3
TA = 125°C
–150
0
20
40 60 80 100 120 140 160
NULL VOLTAGE, REFERENCED TO V – (mV)
3.0
0.7
–200
Negative Output Saturation
Voltage vs Load Current
1.5
TA = 25°C
–250
1251/56 G24
Positive Output Saturation
Voltage vs Load Current
TA = 25°C
–300
–50
1251/56 G23
VS = ±5V
VS ≥ ±7.5V
–350
TA = –55°C
100
–200
0
–400
VS = ±5V
VFS = 1.25V
INPUT BIAS CURRENT (nA)
200
INVERTING INPUT BIAS CURRENT (µA)
300
TA = 25°C
125
100
Control and Full-Scale Amp Input
Bias Current vs Input Voltage
200
VS = ±5V
VFS = 2.5V
0
25
50
75
TEMPERATURE (°C)
–25
1251/56 G22
Inverting Input Bias Current
vs Null Voltage
400
INVERTING INPUT BIAS CURRENT (µA)
V– + 2
1251/56 G21
Inverting Input Bias Current
vs Null Voltage
SATURATION VOLTAGE, V + – VOUT (V)
V+ – 2
0
2.5
1251/56 G20
0.5
V+ – 1
2
0
–400
COMMON MODE RANGE (V)
TA = 125°C
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)
TA = – 55°C,
TA = 25°C
6
VS = ±5V
VC = 0V
12
10
8
V+
14
VS = ±5V
INTERNAL RESISTORS
12
Input Common Mode Range
vs Temperature
50
40
30
–50 –25
50
25
75
0
TEMPERATURE (°C)
100
125
1251/56 G28
7
LT1251/LT1256
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TYPICAL PERFORMANCE CHARACTERISTICS
Slew Rate vs Full-Scale
Reference Voltage
Power Supply Rejection Ratio
vs Frequency
Slew Rate vs Temperature
80
350
AV = 1
VS = ±15V
200
SLEW RATE (V/µs)
250
VS = ±5V
150
100
50
POWER SUPPLY REJECTION RATIO (dB)
350
300
SLEW RATE (V/µs)
VS = ±5V
AV = 1
NO LOAD
300
250
200
0
VS = ±5V
AV = 1
RF = 1.5k
VC = VFS = 2.5V
POSITIVE
60
NEGATIVE
50
40
30
20
10
0
0
0.5
1.0
2.0
1.5
FULL-SCALE REFERENCE VOLTAGE (V)
2.5
–50 –25
0
25
50
75
100
125
1k
Output Impedance vs Frequency
10
VS = ±15V
RF = 1.5k
INVERTING
2
–2
–4
–6
–6
NONINVERTING
VS = ±15V
RF = 1.5k
0
–4
–8
INVERTING
4
OUTPUT IMPEDANCE (Ω)
OUTPUT STEP (V)
0
–2
NONINVERTING
–10
25
75
100
50
SETTLING TIME (ns)
125
0
150
10
1
AV = 100
AV = 1, 10
0.1
INVERTING
–8
–10
0
VS = ±5V
RF = 1.5k
VC = VFS = 2.5V
NONINVERTING
6
6
2
100
8
INVERTING,
NONINVERTING
10M
1251/56 G31
Settling Time to 1mV
vs Output Step
10
4
1M
100k
FREQUENCY (Hz)
1251/56 G30
Settling Time to 10mV
vs Output Step
8
10k
TEMPERATURE (°C)
1251/56 G29
OUTPUT STEP (V)
70
50
100
150
SETTLING TIME (ns)
200
0.01
10k
100k
1M
10M
FREQUENCY (Hz)
1251/56 G34
1251/56 G33
1251/56 G32
Differential Gain vs
Controlled Gain
100M
LT1251
Switching Transient (Glitch)
Differential Phase vs
Controlled Gain
1.0
2
DIFFERENTIAL PHASE (DEG)
DIFFERENTIAL GAIN (%)
50mV
1
0
60
80
90
70
CONTROLLED GAIN, VC /VFS (%)
100
VOUT
– 50mV
2.5
0.5
VC
0
0
50
1251/56 G35
8
0
50
60
80
90
70
CONTROLLED GAIN, VC /VFS (%)
100
1251/56 G36
VFS = 2.5V
RF1 = RF2 = 1.5k
VS = ±5V
1251/56 G37
LT1251/LT1256
W
W
SI PLIFIED SCHE ATIC
VCC
Q8
+
Q10
Q9
Q19
Q11
+
+
+
I2
I1
I4
I5
Q16
Q5
Q1
Q6
Q2
Q7
R1
250Ω
VC
Q3
Q20
Q17
Q13
Q12
R2
250Ω
R3
250Ω
VFS
IC
Q4
Q14
I3
R4
250Ω
IFS
Q15
RC
5k
+
Q18
RFS
5k
+
I6
RC
RFS
VEE
VCC
Q30
Q29
Q31
Q32
R5
200Ω
R6
200Ω
Q52
Q53
D1
D2
Q38
Q36 Q37
Q21
R7
200Ω
Q54
Q39
Q56
Q22
Q41
Q45
Q40
Q55
Q44
FB1
IN1
IN2
OUT
FB2
I7
Q42
Q46
Q43
Q57
Q47
Q58
Q25
Q26
Q48 Q49
Q50
Q51
D3
D4
Q59
Q23
Q24
Q27
Q28
Q33
Q34
Q35
R8
200Ω
Q60
R9
200Ω
Q61
R10
400Ω
R11
200Ω
VEE
NULL
1251/56 SS
9
LT1251/LT1256
U
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APPLICATIONS INFORMATION
Supply Voltage
The LT1251/LT1256 are high speed amplifiers. To prevent
problems, use a ground plane with point-to-point wiring
and small bypass capacitors (0.01µF to 0.1µF) at each
supply pin. For good settling characteristics, especially
driving heavy loads, a 4.7µF tantalum within an inch or two
of each supply pin is recommended.
The LT1251/LT1256 can be operated on single or split
supplies. The minimum total supply is 4V (Pins 7 to 9).
However, the input common mode range is only guaranteed to within 2V of each supply. On a 4V supply the parts
must be operated in the inverting mode with the noninverting input biased half way between Pin 7 and Pin 9. See the
Typical Applications section for the proper biasing for
single supply operation.
The op amps in the control section operate from V –
(Pin 7) to within 2V of V + (Pin 9). For this reason the
positive supply should be 4.5V or greater in order to use
2.5V control and full-scale voltages.
Inputs
The noninverting inputs (Pins 1 and 14) are easy to drive
since they look like a 17M resistor in parallel with a 1.5pF
capacitor at most frequencies. However, the input stage
can oscillate at very high frequencies (100MHz to 200MHz)
if the source impedance is inductive (like an unterminated
cable). Several inches of wire look inductive at these high
frequencies and can cause oscillations. Check for oscillations at the inverting inputs (Pins 2 and 13) with a 10×
probe and a 200MHz oscilloscope. A small capacitor
(10pF to 50pF) from the input to ground or a small resistor
(100Ω to 300Ω) in series with the input will stop these
parasitic oscillations, even when the source is inductive.
These components must be within an inch of the IC in
order to be effective.
All of the inputs to the LT1251/LT1256 have ESD protection circuits. During normal operation these circuits have
no effect. If the voltage between the noninverting and
inverting inputs exceeds 6V, the protection circuits will
trigger and attempt to short the inputs together. This
condition will continue until the voltage drops to less than
10
500mV or the current to less than 10mA. If a very fast edge
is used to measure settling time with an input step of more
than 6V, the protection circuits will cause the 1mV settling
time to become hundreds of microseconds.
Feedback Resistor Selection
The feedback resistor value determines the bandwidth of
the LT1251/LT1256 as in other current feedback amplifiers. The curves in the Typical Performance Characteristics
show the effect of the feedback resistor on small-signal
bandwidth for various loads, gains and supply voltages.
The bandwidth is limited at high gains by the 500MHz to
800MHz gain-bandwidth product as shown in the curves.
Capacitance on the inverting input will cause peaking and
increase the bandwidth. Take care to minimize the stray
capacitance on Pins 2 and 13 during printed circuit board
layout for flat response.
If the two input stages are not operating with equal gain,
the gain versus control voltage characteristic will be
nonlinear. This is true even if RF1 equals RF2. This is
because the open-loop characteristic of a current feedback amplifier is dependent on the Thevenin impedance at
the inverting input. For linear control of the gain, the loop
gain of the two stages must be equal. For an extreme
example, let’s take a gain of 101 on input 1, RF1 = 1.5k and
RG1 = 15Ω, and unity-gain on input 2, RF2 = 1.5k. The curve
in Figure 1 shows about 25% error at midscale. To
eliminate this nonlinearity we must change the value of
RF2. The correct value is the Thevenin impedance at
inverting input 1 (including the internal resistance of 27Ω)
times the gain set at input 1. For a linear gain versus
control voltage characteristic when input 2 is operating at
unity-gain, the formula is:
RF2 = (AV1)(RF1RG1 + 27)
RF2 = (101)(14.85 + 27) = 4227
Because the feedback resistor of the unity-gain input is
increased, the bandwidth will be lower and the output
noise will be higher. We can improve this situation by
reducing the values of RF1 and RG1, but at high gains the
internal 27Ω dominates.
LT1251/LT1256
U
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APPLICATIONS INFORMATION
millivolts of the negative supply can drive the NULL pin.
The AM modulator application shows an LT1077 driving
the NULL pin to eliminate the output DC offset voltage.
100
GAIN (V/V)
VFS = 2.5V
Crosstalk
RF2 = 4.3k
50
RF2 = 1.5k
0
0
0.5
1.5
2.0
1.0
CONTROL VOLTAGE (V)
2.5
1251/56 F01
Figure 1. Linear Gain Control from 0 to 101
Capacitive Loads
Increasing the value of the feedback resistor reduces the
bandwidth and open-loop gain of the LT1251/LT1256;
therefore, the pole introduced by a capacitive load can be
overcome. If there is little or no resistive load in parallel
with the load capacitance, the output stage will resonate,
peak and possibly oscillate. With a resistive load of 150Ω,
any capacitive load can be accommodated by increasing
the feedback resistor. If the capacitive load cannot be
paralleled with a DC load of 150Ω, a network of 200pF in
series with 100Ω should be placed from the output to
ground. Then the feedback resistor should be selected for
best response.
The Null Pin
Pin 6 can be used to adjust the gain of an internal current
mirror to change the output offset. The open circuit
voltage at Pin 6 is set by the full scale current IFS flowing
through 200Ω to the negative supply. Therefore, the NULL
pin sits 100mV above the negative supply with VFS equal
to 2.5V. Any op amp whose output swings within a few
The amount of signal from the off input that appears at the
output is a function of frequency and the circuit topology.
The nature of a current feedback input stage is to force the
voltage at the inverting input to be equal to the voltage at
the noninverting input. This is independent of feedback
and forced by a buffer amplifier between the inputs. When
the LT1251/LT1256 are operating noninverting, the off
input signal is present at the inverting input. Since one end
of the feedback resistor is connected to this input, the off
signal is only a feedback resistor away from the output.
The amount of unwanted signal at the output is determined by the size of the feedback resistor and the output
impedance of the LT1251/LT1256. The output impedance
rises with increasing frequency resulting in more crosstalk
at higher frequencies. Additionally, the current that flows
in the inverting input is diverted to the supplies within the
chip and some of this signal will also show up at the
output. With a 1.5k feedback resistor, the crosstalk is
down about 86dB at low frequencies and rises to – 78dB
at 1MHz and on to – 60dB at 6MHz. The curves show the
details.
Distortion
When only one input is contributing to the output (VC = 0%
or 100%) the LT1251/LT1256 have very low distortion. As
the control reduces the output, the distortion will increase.
The amount of increase is a function of the current that
flows in the inverting input. Larger input signals generate
more distortion. Using a larger feedback resistor will
reduce the distortion at the expense of higher output
noise.
11
LT1251/LT1256
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APPLICATIONS INFORMATION
Signal Path Description
RF1
RG1
I1
R1
2
–
1
1
V1
I1
K
+
IO
Σ
V2
14
2
13
I2
RG2
I2
VO
C
ROL
+
8
+1
1–K
–
R2
RF2
1251/56 BD
Figure 2. Signal Path Block Diagram
V2
Figure 2 is the basic block diagram of the LT1251/LT1256
signal path with external resistors RG1, RF1, RG2 and RF2.
Both input stages are operating as noninverting amplifiers
with two input signals V1 and V2.
I2 =
Each input stage has a unity-gain buffer from the noninverting input to the inverting input. Therefore, the inverting
input is at the same voltage as the noninverting input. R1
and R2 represent the internal output resistances of these
buffers, approximately 27Ω.
IO = KI1 + 1 − K I2
K is a constant determined by the control circuit and can
be any value between 0 and 1. The control circuit is
described in a later section.
R2 +
V1
(RG1)(RF1)
R1 +
RG1 + RF1
−
VO
R
RF1 + R1 F1 + 1
RG1
RG2 + RF2
( )
ROL
VO = IO
1 + sROLC
(
)
VO
R
RF2 + R2 F2 + 1
RG2
Substituting and rearranging gives:
(1− K)V2
(RG1)(RF1) R2 + (RG2)(RF2)
R1 +
KV1
By inspection of the diagram:
I1 =
(RG2)(RF2)
−
VO =
RG1 + RF1
1 + sROLC
+
ROL
+
RG2 + RF2
( )
1− K
K
+
R
R
RF1 + R1 F1 + 1 RF2 + R2 F2 + 1
RG1
RG2
General Equation for the Noninverting Amplifier Case
12
LT1251/LT1256
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APPLICATIONS INFORMATION
In low gain applications, R1 and R2 are small compared to
the feedback resistors and therefore we can simplify the
equation to:
( )
+
(RG1)(RF1) (RG2)(RF2)
VO =
KV1
1 − K V2
RG1 + RF1
RG2 + RF2
( )
1− K
1 + sROLC K
+
+
ROL
RF1
RF2
Note that the denominator causes a gain error due to the
open-loop gain (typically 0.1% for frequencies below
20kHz) and for mismatches in RF1 and RF2. A 1% mismatch in the feedback resistors results in a 0.25% error at
K = 0.5.
If we set RF1 = RF2 and assume ROL >> RF1 (a 0.1% error
at low frequencies) the above equation simplifies to:
( )
VO = KV1A V1 + 1 − K V2A V2
R
R
where A V1 = 1 + F1 and A V2 = 1 + F2
RG1
RG2
This shows that the output fades linearly from input 2,
times its gain, to input 1, times its gain, as K goes from
0 to 1.
If only one input is used (for example, V1) and Pin 14 is
grounded, then the gain is proportional to K.
VO
= KA V1
V1
Similarly for the inverting case where the noninverting
inputs are grounded and the input voltages V1 and V2 drive
the normally grounded ends of RG1 and RG2, we get:
( )
VO = −
1 − K V2
KV1
+
R
R
RG1 + R1 G1 + 1 RG2 + R2 G2 + 1
RF1
RF2
1 + sROLC
+
ROL
( )
1− K
K
+
R
R
RF1 + R1 F1 + 1 RF2 + R2 F2 + 1
RG1
RG2
General Equation for the Inverting Amplifier Case
Note that the denominator is the same as the noninverting
case. In low gain applications, R1 and R2 are small
compared to the feedback resistors and therefore we can
simplify the equation to:
( )
KV1 1 − K V2
+
RG1
RG2
VO = −
1− K
1 + sROLC K
+
+
ROL
RF1
RF2
( )
Again, if we set RF1 = RF2 and assume ROL >> RF1 (a 0.1%
error at low frequencies) the above equation simplifies to:
[
( )
VO = − KV1A V1 + 1 − K V2A V2
]
R
R
where A V1 = F1 and A V2 = F2
RG1
RG2
The 4-resistor difference amplifier yields the same result
as the inverting amplifier case, and the common mode
rejection is independent of K.
13
LT1251/LT1256
U
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APPLICATIONS INFORMATION
gain) is ±3% as detailed in the electrical tables. By using
a 2.5V full-scale voltage and the internal resistors, no
additional errors need be accounted for.
Control Circuit Description
V+
VC
3
IC
+
C
IFS
+
RC
–
11
4
5
VFS
FS
–
IC
12
RC
5k
CONTROL V TO I
RFS
5k
10
IFS
RFS
FULL SCALE V TO I
1251/56 F03
Figure 3. Control Circuit Block Diagram
The control section of the LT1251/LT1256 consists of two
identical voltage-to-current converters (V-to-I); each
V-to-I contains an op amp, an NPN transistor and a
resistor. The converter on the right generates a full-scale
current IFS and the one on the left generates a control
current IC. The ratio IC/IFS is called K. K goes from a
minimum of zero (when IC is zero) to a maximum of one
(when IC is equal to, or greater than, IFS). K determines the
gain from each signal input to the output.
The op amp in each V-to-I drives the transistor until the
voltage at the inverting input is the same as the voltage at
the noninverting input. If the open end of the resistor (Pin
5 or 10) is grounded, the voltage across the resistor is the
same as the voltage at the noninverting input. The emitter
current is therefore equal to the input voltage VC divided by
the resistor value RC. The collector current is essentially
the same as the emitter current and it is the ratio of the two
collector currents that sets the gain.
The LT1251/LT1256 are tested with Pins 5 and 10 grounded
and a full-scale voltage of 2.5V applied to VFS (Pin 12). This
sets IFS at approximately 500µA; the control voltage VC is
applied to Pin 3. When the control voltage is negative or
zero, IC is zero and K is zero. When VC is 2.5V or greater,
IC is equal to or greater than IFS and K is one. The gain of
channel one goes from 0% to 100% as VC goes from zero
to 2.5V. The gain of channel two goes the opposite way,
from 100% down to 0%. The worst-case error in K (the
14
In the LT1256, K changes linearly with IC. To insure that K
is zero, VC must be negative 15mV or more to overcome
the worst-case control op amp offset. Similarly to insure
that K is 100%, VC must be 3% larger than VFS based on
the guaranteed gain accuracy.
To eliminate the overdrive requirement, the LT1251 has
internal circuitry that senses when the control current is at
about 5% and sets K to 0%. Similarly, at about 95% it sets
K to 100%. The LT1251 guarantees that a 2% (50mV)
input gives zero and 98% (2.45V) gives 100%.
The operating currents of the LT1251/LT1256 are derived
from IFS and therefore the quiescent current is a function
of VFS and RFS. The electrical tables show the supply
current for three values of VFS including zero. An approximate formula for the supply current is:
IS = 1mA + (24)(IFS) + (VS /20k)
where VS is the total supply voltage between Pins 9 and 7.
By reducing IFS the supply current can be reduced, however, the slew rate and bandwidth will also be reduced as
indicated in the characteristic curves. Using the internal
resistors (5k) with VFS equal to 2.5V results in IFS equal to
500µA; there is no reason to use a larger value of IFS.
The inverting inputs of the V-to-I converters are available
so that external resistors can be used instead of the
internal ones. For example, if a 10V full-scale voltage is
desired, an external pair of 20k resistors should be used to
set IFS to 500µA. The positive supply voltage must be 2.5V
greater than the maximum VC and/or VFS to keep the
transistors from saturating. Do not use the internal resistors with external resistors because the internal resistors
have a large positive temperature coefficient (0.2%/°C)
that will cause gain errors.
If the control voltage is applied to the free end of resistor
RC (Pin 5) and the VC input (Pin 3) is grounded, the polarity
of the control voltage must be inverted. Therefore, K will
be 0% for zero input and 100% for – 2.5V input, assuming
VFS equals 2.5V. With Pin 3 grounded, Pin 4 is a virtual
ground; this is convenient for summing several negative
going control signals.
LT1251/LT1256
U
TYPICAL APPLICATIONS
AM Modulator with DC Output Nulling Circuit
0.1µF
LT1256
1
1MHz
CARRIER
14
+
50Ω
2
–
+
1
2
–
13
CONTROL
220k
2.5VDC
INPUT
3
0.1µF
4
AUDIO
MODULATION
+
–
FS
5k
5
220k
+
IC IFS
C
–
5k
12
11
NULL 6
9
7
8
V–
RF1
1.5k
RF2
1.5k
10
V+
VOUT
220k
V+
0.1µF
–
LT1077
+
1251/56 TA03
V–
Single Supply Noninverting AC Amplifier
with Digital Gain Control
Single Supply Inverting AC Amplifier
C1
10µF
+
V1
V
+
RG1
1.5k
RF1
1.5k
+
2
R1
20k
1
R2
20k
10µF
+
CO
10µF 14
13
V2
+
RG2
1.5k
RF1
1.5k
LT1251/LT1256
–
+
2
1
8
+
–
2
V+
9
V–
7
VOUT
CONTROL
VOLTAGE
RF2
1.5k
V1
5V
VC RC RFS VFS
3
5
10 12
C2
10µF
RG1
1.5k
10µF
1
+
10µF
V2
+
20k
14
10k
5V
20k
2.5VDC
INPUT
10k
+
10µF
13
LT1251/LT1256
–
+
1
8
9
V+
+
–
2
VOUT
5V
7
V–
VC RC RFS VFS
3
5
10 12
10µF
+
1251/56 TA05
RG2
1.5k
RF2
1.5k
VREF
VOUT
DIN
LTC1257
CLK
µP
LOAD
GND
VCC
1251/56 TA06
5V
15
LT1251/LT1256
U
TYPICAL APPLICATIONS
Controlled Gain, Voltage-to-Current Converter
(Current Source)
RF
1k
RF
1k
RG
100Ω
×4
1
2
V IN
14
13
LT1256
+
1
–
8
RO
1k
IOUT
+
–
+
2
LT1363
VC RC RFS VFS
3
5
10 12
CONTROL
VOLTAGE
RF
1k
–
2.5VDC
INPUT
RF
1k
( )
V
RF VC
IOUT = IN
RO RG VFS
1251/56 TA09
OUTPUT RESISTANCE DEPENDS
ON MATCHING OF RESISTORS
Variable Lowpass, Highpass and Allpass Filter
R2
R1
–
V IN
INVERTED
HIGHPASS
LT1252
R3
+
BASIC VARIABLE INTEGRATOR
R
R
C
ALLPASS
1.5k
R4
2
1
R1 = R3
R2 R4
14
13
1.5k
R
LT1256
–
R
1
+
8
LOWPASS
+
2
–
VC RC RFS VFS
3
5
10 12
VFS
VC
C
RDC ≅ 10k
1251/56 TA13
16
LT1251/LT1256
U
TYPICAL APPLICATIONS
Logarithmic Gain Control (Noninverting)
6k
15
–
1
V IN
600Ω
200Ω
VFS = 2.5V
LT1251/LT1256
2
1
+
14
8
V
+
13
2
–
VOUT
GAIN (dB)
2k
+ 9
7
V–
0
VC RC RFS VFS
3
5
10 12
CONTROL
VOLTAGE
1.5k
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