0
登录后你可以
  • 下载海量资料
  • 学习在线课程
  • 观看技术视频
  • 写文章/发帖/加入社区
会员中心
创作中心
发布
  • 发文章

  • 发资料

  • 发帖

  • 提问

  • 发视频

创作活动
LT1371CT7#PBF

LT1371CT7#PBF

  • 厂商:

    LINEAR(凌力尔特)

  • 封装:

    TO220-7

  • 描述:

    IC REG MULT CONFIG INV ADJ TO220

  • 数据手册
  • 价格&库存
LT1371CT7#PBF 数据手册
LT1371 500kHz High Efficiency 3A Switching Regulator U DESCRIPTION FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ The LT ®1371 is a monolithic high frequency current mode switching regulator. It can be operated in all standard switching configurations including boost, buck, flyback, forward, inverting and “Cuk.” A 3A high efficiency switch is included on the die, along with all oscillator, control and protection circuitry. Faster Switching with Increased Efficiency Uses Small Inductors: 4.7µH All Surface Mount Components Low Minimum Supply Voltage: 2.7V Quiescent Current: 4mA Typ Current Limited Power Switch: 3A Regulates Positive or Negative Outputs Shutdown Supply Current: 12µA Typ Easy External Synchronization The LT1371 typically consumes only 4mA quiescent current and has higher efficiency than previous parts. High frequency switching allows for very small inductors to be used. U APPLICATIONS ■ ■ ■ ■ New design techniques increase flexibility and maintain ease of use. Switching is easily synchronized to an external logic level source. A logic low on the Shutdown pin reduces supply current to 12µA. Unique error amplifier circuitry can regulate positive or negative output voltage while maintaining simple frequency compensation techniques. Nonlinear error amplifier transconductance reduces output overshoot on start-up or overload recovery. Oscillator frequency shifting protects external components during overload conditions. Boost Regulators Laptop Computer Supplies Multiple Output Flyback Supplies Inverting Supplies , LTC and LT are registered trademarks of Linear Technology Corporation. U TYPICAL APPLICATION 5V to 12V Boost Converter L1* 4.7µH D1 MBRS330T3 VIN OFF ON LT1371 + C1** 22µF 25V + FB GND C2 0.047µF R3 2k VC R2 6.19k 1% C4** 22µF 25V ×2 *COILCRAFT DO3316P-472 (4.7µH), DO3316P-103 (10µH) OR SUMIDA CD104-100MC (10µH) **AVX TPSD226M025R0200 † MAX IOUT L1 IOUT 4.7µH 0.7A 10µH 0.8A C3 0.0047µF LT1371 • TA01 VIN = 5V 90 R1 53.6k 1% VSW S/S 100 VOUT† 12V EFFICIENCY (%) 5V 12V Output Efficiency 80 70 60 50 0.01 0.1 OUTPUT CURRENT (A) 1 LT1371 • TA02 1 LT1371 W W W AXI U U ABSOLUTE RATI GS Supply Voltage ....................................................... 30V Switch Voltage LT1371 ............................................................... 35V LT1371HV .......................................................... 42V S/S, SHDN, SYNC Pin Voltage ................................ 30V Feedback Pin Voltage (Transient, 10ms) .............. ±10V Feedback Pin Current ........................................... 10mA Negative Feedback Pin Voltage (Transient, 10ms) ............................................. ±10V Operating Ambient Temperature Range ...... 0°C to 70°C Operating Junction Temperature Range Commercial .......................................... 0°C to 125°C Industrial ......................................... – 40°C to 125°C Short Circuit ......................................... 0°C to 150°C Storage Temperature Range ................ – 65°C to 150°C Lead Temperature (Soldering, 10 sec)................. 300°C U W U PACKAGE/ORDER I FOR ATIO ORDER PART NUMBER FRONT VIEW 7 6 5 4 3 2 1 TAB IS GND VIN S/S VSW GND NFB FB VC TOP VIEW LT1371CR LT1371HVCR LT1371IR LT1371HVIR R PACKAGE 7-LEAD PLASTIC DD TJMAX = 125°C, θJA = 30°C/W WITH PACKAGE SOLDERED TO 0.5 INCH2 COPPER AREA OVER BACKSIDE GROUND PLANE OR INTERNAL POWER PLANE. θJA CAN VARY FROM 20°C/W TO > 40°C/W DEPENDING ON MOUNTING TECHNIQUE FRONT VIEW 7 6 5 4 3 2 1 TAB IS GND T7 PACKAGE 7-LEAD TO-220 ORDER PART NUMBER VIN S/S VSW GND NFB FB VC ORDER PART NUMBER LT1371CT7 LT1371HVCT7 LT1371IT7 LT1371HVIT7 VC 1 20 VSW FB 2 19 NC NFB 3 18 VSW GND 4 17 GND GND 5 16 GND GND 6 15 GND GND 7 14 GND SHDN 8 13 NC SYNC 9 12 NC VIN 10 LT1371CSW LT1371HVCSW LT1371ISW LT1371HVISW 11 GND SW PACKAGE 20-LEAD PLASTIC SO WIDE TJMAX = 125°C, θJA = 50°C/W θJA WILL VARY FROM APPROXIMATELY 40°C/W WITH 0.75 INCH2 OF 1 OZ COPPER TO 50°C/W WITH 0.33 INCH2 OF 1 OZ COPPER ON A DOUBLE-SIDED BOARD TJMAX = 125°C, θJA = 50°C/W, θJC = 4°C/W Consult factory for Military grade parts. ELECTRICAL CHARACTERISTICS VIN = 5V, VC = 0.6V, VFB = VREF, VSW, S/S, SHDN, SYNC and NFB pins open, unless otherwise noted. SYMBOL PARAMETER CONDITIONS VREF Reference Voltage Measured at Feedback Pin VC = 0.8V IFB Feedback Input Current ● VFB = VREF MIN TYP MAX UNITS 1.230 1.225 1.245 1.245 1.260 1.265 V V 250 550 900 nA nA 0.01 0.03 %/V ● Reference Voltage Line Regulation 2 2.7V ≤ VIN ≤ 25V, VC = 0.8V ● LT1371 ELECTRICAL CHARACTERISTICS VIN = 5V, VC = 0.6V, VFB = VREF, VSW, S/S, SHDN, SYNC and NFB pins open, unless otherwise noted. SYMBOL PARAMETER CONDITIONS VNFB Negative Feedback Reference Voltage Measured at Negative Feedback Pin Feedback Pin Open, VC = 0.8V – 2.540 ● – 2.570 INFB Negative Feedback Input Current VNFB = VNFR ● Negative Feedback Reference Voltage Line Regulation 2.7V ≤ VIN ≤ 25V, VC = 0.8V ● Error Amplifier Transconductance ∆IC = ±25µA gm AV f MIN – 45 UNITS V V – 30 – 15 µA 0.01 0.05 %/V 1100 700 1500 ● 1900 2300 µmho µmho 120 200 350 µA 1400 2400 µA 1.95 0.40 2.30 0.52 V V VFB = VREF – 150mV, VC = 1.5V ● Error Amplifier Sink Current VFB = VREF + 150mV, VC = 1.5V ● Error Amplifier Clamp Voltage High Clamp, VFB = 1V Low Clamp, VFB = 1.5V 1.70 0.25 VC Pin Threshold Duty Cycle = 0% 0.8 1 1.25 V Switching Frequency 2.7V ≤ VIN ≤ 25V 0°C ≤ TJ ≤ 125°C – 40°C ≤ TJ ≤ 0°C (I Grade) ● 450 430 400 500 500 550 580 580 kHz kHz kHz ● 85 95 Error Amplifier Voltage Gain 500 Switch Current Limit Blanking Time Output Switch Breakdown Voltage 130 V/ V % 260 ns LT1371 LT1371HV 0° C ≤ TJ ≤ 125°C – 40°C ≤ TJ ≤ 0°C (I Grade) ● 35 47 V ● 42 40 47 V V 0.25 0.45 Ω 3.8 3.4 5.4 5.0 A A Supply Current Increase During Switch ON Time 15 25 mA/A Control Voltage to Switch Current Transconductance 4 VSAT Output Switch ON Resistance ISW = 2A ● ILIM Switch Current Limit Duty Cycle = 50% Duty Cycle = 80% (Note 1) ● ● ∆IIN ∆ISW Minimum Input Voltage IQ MAX – 2.440 – 2.410 Error Amplifier Source Current Maximum Switch Duty Cycle BV TYP – 2.490 – 2.490 3.0 2.6 A/V ● 2.4 2.7 V Supply Current 2.7V ≤ VIN ≤ 25V ● 4 5.5 mA Shutdown Supply Current 2.7V ≤ VIN ≤ 25V, VS/S ≤ 0.6V 0° C ≤ TJ ≤ 125°C – 40°C ≤ TJ ≤ 0°C (I Grade) ● 12 30 50 µA µA 2.7V ≤ VIN ≤ 25V ● 0.6 1.3 2 V ● 5 12 25 µs ● – 10 15 µA ● 600 800 kHz Shutdown Threshold Shutdown Delay S/S or SHDN Pin Input Current Synchronization Frequency Range The ● denotes specifications which apply over the full operating temperature range. 0V ≤ VS/S or VSHDN ≤ 5V Note 1: For duty cycles (DC) between 50% and 90%, minimum guaranteed switch current is given by ILIM = 1.33 (2.75 – DC). 3 LT1371 U W TYPICAL PERFORMANCE CHARACTERISTICS Switch Saturation Voltage vs Switch Current Switch Current Limit vs Duty Cycle 25°C 0.8 0.7 0.6 0.5 –55°C 0.4 0.3 0.2 6 3.0 5 2.8 25°C AND 125°C 4 –55°C 3 2 1 2.4 2.2 2.0 0 2.0 18 1.8 14 1.4 12 1.2 10 1.0 SHUTDOWN DELAY 0.8 6 0.6 4 0.4 2 0.2 0 –50 –25 0 SHUTDOWN THRESHOLD (V) 1.6 MINIMUM SYNCHRONIZATION VOLTAGE (VP-P) 20 8 0 25 50 75 100 125 150 TEMPERATURE (°C) 3.0 400 2.5 2.0 1.5 1.0 0.5 0 –50 –25 2 1 0 –1 –2 –3 –4 –1 0 1 2 3 4 5 6 VOLTAGE (V) 7 8 9 LT1371 • G07 4 125°C 100 0 –100 –200 –300 0 25 50 75 100 125 150 TEMPERATURE (°C) –0.3 VREF –0.2 –0.1 FEEDBACK PIN VOLTAGE (V) Error Amplifier Transconductance vs Temperature 110 2000 100 1800 90 80 70 60 50 40 30 gm = ∆I (VC) ∆V (FB) 1600 1400 1200 1000 800 600 400 200 20 10 0.1 LT1371 • G06 TRANSCONDUCTANCE (µmho) SWITCHING FREQUENCY (% OF TYPICAL) VIN = 5V 25°C –55°C 200 Switching Frequency vs Feedback Pin Voltage 3 –5 300 LT1371 • G05 S/S or SHDN Pin Input Current vs Voltage 4 Error Amplifier Output Current vs Feedback Pin Voltage fSYNC = 700kHz LT1371 • G04 5 25 50 75 100 125 150 TEMPERATURE (°C) LT1371 • G03 Minimum Synchronization Voltage vs Temperature SHUTDOWN THRESHOLD 0 LT1371 • G02 Shutdown Delay and Threshold vs Temperature 16 1.8 –50 –25 10 20 30 40 50 60 70 80 90 100 DUTY CYCLE (%) 0 0.4 0.8 1.2 1.6 2.0 2.4 2.8 3.2 3.6 4.0 SWITCH CURRENT (A) ERROR AMPLIFIER OUTPUT CURRENT (µA) 0 LT1371 • G01 SHUTDOWN DELAY (µs) 2.6 0.1 0 INPUT CURRENT (µA) INPUT VOLTAGE (V) 150°C 100°C SWITCH CURRENT LIMIT (A) SWITCH SATURATION VOLTAGE (V) 1.0 0.9 Minimum Input Voltage vs Temperature 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 FEEDBACK PIN VOLTAGE (V) LT1371 • G08 0 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) LT1371 • G09 LT1371 U W TYPICAL PERFORMANCE CHARACTERISTICS VC Pin Threshold and High Clamp Voltage vs Temperature Feedback Input Current vs Temperature 2.4 1.8 1.6 1.4 1.2 VC THRESHOLD 1.0 0.8 700 NEGATIVE FEEDBACK INPUT CURRENT (µA) FEEDBACK INPUT CURRENT (nA) VC HIGH CLAMP 2.0 VC PIN VOLTAGE (V) 0 800 2.2 VFB =VREF 600 500 400 300 200 100 0.6 0.4 –50 –25 Negative Feedback Input Current vs Temperature 0 25 50 75 100 125 150 TEMPERATURE (°C) 0 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) LT1371 • G10 LT1371 • G11 VNFB =VNFR –10 –20 –30 –40 –50 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) LT1371 • G12 U U U PIN FUNCTIONS VC: The Compensation pin is used for frequency compensation, current limiting and soft start. It is the output of the error amplifier and the input of the current comparator. Loop frequency compensation can be performed with an RC network connected from the VC pin to ground. FB: The Feedback pin is used for positive output voltage sensing and oscillator frequency shifting. It is the inverting input to the error amplifier. The noninverting input of this amplifier is internally tied to a 1.245V reference. Load on the FB pin should not exceed 250µA when NFB pin is used. See Applications Information. NFB: The Negative Feedback pin is used for negative output voltage sensing. It is connected to the inverting input of the negative feedback amplifier through a 100k source resistor. S/S (R and T7 Packages Only): Shutdown and Synchronization Pin. The S/S pin is logic level compatible. Shutdown is active low and the shutdown threshold is typically 1.3V. For normal operation, pull the S/S pin high, tie it to VIN or leave it floating. To synchronize switching, drive the S/S pin between 600kHz and 800kHz. SHDN: (SW Package Only): The Shutdown pin is active low and the shutdown threshold is typically 1.3V. For normal operation, pull the SHDN pin high, tie it to VIN or leave it floating. SYNC (SW Package Only): To synchronize switching, drive the SYNC pin between 600kHz and 800kHz. If not used, the SYNC pin can be tied high, low or left floating. VIN: Bypass Input Supply pin with a low ESR capacitor, 10µF or more. The regulator goes into undervoltage lockout when VIN drops below 2.5V. Undervoltage lockout stops switching and pulls the VC pin low. VSW: The Switch pin is the collector of the power switch and has large currents flowing through it. Keep the traces to the switching components as short as possible to minimize radiation and voltage spikes. GND: Tie all Ground pins to a good quality ground plane. 5 LT1371 W BLOCK DIAGRAM VIN SHUTDOWN DELAY AND RESET SHDN SW LOW DROPOUT 2.3V REG ANTI-SAT S/S* SYNC SYNC LOGIC OSC DRIVER SWITCH 5:1 FREQUENCY SHIFT + 100k NFB NFBA – COMP 50k – FB + 1.245V REF GND SENSE + EA IA VC AV ≈ 6 *R AND T7 PACKAGES ONLY 0.04Ω – GND LT1371 • BD U OPERATION The LT1371 is a current mode switcher. This means that switch duty cycle is directly controlled by switch current rather than by output voltage. Referring to the block diagram, the switch is turned ON at the start of each oscillator cycle. It is turned OFF when switch current reaches a predetermined level. Control of output voltage is obtained by using the output of a voltage sensing error amplifier to set current trip level. This technique has several advantages. First, it has immediate response to input voltage variations, unlike voltage mode switchers which have notoriously poor line transient response. Second, it reduces the 90° phase shift at mid-frequencies in the energy storage inductor. This greatly simplifies closed-loop frequency compensation under widely varying input voltage or output load conditions. Finally, it allows simple pulse-by-pulse current limiting to provide maximum switch protection under output overload or short conditions. A low dropout internal regulator provides a 2.3V supply for all internal circuitry. This low dropout design allows input voltage to vary from 2.7V to 25V with virtually no change in device performance. A 6 500kHz oscillator is the basic clock for all internal timing. It turns ON the output switch via the logic and driver circuitry. Special adaptive anti-sat circuitry detects onset of saturation in the power switch and adjusts driver current instantaneously to limit switch saturation. This minimizes driver dissipation and provides very rapid turnoff of the switch. A 1.245V bandgap reference biases the positive input of the error amplifier. The negative input of the amplifier is brought out for positive output voltage sensing. The error amplifier has nonlinear transconductance to reduce output overshoot on start-up or overload recovery. When the feedback voltage exceeds the reference by 40mV, error amplifier transconductance increases 10 times, which reduces output overshoot. The feedback input also invokes oscillator frequency shifting, which helps protect components during overload conditions. When the feedback voltage drops below 0.6V, the oscillator frequency is reduced 5:1. Lower switching frequency allows full control of switch current limit by reducing minimum switch duty cycle. LT1371 U U W U APPLICATIO S I FOR ATIO Unique error amplifier circuitry allows the LT1371 to directly regulate negative output voltages. The negative feedback amplifier’s 100k source resistor is brought out for negative output voltage sensing. The NFB pin regulates at – 2.49V while the amplifier output internally drives the FB pin to 1.245V. This architecture, which uses the same main error amplifier, prevents duplicating functions and maintains ease of use. Consult LTC Marketing for units that can regulate down to – 1.25V. The error signal developed at the amplifier output is brought out externally. This pin (VC) has three different functions. It is used for frequency compensation, current limit adjustment and soft starting. During normal regulator operation this pin sits at a voltage between 1V (low output current) and 1.9V (high output current). The error amplifier is a current output (gm) type, so this voltage can be externally clamped for lowering current limit. Likewise, a capacitor coupled external clamp will provide soft start. Switch duty cycle goes to zero if the VC pin is pulled below the control pin threshold, placing the LT1371 in an idle mode. U U W U APPLICATIO S I FOR ATIO VOUT Positive Output Voltage Setting The LT1371 develops a 1.245V reference (VREF) from the FB pin to ground. Output voltage is set by connecting the FB pin to an output resistor divider (Figure 1). The FB pin bias current represents a small error and can usually be ignored for values of R2 up to 7k. The suggested value for R2 is 6.19k. The NFB pin is normally left open for positive output applications. Positive fixed voltage versions are available (consult LTC Marketing). Negative Output Voltage Setting The LT1371 develops a – 2.49V reference (VNFR) from the NFB pin to ground. Output voltage is set by connecting the NFB pin to an output resistor divider (Figure 2). The –30µA NFB pin bias current (INFB) can cause output voltage errors and should not be ignored. This has been accounted for in the formula in Figure 2. The suggested value for R2 is 2.49k. The FB pin is normally left open for negative output applications. See Dual Polarity Output Voltage Sensing for limitations on FB pin loading when using the NFB pin. Dual Polarity Output Voltage Sensing Certain applications benefit from sensing both positive and negative output voltages. One example is the “Dual Output Flyback Converter with Overvoltage Protection” circuit shown in the Typical Applications section. Each output voltage resistor divider is individually set as described above. When both the FB and NFB pins are used, R1 FB PIN R2 ( ) ( ) VOUT = VREF 1 + R1 R2 R1 = R2 VOUT –1 1.245 VREF LT1371 • F01 Figure 1. Positive Output Resistor Divider –VOUT INFB ( ) R1 –VOUT = VNFB 1 + R1 + INFB (R1) R2 R2 R1 = NFB PIN VNFR VOUT– 2.49 ( )( 2.49 + 30 • 10– 6 R2 ) LT1371 • F02 Figure 2. Negative Output Resistor Divider the LT1371 acts to prevent either output from going beyond its set output voltage. For example, in this application if the positive output were more heavily loaded than the negative, the negative output would be greater and would regulate at the desired set-point voltage. The positive output would sag slightly below its set-point voltage. This technique prevents either output from going unregulated high at no load. Please note that the load on the FB pin should not exceed 250µA when the NFB pin is used. This situation occurs when the resistor dividers are used at both FB and NFB. True load on FB is not the full divider current unless the positive output is shorted to ground. See Dual Output Flyback Converter application. 7 LT1371 U U W U APPLICATIO S I FOR ATIO Shutdown and Synchronization The 7-pin R and T7 package devices have a dual function S/S pin which is used for both shutdown and synchronization. The SW package device has both a Shutdown (SHDN) pin and a Synchronization (SYNC) pin which can be used separately or tied together. These pins are logic level compatible and can be pulled high, tied to VIN or left floating for normal operation. A logic low on the S/S pin or SHDN pin activates shutdown, reducing the part’s supply current to 12µA. Typical synchronization range is from 1.05 to 1.8 times the part’s natural switching frequency, but is only guaranteed between 600kHz and 800kHz. A 12µs resetable shutdown delay network guarantees the part will not go into shutdown while receiving a synchronization signal when the functions are combined. Caution should be used when synchronizing above 700kHz because at higher sync frequencies the amplitude of the internal slope compensation used to prevent subharmonic switching is reduced. This type of subharmonic switching only occurs when the duty cycle of the switch is above 50%. Higher inductor values will tend to eliminate problems. Thermal Considerations Care should be taken to ensure that the worst-case input voltage and load current conditions do not cause excessive die temperatures. Typical thermal resistance is 30°C/W for the R package and 50°C/W for the SW and T7 packages but these numbers will vary depending on the mounting techniques (copper area, air flow, etc.). Heat is transferred from the R and T7 packages via the tab and from the SW package via pins 4 to 7 and 14 to 17. Average supply current (including driver current) is: IIN = 4mA + DC [ISW/60 + ISW (0.004)] ISW = switch current DC = switch duty cycle Switch power dissipation is given by: PSW = (ISW)2 (RSW)(DC) RSW = output switch ON resistance 8 Total power dissipation of the die is the sum of supply current times supply voltage, plus switch power: PD(TOTAL) = (IIN)(VIN) + PSW Surface mount heat sinks are also becoming available which can lower package thermal resistance by 2 or 3 times. One manufacturer is Wakefield Engineering who offers surface mount heat sinks for both the R package (DD) and SW package (SW20) and can be reached at (617) 245-5900. Choosing the Inductor For most applications the inductor will fall in the range of 2.2µH to 22µH. Lower values are chosen to reduce physical size of the inductor. Higher values allow more output current because they reduce peak current seen by the power switch, which has a 3A limit. Higher values also reduce input ripple voltage and reduce core loss. When choosing an inductor you might have to consider maximum load current, core and copper losses, allowable component height, output voltage ripple, EMI, fault current in the inductor, saturation and, of course, cost. The following procedure is suggested as a way of handling these somewhat complicated and conflicting requirements. 1. Assume that the average inductor current for a boost converter is equal to load current times VOUT / VIN and decide whether or not the inductor must withstand continuous overload conditions. If average inductor current at maximum load current is 1A, for instance, a 1A inductor may not survive a continuous 3A overload condition. Also be aware that boost converters are not short-circuit protected and that, under output short conditions, inductor current is limited only by the available current of the input supply. 2. Calculate peak inductor current at full load current to ensure that the inductor will not saturate. Peak current can be significantly higher than output current, especially with smaller inductors and lighter loads, so don’t omit this step. Powdered iron cores are forgiving because they saturate softly, whereas ferrite cores LT1371 U U W U APPLICATIO S I FOR ATIO saturate abruptly and other core materials fall in between. The following formula assumes continuous mode operation but it errs only slightly on the high side for discontinuous mode, so it can be used for all conditions. ) ) V (V –V ) V IPEAK = (IOUT) OUT + IN OUT IN VIN 2(f)(L)(VOUT) VIN = Minimum Input Voltage f = 500kHz Switching Frequency 3. Decide if the design can tolerate an “open” core geometry, like a rod or barrel, which has high magnetic field radiation, or whether it needs a closed core, like a toroid, to prevent EMI problems. One would not want an open core next to a magnetic storage media, for instance! This is a tough decision because the rods or barrels are temptingly cheap and small and there are no helpful guidelines to calculate when the magnetic field radiation will be a problem. 4. Start shopping for an inductor which meets the requirements of core shape, peak current (to avoid saturation), average current (to limit heating) and fault current. If the inductor gets too hot, wire insulation will melt and cause turn-to-turn shorts. Keep in mind that all good things like high efficiency, low profile and high temperature operation will increase cost, sometimes dramatically. 5. After making an initial choice, consider the secondary things like output voltage ripple, second sourcing, etc. Use the experts in the LTC Applications Department if you feel uncertain about the final choice. They have experience with a wide range of inductor types and can tell you about the latest developments in low profile, surface mounting, etc. Output Capacitor The output capacitor is normally chosen by its effective series resistance (ESR), because this is what determines output ripple voltage. At 500kHz any polarized capacitor is essentially resistive. To get low ESR takes volume, so physically smaller capacitors have high ESR. The ESR range needed for typical LT1371 applications is 0.025Ω to 0.2Ω. A typical output capacitor is an AVX type TPS, 22µF at 25V (2 each), with a guaranteed ESR less than 0.2Ω. This is a “D” size surface mount solid tantalum capacitor. TPS capacitors are specially constructed and tested for low ESR, so they give the lowest ESR for a given volume. To further reduce ESR, multiple output capacitors can be used in parallel. The value in microfarads is not particularly critical, and values from 22µF to greater than 500µF work well, but you cannot cheat mother nature on ESR. If you find a tiny 22µF solid tantalum capacitor, it will have high ESR and output ripple voltage will be terrible. Table 1 shows some typical solid tantalum surface mount capacitors. Table 1. Surface Mount Solid Tantalum Capacitor ESR and Ripple Current E CASE SIZE AVX TPS, Sprague 593D AVX TAJ ESR (MAX Ω) RIPPLE CURRENT (A) 0.1 to 0.3 0.7 to 0.9 0.7 to 1.1 0.4 0.1 to 0.3 0.9 to 2.0 0.7 to 1.1 0.36 to 0.24 0.2 (Typ) 1.8 to 3.0 0.5 (Typ) 0.22 to 0.17 2.5 to 10 0.16 to 0.08 D CASE SIZE AVX TPS, Sprague 593D AVX TAJ C CASE SIZE AVX TPS AVX TAJ B CASE SIZE AVX TAJ Many engineers have heard that solid tantalum capacitors are prone to failure if they undergo high surge currents. This is historically true and AVX type TPS capacitors are specially tested for surge capability, but surge ruggedness is not a critical issue with the output capacitor. Solid tantalum capacitors fail during very high turn-on surges, which do not occur at the output of regulators. High discharge surges, such as when the regulator output is dead-shorted, do not harm the capacitors. Single inductor boost regulators have large RMS ripple current in the output capacitor, which must be rated to handle the current. The formula to calculate this is: 9 LT1371 U U W U APPLICATIO S I FOR ATIO Output Capacitor Ripple Current (RMS) DC IRIPPLE (RMS) = IOUT 1 – DC = IOUT VOUT – VIN VIN DC = Switch Duty Cycle Input Capacitors The input capacitor of a boost converter is less critical due to the fact that the input current waveform is triangular and does not contain large squarewave currents as is found in the output capacitor. Capacitors in the range of 10µF to 100µF, with an ESR of 0.2Ω or less, work well up to full 3A switch current. Higher ESR capacitors may be acceptable at low switch currents. Input capacitor ripple current for a boost converter is : 0.3(VIN)(VOUT – VIN) IRIPPLE = (f)(L)(VOUT) f = 500kHz Switching Frequency The input capacitor can see a very high surge current when a battery or high capacitance source is connected “live” and solid tantalum capacitors can fail under this condition. Several manufacturers have developed tantalum capacitors specially tested for surge capability (AVX TPS series, for instance) but even these units may fail if the input voltage approaches the maximum voltage rating of the capacitor during a high surge. AVX recommends derating capacitor voltage by 2:1 for high surge applications. Ceramic, OS-CON and aluminum electrolytic capacitors may also be used and have a high tolerance to turn-on surges. Ceramic Capacitors Higher value, lower cost ceramic capacitors are now becoming available in smaller case sizes. These are tempting for switching regulator use because of their very low ESR. Unfortunately, the ESR is so low that it can cause loop stability problems. Solid tantalum capacitor ESR 10 generates a loop “zero” at 5kHz to 50kHz that is instrumental in giving acceptable loop phase margin. Ceramic capacitors remain capacitive to beyond 300kHz and usually resonate with their ESL before ESR becomes effective. They are appropriate for input bypassing because of their high ripple current ratings and tolerance of turn-on surges. Output Diode The suggested output diode (D1) is a 1N5821 Schottky or its Motorola equivalent MBR330. It is rated at 3A average forward current and 30V reverse voltage. Typical forward voltage is 0.6V at 3A. The diode conducts current only during switch OFF time. Peak reverse voltage for boost converters is equal to regulator output voltage. Average forward current in normal operation is equal to output current. Frequency Compensation Loop frequency compensation is performed on the output of the error amplifier (VC pin) with a series RC network. The main pole is formed by the series capacitor and the output impedance (≈500kΩ) of the error amplifier. The pole falls in the range of 2Hz to 20Hz. The series resistor creates a “zero” at 1kHz to 5kHz, which improves loop stability and transient response. A second capacitor, typically one-tenth the size of the main compensation capacitor, is sometimes used to reduce the switching frequency ripple on the VC pin. VC pin ripple is caused by output voltage ripple attenuated by the output divider and multiplied by the error amplifier. Without the second capacitor, VC pin ripple is: VC Pin Ripple = 1.245(VRIPPLE)(gm)(RC) (VOUT) VRIPPLE = Output ripple (VP–P) gm = Error amplifier transconductance ( ≈1500µmho) RC = Series resistor on VC pin VOUT = DC output voltage To prevent irregular switching, VC pin ripple should be kept below 50mVP–P. Worst-case VC pin ripple occurs at LT1371 U U W U APPLICATIO S I FOR ATIO maximum output load current and will also be increased if poor quality (high ESR) output capacitors are used. The addition of a 0.0047µF capacitor on the VC pin reduces switching frequency ripple to only a few millivolts. A low value for RC will also reduce VC pin ripple, but loop phase margin may be inadequate. FB Layout Considerations VC For maximum efficiency, LT1371 switch rise and fall times are made as short as possible. To prevent radiation and high frequency resonance problems, proper layout of the components connected to the switch node is essential. B field (magnetic) radiation is minimized by keeping output diode, Switch pin and output bypass capacitor leads as short as possible. Figures 3, 4 and 5 show recommended positions for these components. E field radiation is kept low by minimizing the length and area of all traces connected to the Switch pin. A ground plane should always be used under the switcher circuitry to prevent interplane coupling. GND S/S NFB VSW VIN C CONNECT GROUND PIN AND TAB DIRECTLY TO GROUND PLANE. TAB MAY BE SOLDERED OR BOLTED TO GROUND PLANE* D C KEEP PATH FROM VSW, OUTPUT DIODE, OUTPUT CAPACITORS AND GROUND RETURN AS SHORT AS POSSIBLE *SEE T7 PACKAGE LAYOUT CONSIDERATIONS FOR VERTICAL MOUNTING OF THE T7 PACKAGE Figure 4. Layout Considerations— T7 Package The high speed switching current path is shown schematically in Figure 6. Minimum lead length in this path is essential to ensure clean switching and low EMI. The path including the switch, output diode and output capacitor is the only one containing nanosecond rise and fall times. Keep this path as short as possible. VC VSW FB NC NFB VSW GND GND GND GND GND GND GND GND SHDN D C KEEP PATH FROM VSW, OUTPUT DIODE, OUTPUT CAPACITORS AND GROUND RETURN AS SHORT AS POSSIBLE C NC SYNC NC VIN GND LT1371 • F05 CONNECT ALL GROUND PINS TO GROUND PLANE FB VC GND S/S NFB VSW VIN Figure 5. Layout Considerations— SW Package C CONNECT GROUND PIN AND TAB DIRECTLY TO GROUND PLANE C L1 D LT1371 • F04 KEEP PATH FROM VSW, OUTPUT DIODE, OUTPUT CAPACITORS AND GROUND RETURN AS SHORT AS POSSIBLE LT1371 • F03 SWITCH NODE VOUT VIN HIGH FREQUENCY CIRCULATING PATH LOAD Figure 3. Layout Considerations— R Package LT1371 • F06 Figure 6 11 LT1371 U U W U APPLICATIO S I FOR ATIO VIN T7 Package Layout Considerations Electrical connection to the tab of a T7 package is required for proper device operation. If the tab is tied directly to the ground plane (Figure 4) no other considerations are necessary. If the tab is not connected directly to the ground plane, as in a vertically mounted application, a separate electrical connection from the tab to a “floating node” is required. Ground returns for the VIN capacitor, VC components and output feedback resistor divider are then connected to the floating node. This is shown schematically in Figure 7. All other system ground connections are made to Pin 4. The electrical connection from the T7 package tab to the floating node must be a low resistance (< 0.1Ω), low inductance (< 20nH) path which can be accomplished with a jumper wire or an electrically conductive heat sink. Bolt the jumper wire directly to the tab using a solder tail to maintain low resistance. The jumper wire length should not exceed 3/4 inch of 24 AWG gauge wire or larger to minimize the inductance. Vertically mounted electrically conductive heat sinks are available from many heat sink manufacturers. These heat sinks also have tabs that solder directly to the board creating the required low resistance, low inductance path from the tab to the floating node. The tab should be bolted 12 VOUT 7 VIN VSW 1 LT1371T7 VC FB GND TAB FLOATING NODE (TAB TIES INTERNALLY TO PIN 4 GROUND) 5 2 GND 4 LT1371 • F07 SYSTEM GROUND Figure 7. Tab Connections for Vertically Mounted T7 Package or soldered directly to the heat sink to maintain low resistance. Heat sinks are available in clip-on styles but are only recommended if the tab to heat sink contact resistance can be maintained below 0.1Ω for the life of the product. More Help For more detailed information on switching regulator circuits, please see Application Note 19. Linear Technology also offers a computer software program, SwitcherCAD, to assist in designing switching converters. In addition, our Applications Department is always ready to lend a helping hand. LT1371 U TYPICAL APPLICATIONS N Positive-to-Negative Converter with Direct Feedback VIN 2.7V TO 13V + 2 D2 P6KE-15A D3 1N4148 1 • VIN OFF VSW S/S R2 6.19k 1% T1* C1 100µF ON 4 + • R2 2.49k 1% NFB + –VOUT† –5V C1 22µF ON 1N4148 VIN VSW FB OFF MBRS360T3 T1* 2, 3 7 + P6KE-20A • S/S 8, 9 •4 10 • LT1371 NFB C2 0.047µF R1 2k C3 0.0047µF VIN 2.7V TO 10V R3 2.49k 1% GND R1 68.1k 1% C4 100µF ×2 3 D1 MBRS330T3 LT1371 VC Dual Output Flyback Converter with Overvoltage Protection *COILTRONICS CTX10-4 † MAX IOUT IOUT VIN 0.6A 3V 1.0A 5V 1.5A 9V VC 1 C3 0.0047µF C5 47µF –VOUT –15V R4 12.1k 1% R5 2.49k 1% C2 0.047µF R3 2k LT1371 • TA03 C4 47µF + MBRS360T3 GND VOUT 15V *DALE LPE-5047-100MB Single Li-Ion Cell to 5V 2 Li-Ion Cells to 5V SEPIC Converter** VIN 4V TO 9V L1* L1A* 10µH VIN OFF ON VSW S/S • LT1371 + C1 33µF 20V FB GND LT1371 • TA04 R2 18.7k 1% • + L1B* 10µH R1 2k C4 0.047µF R3 6.19k 1% C5 0.0047µF R1 18.7k 1% FB + LT1371 + C3 100µF 10V ×2 S/S SINGLE Li-Ion CELL + C1** 100µF 10V GND C4** 100µF 10V ×2 VC R2 6.19k 1% C2 0.047µF R3 2k C3 0.0047µF LT1371 • TA06 LT1371 • TA05 C1 = AVX TPSD 336M020R0200 C2 = TOKIN 1E475ZY5U-C304 C3 = AVX TPSD107M010R0100 * SINGLE INDUCTOR WITH TWO WINDINGS COILTRONICS CTX10-4 ** INPUT VOLTAGE MAY BE GREATER OR LESS THAN OUTPUT VOLTAGE OFF VOUT† 5V ON VOUT† 5V VSW VIN MBRS330T3 C2 4.7µF VC D1 MBRS320T3 †MAX I OUT IOUT 0.85A 1A 1.3A 1.5A VIN 4V 5V 7V 9V *COILCRAFT DO3316P-103 **AVX TPSD107M010R0100 †MAX I IOUT 1.2A 1.6A 1.8A OUT VIN 2.7V 3.3V 3.6V 13 LT1371 U TYPICAL APPLICATIONS N 20W CCFL Supply 47pF LAMP 1N4148 11 L1 5 8 1 4 3 2 + 0.47µF 22µF Q2 Q1 150Ω INTENSITY CONTROL L2 15µH MUR405 1N4148 1N4148 VIN 9V TO 15V 22k VSW VIN + 10k FB LT1371 140Ω 1µF 2.2µF GND VC L1=COILTRONICS CTX02-11128 L2=COILCRAFT DO3316P-153 Q1, Q2=ZETEX ZTX849, ZDT1048 OR ROHM 2SC5001 0.47 µF=WIMA 3X 0.15 µF TYPE MKP-20 COILTRONICS (407) 241-7876 + LT1371 • TA07 2.2µF Laser Power Supply 1800pF 10kV 0.01µF 5kV 47k 5W 1800pF 10kV 8 11 L1 1 4 5 HV DIODES 3 2 0.47µF LASER + 2.2µF Q2 Q1 150Ω L2 82µH MUR405 VIN 12V TO 25V VSW 10k VIN + 10k FB LT1371 2.2µF VC GND 0.1µF VIN 1N4002 (ALL) 190Ω 1% + 10µF LT1371 • TA08 14 L1 = COILTRONICS CTX02-11128 L2 = GOWANDA GA40-822K Q1, Q2 = ZETEX ZTX849 0.47µF = WIMA 3X 0.15µF TYPE MKP-20 HV DIODES = SEMTECH-FM-50 LASER = HUGHES 3121H-P COILTRONICS (407) 241-7876 LT1371 U PACKAGE DESCRIPTION Dimensions in inches (millimeters) unless otherwise noted. R Package 7-Lead Plastic DD Pak (LTC DWG # 05-08-1462) 0.256 (6.502) 0.060 (1.524) TYP 0.060 (1.524) 0.390 – 0.415 (9.906 – 10.541) 0.165 – 0.180 (4.191 – 4.572) 0.045 – 0.055 (1.143 – 1.397) 15° TYP 0.060 (1.524) 0.183 (4.648) 0.059 (1.499) TYP 0.330 – 0.370 (8.382 – 9.398) ( +0.008 0.004 –0.004 +0.203 0.102 –0.102 ) 0.095 – 0.115 (2.413 – 2.921) 0.075 (1.905) 0.300 (7.620) ( +0.012 0.143 –0.020 +0.305 3.632 –0.508 BOTTOM VIEW OF DD PAK HATCHED AREA IS SOLDER PLATED COPPER HEAK SINK 0.040 – 0.060 (1.016 – 1.524) 0.026 – 0.036 (0.660 – 0.914) ) 0.050 ± 0.012 (1.270 ± 0.305) 0.013 – 0.023 (0.330 – 0.584) R (DD7) 0695 SW Package 20-Lead Plastic Small Outline (Wide 0.300) (LTC DWG # 05-08-1620) 0.496 – 0.512* (12.598 – 13.005) 20 19 18 17 16 15 14 13 12 11 0.394 – 0.419 (10.007 – 10.643) NOTE 1 0.291 – 0.299** (7.391 – 7.595) 0.010 – 0.029 × 45° (0.254 – 0.737) 1 2 3 4 5 6 7 8 9 0.093 – 0.104 (2.362 – 2.642) 10 0.037 – 0.045 (0.940 – 1.143) 0° – 8° TYP 0.009 – 0.013 (0.229 – 0.330) NOTE 1 0.016 – 0.050 (0.406 – 1.270) 0.050 (1.270) TYP 0.014 – 0.019 (0.356 – 0.482) TYP 0.004 – 0.012 (0.102 – 0.305) S20 (WIDE) 0695 NOTE: 1. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS. THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 15 LT1371 U PACKAGE DESCRIPTION Dimensions in inches (millimeters) unless otherwise noted. T7 Package 7-Lead Plastic TO-220 (Standard) (LTC DWG # 05-08-1422) 0.165 – 0.180 (4.293 – 4.572) 0.147 – 0.155 (3.734 – 3.937) DIA 0.390 – 0.415 (9.906 – 10.541) 0.045 – 0.055 (1.143 – 1.397) 0.230 – 0.270 (5.842 – 6.858) 0.570 – 0.620 (14.478 – 15.748) 0.460 – 0.500 (11.684 – 12.700) 0.330 – 0.370 (8.382 – 9.398) 0.620 (15.75) TYP 0.700 – 0.728 (17.780 – 18.491) 0.152 – 0.202 0.260 – 0.320 (3.860 – 5.130) (6.604 – 8.128) 0.040 – 0.060 (1.016 – 1.524) 0.095 – 0.115 (2.413 – 2.921) 0.013 – 0.023 (0.330 – 0.584) 0.026 – 0.036 (0.660 – 0.914) 0.135 – 0.165 (3.429 – 4.191) 0.155 – 0.195 (3.937 – 4.953) T7 (TO-220) (FORMED) 0695 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT1171 100kHz 2.5A Boost Switching Regulator Good for Up to VIN = 40V LTC 1265 12V 1.2A Monolithic Buck Converter Converts 5V to 3.3V at 1A with 90% Efficiency LT1302 Micropower 2A Boost Converter Converts 2V to 5V at 600mA in SO-8 Packages LT1372 500kHz 1.5A Boost Switching Regulator Also Regulates Negative Flyback Outputs LT1373 Low Supply Current 250kHz 1.5A Boost Switching Regulator 90% Efficient Boost Converter with Constant Frequency LT1376 500kHz 1.5A Buck Switching Regulator Steps Down from Up to 25V Using 4.7µH Inductors LT1512 500kHz 1.5A SEPIC Battery Charger Input Voltage May Be Greater or Less Than Battery Voltage LT1513 500kHz 3A SEPIC Battery Charger Input Voltage May Be Greater or Less Than Battery Voltage ® 16 Linear Technology Corporation LT/GP 0996 5K REV A • PRINTED IN THE USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● TELEX: 499-3977  LINEAR TECHNOLOGY CORPORATION 1995
LT1371CT7#PBF 价格&库存

很抱歉,暂时无法提供与“LT1371CT7#PBF”相匹配的价格&库存,您可以联系我们找货

免费人工找货