LT1374
4.5A, 500kHz Step-Down
Switching Regulator
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FEATURES
DESCRIPTIO
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The LT ®1374 is a 500kHz monolithic buck mode switching
regulator. A 4.5A switch is included on the die along with
all the necessary oscillator, control and logic circuitry. High
switching frequency allows a considerable reduction in the
size of external components. The topology is current mode
for fast transient response and good loop stability. Both
fixed output voltage and adjustable parts are available.
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Constant 500kHz Switching Frequency
High Power 16-Pin TSSOP Package Available
Uses All Surface Mount Components
Inductor Size Reduced to 1.8µH
Saturating Switch Design: 0.07Ω
Effective Supply Current: 2.5mA
Shutdown Current: 20µA
Cycle-by-Cycle Current Limiting
Easily Synchronizable
A special high speed bipolar process and new design techniques achieve high efficiency at high switching frequency.
Efficiency is maintained over a wide output current range
by using the output to bias the circuitry and by utilizing a
supply boost capacitor to saturate the power switch.
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APPLICATIO S
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Portable Computers
Battery-Powered Systems
Battery Chargers
Distributed Power
The LT1374 is available in standard 7-pin DD, TO-220, fused
lead SO-8 and 16-pin exposed pad TSSOP packages. Full
cycle-by-cycle short-circuit protection and thermal shutdown are provided. Standard surface mount external parts
may be used, including the inductor and capacitors. There
is the optional function of shutdown or synchronization. A
shutdown signal reduces supply current to 20µA. Synchronization allows an external logic level signal to increase the
internal oscillator from 580kHz to 1MHz.
, LTC and LT are registered trademarks of Linear Technology Corporation.
Protected by U.S. Patents, Including 6111439, 5668493, 5656965
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TYPICAL APPLICATIO
5V Buck Converter
Efficiency vs Load Current
D2
CMDSH3 OR FMMD914
INPUT
6V TO 25V
C3*
10µF TO
50µF
VIN
+
BOOST
L1**
5µH
OUTPUT**
5V, 4.25A
VSW
LT1374-5 BIAS
DEFAULT
= ON
SHDN
GND
SENSE
VC
CC
1.5nF
VOUT = 5V
VIN = 10V
L = 10µH
95
D1
MBRS330T3
+
* RIPPLE CURRENT RATING ≥ IOUT/2
** INCREASE L1 TO 10µH FOR LOAD CURRENTS ABOVE 3.5A AND TO 20µH ABOVE 4A
SEE APPLICATIONS INFORMATION
C1
100µF, 10V
SOLID
TANTALUM
1374 TA01
EFFICIENCY (%)
C2
0.27µF
100
90
85
80
75
70
0
0.5
1.0
1.5 2.0 2.5 3.0
LOAD CURRENT (A)
3.5
4.0
1374 TA02
1374fd
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LT1374
W W
W
AXI U
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ABSOLUTE
RATI GS
(Note 1)
Input Voltage
LT1374 ............................................................... 25V
LT1374HV .......................................................... 32V
BOOST Pin Voltage ................................................. 38V
BOOST Pin Above Input Voltage ............................. 15V
SHDN Pin Voltage ..................................................... 7V
BIAS Pin Voltage ...................................................... 7V
FB Pin Voltage (Adjustable Part) ............................ 3.5V
FB Pin Current (Adjustable Part) ............................ 1mA
SENSE Voltage (Fixed 5V Part) ................................. 7V
SYNC Pin Voltage ..................................................... 7V
Operating Junction Temperature Range
LT1374C ............................................... 0°C to 125° C
LT1374I ........................................... – 40°C to 125°C
Storage Temperature Range ................ – 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
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PACKAGE/ORDER I FOR ATIO
FRONT VIEW
7
6
5
4
3
2
1
TAB
IS
GND
FB OR SENSE*
BOOST
VIN
GND
VSW
SYNC OR SHDN*
VC
R PACKAGE
7-LEAD PLASTIC DD
TJMAX = 125°C, θJA = 30°C/ W
WITH PACKAGE SOLDERED TO 0.5 SQUARE INCH
COPPER AREA OVER BACKSIDE GROUND PLANE
OR INTERNAL POWER PLANE. θJA CAN VARY
FROM 20°C/W TO > 40°C/W DEPENDING ON
MOUNTING TECHNIQUES
GND
1
16 GND
NC
2
15 VSW
VIN
3
14 VSW
VIN
4
13 SYNC
BOOST
5
12 SHDN
FB/SENSE
6
11 VC
NC
7
10 BIAS
8
ORDER
PART NUMBER
LT1374CR
LT1374CR-5
LT1374CR-SYNC
LT1374CR-5 SYNC
LT1374HVCR
LT1374IR
LT1374IR-5
LT1374IR-SYNC
LT1374IR-5 SYNC
LT1374HVIR
LT1374CS8
LT1374CS8-5
LT1374CS8-SYNC
LT1374CS8-5 SYNC
LT1374HVCS8
LT1374IS8
LT1374IS8-5
LT1374IS8-SYNC
LT1374IS8-5 SYNC
LT1374HVIS8
TOP VIEW
VIN 1
9
GND
FE16 PACKAGE
16-LEAD PLASTIC TSSOP
θJA = 40°C/ W
EXPOSED PAD SOLDERED TO
GROUND PLANE
8 VSW
SYNC
7
OR SHDN*
6 VC
BOOST 2
FB OR
3
SENSE*
FGND 4
5 BIAS
S8 PACKAGE
8-LEAD PLASTIC SO
θJA = 80°C/ W WITH FUSED (FGND)
GROUND PIN CONNECTED TO GROUND
PLANE OR LARGE LANDS
ORDER
PART NUMBER
TOP VIEW
GND
ORDER
PART NUMBER
LT1374CFE
LT1374IFE
LT1374HVCFE
LT1374HVIFE
TAB IS
GND
FE PART MARKING
1374CFE
1374IFE
1374HVCFE
1374HVIFE
FRONT VIEW
7
6
5
4
3
2
1
FB OR SENSE*
BOOST
VIN
GND
VSW
SHDN
VC
T7 PACKAGE
7-LEAD PLASTIC TO-220
S8 PART MARKING
1374
1374I
13745 1374I5
1374SN 374ISN
3745SN 74I5SN
1374HV 374HVI
ORDER
PART NUMBER
LT1374CT7
LT1374CT7-5
LT1374IT7
LT1374IT7-5
TJMAX = 125°C, θJA = 50°C/ W, θJC = 4°C/ W
*Default is the adjustable output voltage device with FB pin and shutdown function. Option -5 replaces FB with SENSE pin for fixed 5V output applications.
-SYNC replaces SHDN with SYNC pin for applications requiring synchronization. Consult LTC Marketing for parts specified with wider operating
temperature ranges.
1374fd
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LT1374
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TJ = 25°C. VIN = 15V, VC = 1.5V, Boost = VIN + 5V, switch open, unless otherwise noted.
PARAMETER
Feedback Voltage (Adjustable)
CONDITIONS
All Conditions
●
All Conditions
●
Sense Voltage (Fixed 5V)
SENSE Pin Resistance
Reference Voltage Line Regulation
5V ≤ VIN ≤ 25V (5V ≤ VIN ≤ 32V for LT1374HV)
Feedback Input Bias Current
Error Amplifier Voltage Gain
Error Amplifier Transconductance
(Notes 2, 8)
∆I (VC) = ±10µA (Note 8)
VC Pin to Switch Current Transconductance
Error Amplifier Source Current
Error Amplifier Sink Current
VC Pin Switching Threshold
VC Pin High Clamp
Switch Current Limit
Slope Compensation (Note 9)
Switch On Resistance (Note 7)
Maximum Switch Duty Cycle
Switch Frequency
Switch Frequency Line Regulation
Frequency Shifting Threshold on FB Pin
Minimum Input Voltage (Note 3)
Minimum Boost Voltage (Note 4)
Boost Current (Note 5)
VIN Supply Current (Note 6)
BIAS Supply Current (Note 6)
Shutdown Supply Current
●
●
200
1500
1000
VFB = 2.1V or VSENSE = 4.4V
VFB = 2.7V or VSENSE = 5.6V
Duty Cycle = 0
●
●
140
140
VC Open, VFB = 2.1V or VSENSE = 4.4V, DC ≤ 50%
DC = 80%
ISW = 4.5A
●
4.5
VFB = 2.1V or VSENSE = 4.4V
VC Set to Give 50% Duty Cycle
●
5V ≤ VIN ≤ 25V, (5V ≤ VIN ≤ 32V for LT1374HV)
∆f = 10kHz
90
86
460
440
●
●
0.8
●
ISW ≤ 4.5A
ISW = 1A
ISW = 4.5A
VBIAS = 5V
VBIAS = 5V
VSHDN = 0V, VIN ≤ 25V, VSW = 0V, VC Open
VC Open
VC Open Device Shutting Down
Device Starting Up
Synchronization Threshold
Synchronizing Range
SYNC Pin Input Resistance
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: Gain is measured with a VC swing equal to 200mV above the
switching threshold level to 200mV below the upper clamp level.
Note 3: Minimum input voltage is not measured directly, but is guaranteed
by other tests. It is defined as the voltage where internal bias lines are still
TYP
2.42
5.0
10
0.01
0.5
400
2000
5.3
225
225
0.9
2.1
6
0.8
0.07
●
●
VSHDN = 0V, VIN ≤ 32V, VSW = 0V, VC Open
Lockout Threshold
Shutdown Thresholds
MIN
2.39
2.36
4.94
4.90
7
●
●
●
●
●
93
93
500
0
1.0
5.0
2.3
20
90
0.9
3.2
20
●
30
●
●
●
●
2.3
0.13
0.25
●
2.38
0.37
0.45
1.5
580
40
MAX
2.45
2.48
5.06
5.10
14
0.03
2
2700
3100
320
320
8.5
0.1
0.13
540
560
0.15
1.3
5.5
3.0
35
140
1.4
4.0
50
75
75
100
2.46
0.60
0.7
2.2
1000
UNITS
V
V
V
V
kΩ
%/V
µA
µMho
µMho
A/ V
µA
µA
V
V
A
A
Ω
Ω
%
%
kHz
kHz
%/ V
V
V
V
mA
mA
mA
mA
µA
µA
µA
µA
V
V
V
V
kHz
kΩ
regulated so that the reference voltage and oscillator frequency remain
constant. Actual minimum input voltage to maintain a regulated output will
depend on output voltage and load current. See Applications Information.
Note 4: This is the minimum voltage across the boost capacitor needed to
guarantee full saturation of the internal power switch.
1374fd
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LT1374
ELECTRICAL CHARACTERISTICS
Note 5: Boost current is the current flowing into the boost pin with the pin
held 5V above input voltage. It flows only during switch on time.
Note 6: VIN supply current is the current drawn when the BIAS pin is held
at 5V and switching is disabled. If the BIAS pin is unavailable or open
circuit, the sum of VIN and BIAS supply currents will be drawn by the VIN
pin.
Note 7: Switch on resistance is calculated by dividing VIN to VSW voltage
by the forced current (4.5A). See Typical Performance Characteristics for
the graph of switch voltage at other currents.
Note 8: Transconductance and voltage gain refer to the internal amplifier
exclusive of the voltage divider. To calculate gain and transconductance,
refer to the SENSE pin on the fixed voltage parts. Divide values shown by
the ratio VOUT/2.42.
Note 9: Slope compensation is the current subtracted from the switch
current limit at 80% duty cycle. See Maximum Output Load Current in the
Applications Information section for further details.
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TYPICAL PERFOR A CE CHARACTERISTICS
Switch Peak Current Limit
Switch Voltage Drop
6.0
125°C
SWITCH PEAK CURRENT (A)
350
25°C
300
250
– 40°C
200
150
100
TYPICAL
5.5
5.0
MINIMUM
4.5
4.0
3.0
0
1
2
4
3
SWITCH CURRENT (A)
5
0
20
60
40
DUTY CYCLE (%)
1374 G18
Shutdown Pin Bias Current
80
100
2.410
– 50
300
200
AT 2.38V STANDBY THRESHOLD
(CURRENT FLOWS OUT OF PIN)
4
0
–50 –25
0
25
50
75
100
125
1374 G03
Standby and Shutdown Thresholds
CURRENT REQUIRED TO FORCE SHUTDOWN
(FLOWS OUT OF PIN). AFTER SHUTDOWN,
CURRENT DROPS TO A FEW µA
–25
TEMPERATURE (°C)
Shutdown Supply Current
25
2.40
VSHDN = 0V
STANDBY
SHUTDOWN PIN VOLTAGE (V)
CURRENT (µA)
2.415
1374 G02
500
8
2.420
3.5
50
400
2.425
INPUT SUPPLY CURRENT (µA)
SWITCH VOLTAGE (mV)
400
FEEDBACK VOLTAGE (V)
450
0
Feedback Pin Voltage
2.430
6.5
500
2.36
2.32
0.8
START-UP
0.4
20
15
10
5
SHUTDOWN
50
25
75
0
TEMPERATURE (°C)
100
125
1374 G04
0
–50 –25
0
50
100
25
75
0
JUNCTION TEMPERATURE (°C)
125
1374 G05
0
5
10
15
INPUT VOLTAGE (V)
20
25
1374 G06
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LT1374
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TYPICAL PERFOR A CE CHARACTERISTICS
Shutdown Supply Current
Error Amplifier Transconductance
VIN = 25V
50
VIN = 10V
40
30
20
3000
2000
2500
200
PHASE
GAIN (µMho)
TRANSCONDUCTANCE (µMho)
60
Error Amplifier Transconductance
2500
1500
1000
500
150
GAIN
2000
100
VC
COUT
12pF
ROUT
200k
1500
VFB 2 × 10–3
1000
ERROR AMPLIFIER EQUIVALENT CIRCUIT
(
)
50
PHASE (DEG)
INPUT SUPPLY CURRENT (µA)
70
0
10
RLOAD = 50Ω
0
50
25
0
75 100
–50 –25
JUNCTION TEMPERATURE (°C)
0
0.1
0.2
0.3
SHUTDOWN VOLTAGE (V)
0
0.4
125
1k
10k
100k
FREQUENCY (Hz)
Frequency Foldback
1374 G09
Minimum Input Voltage
with 5V Output
Switching Frequency
6.4
550
500
540
6.2
FREQUENCY (kHz)
300
200
INPUT VOLTAGE (V)
530
400
SWITCHING
FREQUENCY
520
510
500
490
480
470
100
FEEDBACK PIN
CURRENT
0.5
1.5
2.0
1.0
FEEDBACK PIN VOLTAGE (V)
5.8
5.6
MINIMUM
RUNNING
VOLTAGE
5.4
5.2
450
– 50
2.5
5.0
–25
0
25
50
75
100
1
125
10
100
LOAD CURRENT (mA)
TEMPERATURE (°C)
1000
1374 G12
1374 G11
1374 G10
Maximum Load Current
at VOUT = 10V
Maximum Load Current
at VOUT = 3.3V
Maximum Load Current
at VOUT = 5V
4.5
4.5
4.5
VOUT = 10V
MINIMUM
STARTING
VOLTAGE
6.0
460
0
0
–50
10M
1M
1374 G08
1374 G07
SWITCHING FREQUENCY (kHz) OR CURRENT (µA)
500
100
L = 20µH
L = 20µH
L = 20µH
L = 10µH
L = 10µH
L = 5µH
4.0
3.5
3.5
3.0
3.0
L = 5µH
CURRENT (A)
4.0
CURRENT (A)
CURRENT (A)
L = 10µH
4.0
L = 5µH
3.5
VOUT = 5V
VOUT = 3.3V
0
5
10
15
INPUT VOLTAGE (V)
20
25
1374 G13
3.0
0
5
10
15
INPUT VOLTAGE (V)
20
25
1374 G14
0
5
10
15
INPUT VOLTAGE (V)
20
25
1374 G15
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LT1374
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TYPICAL PERFOR A CE CHARACTERISTICS
VC Pin Shutdown Threshold
BOOST Pin Current
DUTY CYCLE = 100%
THRESHOLD VOLTAGE (V)
70
60
50
40
30
20
1.2
1.0
0.8
Kool Mµ
0
1
3
2
4
SWITCH CURRENT (A)
5
0.4
0.01
0.2
CORE LOSS IS
INDEPENDENT OF LOAD
CURRENT UNTIL LOAD CURRENT FALLS
LOW ENOUGH FOR CIRCUIT TO GO INTO
DISCONTINUOUS MODE
0.6
0.4
–50
2
1.2
0.8
®
PERMALLOY
µ = 125
10
0
4
TYPE 52
POWDERED IRON
0.1
0.12
0.08
0.04
0.001
–25
0
25
50
75
100
JUNCTION TEMPERATURE (°C)
1374 G16
125
1374 G11
CORE LOSS (% OF 5W LOAD)
80
20
12
8
VOUT = 5V, VIN = 10V, IOUT = 1A
SHUTDOWN
90
BOOST PIN CURRENT (mA)
Inductor Core Loss
1.0
1.4
CORE LOSS (W)
100
0.02
0
5
10
15
INDUCTANCE (µH)
20
25
1374 G01
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PI FU CTIO S
FB/SENSE: The feedback pin is the input to the error
amplifier which is referenced to an internal 2.42V source.
An external resistive divider is used to set the output
voltage. The fixed voltage (-5) parts have the divider
included on-chip and the FB pin is used as a SENSE pin,
connected directly to the 5V output. Three additional
functions are performed by the FB pin. When the pin
voltage drops below 1.7V, switch current limit is reduced.
Below 1.5V the external sync function is disabled. Below
1V, switching frequency is also reduced. See Feedback Pin
Function section in Applications Information for details.
BOOST: The BOOST pin is used to provide a drive voltage,
higher than the input voltage, to the internal bipolar NPN
power switch. Without this added voltage, the typical
switch voltage loss would be about 1.5V. The additional
boost voltage allows the switch to saturate and voltage
loss approximates that of a 0.07Ω FET structure. Efficiency improves from 75% for conventional bipolar designs to > 89% for these new parts.
VIN: This is the collector of the on-chip power NPN switch.
This pin powers the internal circuitry and internal regulator
when the BIAS pin is not present. At NPN switch on and off,
high dI/dt edges occur on this pin. Keep the external
bypass and catch diode close to this pin. All trace inductance on this path will create a voltage spike at switch off,
adding to the VCE voltage across the internal NPN. Both VIN
6
pins of the 16-lead TSSOP package must be shorted
together on the PC board.
GND: The GND pin connection needs consideration for
two reasons. First, it acts as the reference for the regulated
output, so load regulation will suffer if the “ground” end of
the load is not at the same voltage as the GND pin of the
IC. This condition will occur when load current or other
currents flow through metal paths between the GND pin
and the load ground point. Keep the ground path short
between the GND pin and the load and use a ground plane
when possible. The second consideration is EMI caused
by GND pin current spikes. Internal capacitance between
the VSW pin and the GND pin creates very narrow (100MHz oscilloscope must be used, and waveforms
should be observed on the leads of the package. This
switch off spike will also cause the SW node to go below
ground. The LT1374 has special circuitry inside which
mitigates this problem, but negative voltages over 1V
lasting longer than 10ns should be avoided. Note that
100MHz oscilloscopes are barely fast enough to see the
details of the falling edge overshoot in Figure 7.
A second, much lower frequency ringing is seen during
switch off time if load current is low enough to allow the
inductor current to fall to zero during part of the switch off
time (see Figure 8). Switch and diode capacitance resonate with the inductor to form damped ringing at 1MHz to
10 MHz. This ringing is not harmful to the regulator and it
has not been shown to contribute significantly to EMI. Any
attempt to damp it with a resistive snubber will degrade
efficiency.
INPUT BYPASSING AND VOLTAGE RANGE
Input Bypass Capacitor
Step-down converters draw current from the input supply
in pulses. The average height of these pulses is equal to
load current, and the duty cycle is equal to VOUT/ VIN. Rise
and fall time of the current is very fast. A local bypass
capacitor across the input supply is necessary to ensure
proper operation of the regulator and minimize the ripple
RISE AND FALL
WAVEFORMS ARE
SUPERIMPOSED
(PULSE WIDTH IS
NOT 120ns)
5V/DIV
20ns/DIV
1374 F07
Figure 7. Switch Node Resonance
5V/DIV
SWITCH NODE
VOLTAGE
INDUCTOR
CURRENT
100mA/DIV
20ns/DIV
1375/76 F11
0.5µs/DIV
1374 F08
Figure 8. Discontinuous Mode Ringing
current fed back into the input supply. The capacitor also
forces switching current to flow in a tight local loop,
minimizing EMI.
Do not cheat on the ripple current rating of the Input
bypass capacitor, but also don’t get hung up on the value
in microfarads. The input capacitor is intended to absorb
all the switching current ripple, which can have an RMS
value as high as one half of load current. Ripple current
ratings on the capacitor must be observed to ensure
reliable operation. In many cases it is necessary to parallel
two capacitors to obtain the required ripple rating. Both
capacitors must be of the same value and manufacturer to
guarantee power sharing. The actual value of the capacitor
in microfarads is not particularly important because at
500kHz, any value above 5µF is essentially resistive. RMS
ripple current rating is the critical parameter. Actual RMS
current can be calculated from:
1374fd
19
LT1374
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APPLICATIONS INFORMATION
The term inside the radical has a maximum value of 0.5
when input voltage is twice output, and stays near 0.5 for
a relatively wide range of input voltages. It is common
practice therefore to simply use the worst-case value and
assume that RMS ripple current is one half of load current.
At maximum output current of 4.5A for the LT1374, the
input bypass capacitor should be rated at 2.25A ripple
current. Note however, that there are many secondary
considerations in choosing the final ripple current rating.
These include ambient temperature, average versus peak
load current, equipment operating schedule, and required
product lifetime. For more details, see Application Notes
19 and 46, and Design Note 95.
Larger capacitors may be necessary when the input voltage is very close to the minimum specified on the data
sheet. Small voltage dips during switch on time are not
normally a problem, but at very low input voltage they may
cause erratic operation because the input voltage drops
below the minimum specification. Problems can also
occur if the input-to-output voltage differential is near
minimum. The amplitude of these dips is normally a
function of capacitor ESR and ESL because the capacitive
reactance is small compared to these terms. ESR tends to
be the dominate term and is inversely related to physical
capacitor size within a given capacitor type.
SYNCHRONIZING (Available as -SYNC Option)
Input Capacitor Type
Some caution must be used when selecting the type of
capacitor used at the input to regulators. Aluminum
electrolytics are lowest cost, but are physically large to
achieve adequate ripple current rating, and size constraints (especially height), may preclude their use.
Ceramic capacitors are now available in larger values, and
their high ripple current and voltage rating make them
ideal for input bypassing. Cost is fairly high and footprint
may also be somewhat large. Solid tantalum capacitors
would be a good choice, except that they have a history of
occasional spectacular failures when they are subjected to
large current surges during power-up. The capacitors can
short and then burn with a brilliant white light and lots of
nasty smoke. This phenomenon occurs in only a small
percentage of units, but it has led some OEM companies
to forbid their use in high surge applications. The input
bypass capacitor of regulators can see these high surges
when a battery or high capacitance source is connected.
Several manufacturers have developed a line of solid
tantalum capacitors specially tested for surge capability
(AVX TPS series for instance, see Table 3), but even these
units may fail if the input voltage surge approaches the
maximum voltage rating of the capacitor. AVX recommends derating capacitor voltage by 2:1 for high surge
applications. The highest voltage rating is 50V, so 25V
may be a practical upper limit when using solid tantalum
capacitors for input bypassing.
The LT1374-SYNC has the SHDN pin replaced with a
SYNC pin, which is used to synchronize the internal
oscillator to an external signal. The SYNC input must pass
from a logic level low, through the maximum synchronization threshold with a duty cycle between 10% and 90%.
The input can be driven directly from a logic level output.
The synchronizing range is equal to initial operating frequency up to 1MHz. This means that minimum practical
sync frequency is equal to the worst-case high selfoscillating frequency (550kHz), not the typical operating
frequency of 500kHz. Caution should be used when synchronizing above 700kHz because at higher sync frequencies the amplitude of the internal slope compensation
used to prevent subharmonic switching is reduced. This
type of subharmonic switching only occurs at input voltages less than twice output voltage. Higher inductor
values will tend to eliminate this problem. See Frequency
Compensation section for a discussion of an entirely
different cause of subharmonic switching before assuming that the cause is insufficient slope compensation.
Application Note 19 has more details on the theory of slope
compensation.
At power-up, when VC is being clamped by the FB pin (see
Figure 2, Q2), the sync function is disabled. This allows the
frequency foldback to operate in the shorted output condition. During normal operation, switching frequency is
controlled by the internal oscillator until the FB pin reaches
1.5V, after which the SYNC pin becomes operational. If no
synchronization is required, this pin should be connected
to ground.
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THERMAL CALCULATIONS
Power dissipation in the LT1374 chip comes from four
sources: switch DC loss, switch AC loss, boost circuit
current, and input quiescent current. The following formulas show how to calculate each of these losses. These
formulas assume continuous mode operation, so they
should not be used for calculating efficiency at light load
currents.
Switch loss:
Thermal resistance for LT1374 package is influenced by
the presence of internal or backside planes. With a full
plane under the 16-lead TSSOP package, thermal resistance will be about 40°C/W. To calculate die temperature,
use the proper thermal resistance number for the desired
package and add in worst-case ambient temperature:
TJ = TA + θJA (PTOT)
With the TSSOP16 package (θJA = 40°C/W), at an ambient
temperature of 50°C,
TJ = 50 + 40 (0.87) = 85°C
Boost current loss:
For the DD package with a good copper plane under the
device, thermal resistance will be about 30°C/W. For the
conditions above:
TJ = 50 + 30 (0.87) = 76°C
Die temperature is highest at low input voltage, so use
lowest continuous input operating voltage for thermal
calculations.
Quiescent current loss:
FREQUENCY COMPENSATION
RSW = Switch resistance (≈ 0.07)
24ns = Equivalent switch current/voltage overlap time
f = Switch frequency
Example: with VIN = 10V, VOUT = 5V and IOUT = 3A:
Loop frequency compensation of switching regulators
can be a rather complicated problem because the reactive
components used to achieve high efficiency also introduce multiple poles into the feedback loop. The inductor
and output capacitor on a conventional step-down converter actually form a resonant tank circuit that can exhibit
peaking and a rapid 180° phase shift at the resonant
frequency. By contrast, the LT1374 uses a “current mode”
architecture to help alleviate phase shift created by the
inductor. The basic connections are shown in Figure 9.
Figure 10 shows a Bode plot of the phase and gain of the
power section of the LT1374, measured from the VC pin to
the output. Gain is set by the 5.3A/V transconductance of
the LT1374 power section and the effective complex
impedance from output to ground. Gain rolls off smoothly
above the 600Hz pole frequency set by the 100µF output
capacitor. Phase drop is limited to about 70°. Phase
recovers and gain levels off at the zero frequency (≈16kHz)
set by capacitor ESR (0.1Ω).
Total power dissipation is 0.68 + 0.15 + 0.04 = 0.87W.
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Error amplifier transconductance phase and gain are
shown in Figure 11. The error amplifier can be modeled
as a transconductance of 2000µMho, with an output
impedance of 200kΩ in parallel with 12pF. In all practical
applications, the compensation network from VC pin to
ground has a much lower impedance than the output
impedance of the amplifier at frequencies above 500Hz.
This means that the error amplifier characteristics themselves do not contribute excess phase shift to the loop, and
the phase/gain characteristics of the error amplifier section are completely controlled by the external compensation network.
In Figure 12, full loop phase/gain characteristics are
shown with a compensation capacitor of 1.5nF, giving the
error amplifier a pole at 530Hz, with phase rolling off to 90°
and staying there. The overall loop has a gain of 74dB at
low frequency, rolling off to unity-gain at 100kHz. Phase
shows a two-pole characteristic until the ESR of the output
capacitor brings it back above 10kHz. Phase margin is
about 75° at unity-gain.
Analog experts will note that around 4.4kHz, phase dips
very close to the zero phase margin line. This is typical of
switching regulators, especially those that operate over a
wide range of loads. This region of low phase is not a
problem as long as it does not occur near unity-gain. In
practice, the variability of output capacitor ESR tends to
dominate all other effects with respect to loop response.
Variations in ESR will cause unity-gain to move around,
but at the same time phase moves with it so that adequate
phase margin is maintained over a very wide range of ESR
(≥ ±3:1).
LT1374
3000
VSW
150
ESR
2.42V
+
GAIN
2000
100
VC
1500
–
+
C1
(
1000
R2
ROUT
200k
)
VFB 2 × 10–3
COUT
12pF
ERROR AMPLIFIER EQUIVALENT CIRCUIT
1k
10k
100k
FREQUENCY (Hz)
Figure 9. Model for Loop Response
1374 F11
20
40
0
–40
PHASE
–20
–80
100
1k
10k
FREQUENCY (Hz)
100k
–120
1M
1374 F10
Figure 10. Response from VC Pin to Output
200
GAIN
60
150
40
100
PHASE
20
50
VIN = 10V
VOUT = 5V, IOUT = 2A
COUT = 100µF, 10V, AVX TPS
CC = 1.5nF, RC = 0, L = 10µH
0
–20
10
100
1k
10k
FREQUENCY (Hz)
LOOP PHASE (DEG)
0
80
LOOP GAIN (dB)
GAIN
VIN = 10V
VOUT = 5V
IOUT = 2A
Figure 11. Error Amplifier Gain and Phase
PHASE: VC PIN TO OUTPUT (DEG)
GAIN: VC PIN TO OUTPUT (dB)
40
–50
10M
1M
1374 F09
10
0
RLOAD = 50Ω
500
100
CC
–40
50
PHASE (DEG)
FB
RC
CF
PHASE
2500
R1
VC
GND
200
OUTPUT
ERROR
AMPLIFIER
GAIN (µMho)
CURRENT MODE
POWER STAGE
gm = 5.3A/V
0
100k
–50
1M
1374 F12
Figure 12. Overall Loop Characteristics
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What About a Resistor in the Compensation Network?
It is common practice in switching regulator design to
add a “zero” to the error amplifier compensation to
increase loop phase margin. This zero is created in the
external network in the form of a resistor (RC) in series
with the compensation capacitor. Increasing the size of
this resistor generally creates better and better loop
stability, but there are two limitations on its value. First,
the combination of output capacitor ESR and a large
value for RC may cause loop gain to stop rolling off
altogether, creating a gain margin problem. An approximate formula for RC where gain margin falls to zero is:
GMP = Transconductance of power stage = 5.3A/V
GMA = Error amplifier transconductance = 2(10–3)
ESR = Output capacitor ESR
2.42 = Reference voltage
With VOUT = 5V and ESR = 0.03Ω, a value of 6.5k for RC
would yield zero gain margin, so this represents an upper
limit. There is a second limitation however which has
nothing to do with theoretical small signal dynamics.
This resistor sets high frequency gain of the error amplifier, including the gain at the switching frequency. If
switching frequency gain is high enough, output ripple
voltage will appear at the VC pin with enough amplitude
to muck up proper operation of the regulator. In the
marginal case, subharmonic switching occurs, as evidenced by alternating pulse widths seen at the switch
node. In more severe cases, the regulator squeals or
hisses audibly even though the output voltage is still
roughly correct. None of this will show on a theoretical
Bode plot because Bode is an amplitude insensitive
analysis. Tests have shown that if ripple voltage on the VC
is held to less than 100mVP-P, the LT1374 will be well
behaved. The formula below will give an estimate of VC
ripple voltage when RC is added to the loop, assuming
that RC is large compared to the reactance of CC at
500kHz.
GMA = Error amplifier transconductance (2000µMho)
If a computer simulation of the LT1374 showed that a
series compensation resistor of 3k gave best overall loop
response, with adequate gain margin, the resulting VC pin
ripple voltage with VIN = 10V, VOUT = 5V, ESR = 0.1Ω,
L = 10µH, would be:
This ripple voltage is high enough to possibly create
subharmonic switching. In most situations a compromise
value (< 2k in this case) for the resistor gives acceptable
phase margin and no subharmonic problems. In other
cases, the resistor may have to be larger to get acceptable
phase response, and some means must be used to control
ripple voltage at the VC pin. The suggested way to do this
is to add a capacitor (CF) in parallel with the RC /CC network
on the VC pin. Pole frequency for this capacitor is typically
set at one-fifth of switching frequency so that it provides
significant attenuation of switching ripple, but does not
add unacceptable phase shift at loop unity-gain frequency.
With RC = 3k,
How Do I Test Loop Stability?
The “standard” compensation for LT1374 is a 1.5nF
capacitor for CC, with RC = 0. While this compensation will
work for most applications, the “optimum” value for loop
compensation components depends, to various extent, on
parameters which are not well controlled. These include
inductor value (±30% due to production tolerance, load
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current and ripple current variations), output capacitance
(±20% to ±50% due to production tolerance, temperature, aging and changes at the load), output capacitor ESR
(±200% due to production tolerance, temperature and
aging), and finally, DC input voltage and output load
current . This makes it important for the designer to check
out the final design to ensure that it is “robust” and tolerant
of all these variations.
After verifying that the setup is working correctly, I start
varying load current and input voltage to see if I can find
any combination that makes the transient response look
suspiciously “ringy.” This procedure may lead to an adjustment for best loop stability or faster loop transient
response. Nearly always you will find that loop response
looks better if you add in several kΩ for RC. Do this only
if necessary, because as explained before, RC above 1k
may require the addition of CF to control VC pin ripple.
If everything looks OK, I use a heat gun and cold spray on
the circuit (especially the output capacitor) to bring out
any temperature-dependent characteristics.
I check switching regulator loop stability by pulse loading
the regulator output while observing transient response at
the output, using the circuit shown in Figure 13. The
regulator loop is “hit” with a small transient AC load
current at a relatively low frequency, 50Hz to 1kHz. This
causes the output to jump a few millivolts, then settle back
to the original value, as shown in Figure 14. A well behaved
loop will settle back cleanly, whereas a loop with poor
phase or gain margin will “ring” as it settles. The number
of rings indicates the degree of stability, and the frequency
of the ringing shows the approximate unity-gain frequency of the loop. Amplitude of the signal is not particularly important, as long as the amplitude is not so high that
the loop behaves nonlinearly.
Keep in mind that this procedure does not take initial
component tolerance into account. You should see fairly
clean response under all load and line conditions to ensure
that component variations will not cause problems. One
note here: according to Murphy, the component most
VOUT AT
IOUT = 500mA
BEFORE FILTER
VOUT AT
IOUT = 500mA
AFTER FILTER
VOUT AT
IOUT = 50mA
AFTER FILTER
LOAD PULSE
THROUGH 50Ω
f ≈ 780Hz
10mV/DIV
The output of the regulator contains both the desired low
frequency transient information and a reasonable amount
of high frequency (500kHz) ripple. The ripple makes it
difficult to observe the small transient, so a two-pole,
100kHz filter has been added. This filter is not particularly
critical; even if it attenuated the transient signal slightly,
this wouldn’t matter because amplitude is not critical.
5A/DIV
0.2ms/DIV
1374 F14
Figure 14. Loop Stability Check
RIPPLE FILTER
SWITCHING
REGULATOR
ADJUSTABLE
INPUT SUPPLY
ADJUSTABLE
DC LOAD
470Ω
+
100µF TO
1000µF
3300pF
TO X1
OSCILLOSCOPE
PROBE
4.7k
330pF
50Ω
TO
OSCILLOSCOPE
SYNC
100Hz TO 1kHz
100mV TO 1VP-P
1374 F13
Figure 13. Loop Stability Test Circuit
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likely to be changed in production is the output capacitor,
because that is the component most likely to have manufacturer variations (in ESR) large enough to cause problems. It would be a wise move to lock down the sources of
the output capacitor in production.
A possible exception to the “clean response” rule is at very
light loads, as evidenced in Figure 14 with ILOAD = 50mA.
Switching regulators tend to have dramatic shifts in loop
response at very light loads, mostly because the inductor
current becomes discontinuous. One common result is very
slow but stable characteristics. A second possibility is low
phase margin, as evidenced by ringing at the output with
transients. The good news is that the low phase margin at
light loads is not particularly sensitive to component variation, so if it looks reasonable under a transient test, it will
probably not be a problem in production. Note that frequency of the light load ringing may vary with component
tolerance but phase margin generally hangs in there.
Inverting regulators differ from buck regulators in the
basic switching network. Current is delivered to the output
as square waves with a peak-to-peak amplitude much
greater than load current. This means that maximum load
current will be significantly less than the LT1374’s 4.5A
maximum switch current, even with large inductor values.
The buck converter in comparison, delivers current to the
output as a triangular wave superimposed on a DC level
equal to load current, and load current can approach 4.5A
with large inductors. Output ripple voltage for the positiveto-negative converter will be much higher than a buck
converter. Ripple current in the output capacitor will also
be much higher. The following equations can be used to
calculate operating conditions for the positive-to-negative
converter.
Maximum load current:
POSITIVE-TO-NEGATIVE CONVERTER
The circuit in Figure 15 is a classic positive-to-negative
topology using a grounded inductor. It differs from the
standard approach in the way the IC chip derives its
feedback signal, however, because the LT1374 accepts
only positive feedback signals, the ground pin must be tied
to the regulated negative output. A resistor divider to
ground or, in this case, the sense pin, then provides the
proper feedback voltage for the chip.
D1
CMDSH-3
INPUT
5.5V TO
20V
C3
10µF TO
50µF
BOOST
VIN
C2
0.27µF
L1*
5µH
VSW
LT1374-5
+
GND
SENSE
VC
CC
RC
D2
MBRS330T3
+
D3
C1
100µF
10V TANT
×2
* INCREASE L1 TO 10µH OR 20µH FOR HIGHER CURRENT APPLICATIONS.
SEE APPLICATIONS INFORMATION
** MAXIMUM LOAD CURRENT DEPENDS ON MINIMUM INPUT VOLTAGE
AND INDUCTOR SIZE. SEE APPLICATIONS INFORMATION
IP = Maximum rated switch current
VIN = Minimum input voltage
VOUT = Output voltage
VF = Catch diode forward voltage
0.35 = Switch voltage drop at 4.5A
Example: with VIN(MIN) = 5.5V, VOUT = 5V, L = 10µH,
VF = 0.5V, IP = 4.5A: IMAX = 2A. Note that this equation does
not take into account that maximum rated switch current
(IP) on the LT1374 is reduced slightly for duty cycles
above 50%. If duty cycle is expected to exceed 50% (input
voltage less than output voltage), use the actual IP value
from the Electrical Characteristics table.
Operating duty cycle:
OUTPUT**
–5V, 1.8A
1374 F15
(This formula uses an average value for switch loss, so it
may be several percent in error.)
Figure 15. Positive-to-Negative Converter
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With the conditions above:
This duty cycle is close enough to 50% that IP can be
assumed to be 4.5A.
OUTPUT DIVIDER
If the adjustable part is used, the resistor connected to
VOUT (R2) should be set to approximately 5k. R1 is
calculated from:
INDUCTOR VALUE
lowest value of inductance that can be used, but in some
cases (lower output load currents) it may give a value that
creates unnecessarily high output ripple voltage. A compromise value is often chosen that reduces output ripple.
As you can see from the graph, large inductors will not
give arbitrarily low ripple, but small inductors can give
high ripple.
The difficulty in calculating the minimum inductor size
needed is that you must first know whether the switcher
will be in continuous or discontinuous mode at the critical
point where switch current is 4.5A. The first step is to use
the following formula to calculate the load current where
the switcher must use continuous mode. If your load
current is less than this, use the discontinuous mode
formula to calculate minimum inductor needed. If load
current is higher, use the continuous mode formula.
Output current where continuous mode is needed:
Unlike buck converters, positive-to-negative converters
cannot use large inductor values to reduce output ripple
voltage. At 500kHz, values larger than 25µH make almost
no change in output ripple. The graph in Figure 16 shows
peak-to-peak output ripple voltage for a 5V to – 5V converter versus inductor value. The criteria for choosing the
inductor is therefore typically based on ensuring that peak
switch current rating is not exceeded. This gives the
Minimum inductor discontinuous mode:
OUTPUT RIPPLE VOLTAGE (mVP-P)
250
5V TO – 5V CONVERTER
OUTPUT CAPACITOR’S
ESR = 0.05Ω
200
Minimum inductor continuous mode:
150
ILOAD = 1A
100
ILOAD = 0.25A
50
For the example above, with maximum load current of 1A:
0
0
5
15
10
INDUCTOR SIZE (µH)
20
1374 F16
Figure 16. Ripple Voltage on Positive-to-Negative Converter
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This says that discontinuous mode can be used and the
minimum inductor needed is found from:
In practice, the inductor should be increased by about 30%
over the calculated minimum to handle losses and variations in value. This suggests a minimum inductor of 1.3µH
for this application, but looking at the ripple voltage chart
shows that output ripple voltage could be reduced by a factor of two by using a 15µH inductor. There is no rule of thumb
here to make a final decision. If modest ripple is needed and
the larger inductor does the trick, go for it. If ripple is noncritical use the smaller inductor. If ripple is extremely critical, a second filter may have to be added in any case, and
the lower value of inductance can be used. Keep in mind
that the output capacitor is the other critical factor in determining output ripple voltage. Ripple shown on the graph
(Figure 16) is with two parallel capacitor’s ESR of 0.1Ω. This
is reasonable for AVX type TPS “D” or “E” size surface mount
solid tantalum capacitors, but the final capacitor chosen
must be looked at carefully for ESR characteristics.
somewhat higher ripple current, especially in discontinuous mode. The exact formulas are very complex and
appear in Application Note 44, pages 30 and 31. For our
purposes here I have simply added a fudge factor (ff). The
value for ff is about 1.2 for higher load currents and
L ≥10µH. It increases to about 2.0 for smaller inductors at
lower load currents.
ff = Fudge factor (1.2 to 2.0)
Diode Current
Average diode current is equal to load current. Peak diode
current will be considerably higher.
Peak diode current:
Ripple Current in the Input and Output Capacitors
Positive-to-negative converters have high ripple current in
both the input and output capacitors. For long capacitor
lifetime, the RMS value of this current must be less than
the high frequency ripple current rating of the capacitor.
The following formula will give an approximate value for
RMS ripple current. This formula assumes continuous
mode and large inductor value. Small inductors will give
Keep in mind that during start-up and output overloads,
average diode current may be much higher than with
normal loads. Care should be used if diodes rated less than
3A are used, especially if continuous overload conditions
must be tolerated.
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FE Package
16-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1663,
Exposed Pad Variation BB)
4.90 – 5.10*
(.193 – .201)
3.58
(.141)
3.58
(.141)
16 1514 13 12 1110
6.60 ±0.10
9
2.94
(.116)
4.50 ±0.10
2.94 6.40
(.116) (.252)
BSC
SEE NOTE 4
0.45 ±0.05
1.05 ±0.10
0.65 BSC
1 2 3 4 5 6 7 8
RECOMMENDED SOLDER PAD LAYOUT
4.30 – 4.50*
(.169 – .177)
0.09 – 0.20
(.0035 – .0079)
0.50 – 0.75
(.020 – .030)
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS
MILLIMETERS
2. DIMENSIONS ARE IN
(INCHES)
3. DRAWING NOT TO SCALE
0.25
REF
1.10
(.0433)
MAX
0° – 8°
0.65
(.0256)
BSC
0.195 – 0.30
(.0077 – .0118)
TYP
0.05 – 0.15
(.002 – .006)
FE16 (BB) TSSOP 0204
4. RECOMMENDED MINIMUM PCB METAL SIZE
FOR EXPOSED PAD ATTACHMENT
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.150mm (.006") PER SIDE
1374fd
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PACKAGE DESCRIPTION
R Package
7-Lead Plastic DD Pak
(LTC DWG # 05-08-1462)
.256
(6.502)
.060
(1.524)
TYP
.060
(1.524)
.390 – .415
(9.906 – 10.541)
.165 – .180
(4.191 – 4.572)
.045 – .055
(1.143 – 1.397)
15° TYP
.060
(1.524)
.183
(4.648)
+.008
.004 –.004
+0.203
0.102 –0.102
.059
(1.499)
TYP
.330 – .370
(8.382 – 9.398)
(
)
.095 – .115
(2.413 – 2.921)
.075
(1.905)
.300
(7.620)
+.012
.143 –.020
+0.305
3.632 –0.508
BOTTOM VIEW OF DD PAK
HATCHED AREA IS SOLDER PLATED
COPPER HEAT SINK
(
.026 – .035
(0.660 – 0.889)
TYP
)
.050
(1.27)
BSC
.013 – .023
(0.330 – 0.584)
.050 ± .012
(1.270 ± 0.305)
R (DD7) 0502
.420
.080
.420
.276
.350
.325
.205
.565
.565
.320
.090
.050
.035
RECOMMENDED SOLDER PAD LAYOUT
NOTE:
1. DIMENSIONS IN INCH/(MILLIMETER)
2. DRAWING NOT TO SCALE
.090
.050
.035
RECOMMENDED SOLDER PAD LAYOUT
FOR THICKER SOLDER PASTE APPLICATIONS
1374fd
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PACKAGE DESCRIPTION
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
.189 – .197
(4.801 – 5.004)
NOTE 3
.045 ±.005
.050 BSC
8
.245
MIN
7
6
5
.160 ±.005
.150 – .157
(3.810 – 3.988)
NOTE 3
.228 – .244
(5.791 – 6.197)
.030 ±.005
TYP
1
RECOMMENDED SOLDER PAD LAYOUT
.010 – .020
× 45°
(0.254 – 0.508)
.008 – .010
(0.203 – 0.254)
0°– 8° TYP
.016 – .050
(0.406 – 1.270)
NOTE:
1. DIMENSIONS IN
.053 – .069
(1.346 – 1.752)
.014 – .019
(0.355 – 0.483)
TYP
INCHES
(MILLIMETERS)
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
2
3
4
.004 – .010
(0.101 – 0.254)
.050
(1.270)
BSC
SO8 0303
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PACKAGE DESCRIPTION
T7 Package
7-Lead Plastic TO-220 (Standard)
(LTC DWG # 05-08-1422)
.390 – .415
(9.906 – 10.541)
.165 – .180
(4.191 – 4.572)
.147 – .155
(3.734 – 3.937)
DIA
.045 – .055
(1.143 – 1.397)
.230 – .270
(5.842 – 6.858)
.460 – .500
(11.684 – 12.700)
.570 – .620
(14.478 – 15.748)
.330 – .370
(8.382 – 9.398)
.620
(15.75)
TYP
.700 – .728
(17.780 – 18.491)
.095 – .115
(2.413 – 2.921)
.155 – .195*
(3.937 – 4.953)
SEATING PLANE
.152 – .202
.260 – .320 (3.860 – 5.130)
(6.604 – 8.128)
BSC
.050
(1.27)
.026 – .036
(0.660 – 0.914)
.135 – .165
(3.429 – 4.191)
.013 – .023
(0.330 – 0.584)
*MEASURED AT THE SEATING PLANE
T7 (TO-220) 0801
1374fd
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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TYPICAL APPLICATION
Dual Output SEPIC Converter
losses. C4 provides a low impedance path to maintain an
equal voltage swing in L1B, improving regulation. In a
flyback converter, during switch on time, all the converter’s
energy is stored in L1A only, since no current flows in L1B.
At switch off, energy is transferred by magnetic coupling
into L1B, powering the – 5V rail. C4 pulls L1B positive
during switch on time, causing current to flow, and energy
to build in L1B and C4. At switch off, the energy stored in
both L1B and C4 supply the – 5V rail. This reduces the
current in L1A and changes L1B current waveform from
square to triangular. For details on this circuit see Design
Note 100.
The circuit in Figure 17 generates both positive and
negative 5V outputs with a single piece of magnetics. The
two inductors shown are actually just two windings on a
standard BH Electronics inductor. The topology for the 5V
output is a standard buck converter. The – 5V topology
would be a simple flyback winding coupled to the buck
converter if C4 were not present. C4 creates the SEPIC
(Single-Ended Primary Inductance Converter) topology
which improves regulation and reduces ripple current in
L1. Without C4, the voltage swing on L1B compared to
L1A would vary due to relative loading and coupling
INPUT
6V TO 25V
VIN
BOOST
C2
0.27µF
+
L1A*
6.8µH
SENSE
VC
C3
22µF
35V TANT
OUTPUT
5V
VSW
LT1374-5 BIAS
SHDN
GND
D2
CMDSH-3
RC
470Ω
CC
0.01µF
+
C1**
100µF
10V TANT
+
C5**
100µF
10V TANT
D1
MBRD340
GND
* L1 IS A SINGLE CORE WITH TWO WINDINGS
BH ELECTRONICS #501-0726
** TOKIN IE475ZY5U-C304
†
IF LOAD CAN GO TO ZERO, AN OPTIONAL
PRELOAD OF 1k TO 5k MAY BE USED TO
IMPROVE LOAD REGULATION
C4**
4.7nF
+
L1B* D3
MBRD340
OUTPUT
–5V†
1374 F17
Figure 17. Dual Output SEPIC Converter
RELATED PARTS
PART NUMBER
DESCRIPTION
LT1074/LT1076
Step-Down Switching Regulators
LTC®1148
High Efficiency Synchronous Step-Down Switching Regulator
LTC1149
High Efficiency Synchronous Step-Down Switching Regulator
LTC1174
High Efficiency Step-Down and Inverting DC/DC Converter
LT1176
Step-Down Switching Regulator
LT1370
High Efficiency DC/DC Converter
LT1371
High Efficiency DC/DC Converter
LT1372/LT1377
500kHz and 1MHz High Efficiency 1.5A Switching Regulators
LTC1735
High Efficiency Step-Down Converter
LT1765
3A Step-Down Switching Regulator
LT1766
1.5A Step-Down Switching Regulator
LT1767
1.5A Step-Down Switching Regulator
Burst Mode is a registered trademark of Linear Technology Corporation.
COMMENTS
40V Input, 100kHz, 5A and 2A
External FET Switches
External FET Switches
0.5A, 150kHz Burst Mode® Operation
PDIP LT1076
42V, 6A, 500kHz Switch
35V, 3A, 500kHz Switch
Boost Topology
External Switches, Very High Efficiency
1.25MHz, 3A, 25V Input, SO-8 and TSSOP16 Packages
200kHz, 1.5A, 60V Input, SO-8 and GN16 Packages
1.25MHz, 1.5A, 25V Input, MS8 Package
1374fd
32
Linear Technology Corporation
LT/TP 0804 1K REV D • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
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