LT3572EUF#PBF

LT3572 Dual Full-Bridge Piezo Driver with 900mA Boost Converter FEATURES ■ ■ ■ ■ ■ ■ ■ ■ DESCRIPTION 2.7V to 10V Input Voltage Range 900mA Boost Converter Dual Full-Bridge Piezo Drivers Programmable Switching Frequency from 500kHz to 2.25MHz Synchronizable Up to 2.5MHz Soft-Start Separate Enable for Each Piezo Driver and Boost Converter Available in a 4mm × 4mm 20-Pin QFN Package The LT®3572 is a highly integrated dual Piezo motor driver capable of driving two Piezo motors at up to 40V from a 5V supply. Each Piezo driver can be independently turned on or off along with the boost converter. The boost regulator has a soft-start capability that limits the inrush current at start-up. The boost regulator switching frequency is set by an external resistor or the frequency can be synchronized by an external clock. A PGOOD pin indicates when the output of the boost converter is in regulation and the Piezo drivers are allowed to start switching. The LT3572 is available in a (4mm × 4mm) 20-pin QFN package. APPLICATIONS ■ Piezo Motor Drive , LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. TYPICAL APPLICATION Dual Piezo Driver 10μH VIN 3V TO 5V 100k 4.7μF 42.2k VIN SHDN SHDNA SHDNB PWMA PWMB SYNC PGOOD VOUT 30V 50mA SW VOUT 576k 10μF FB OUTA VOUTA 20V/DIV 24.3k LT3572 OUTA RT OUTB SS OUTB 10nF 15pF Response Driving Piezo Motor at 70kHz GND 3572 TA01a VOUTA 20V/DIV PWMA 2V/DIV 2μs/DIV 3572 TA01b 3572fa 1 LT3572 PIN CONFIGURATION VOUT Voltage .............................................................40V OUTA, OUTA, OUTB, OUTB Voltage ...........................40V SW Voltage ...............................................................42V RT, SS, SYNC ..............................................................2V FB ...............................................................................3V All Other Pins ............................................................10V Maximum Junction Temperature........................... 125°C Operating Temperature Range (Note 2).... –40°C to 85°C Storage Temperature Range................... –65°C to 125°C OUTB OUTB OUTA OUTA GND TOP VIEW 20 19 18 17 16 15 PGOOD SW 1 14 SS VIN 2 13 FB 21 SYNC 3 11 SHDNA 7 8 9 10 SHDN 6 GND 12 SHDNB GND 5 VOUT RT 4 PWMA (Note 1) PWMB ABSOLUTE MAXIMUM RATINGS UF PACKAGE 20-LEAD (4mm s 4mm) PLASTIC QFN TJMAX = 125°C, θJA = 37°C/W EXPOSED PAD (PIN 21) IS GND, MUST BE SOLDERED TO PCB ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE LT3572EUF#PBF LT3572EUF#TRPBF 3572 20-Lead (4mm × 4mm) Plastic DFN –40°C to 85°C Consult LTC Marketing for parts specified with wider operating temperature ranges. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 5V, VSHDNA= VSHDNB = VSHDN = 5V, unless otherwise noted. PARAMETER CONDITIONS MIN ● Minimum Operating Voltage VIN Quiescent Current VFB = 1.3V VIN Shutdown Current VSHDN = VSHDNA = VSHDNB = 0V TYP MAX UNITS 2.5 2.7 3.4 4 mA 0 1 μA V SHDN Pin Threshold 0.3 1.5 V SHDNA Pin Threshold 0.3 1.5 V SHDNB Pin Threshold 0.3 1.5 V SHDN Pin Bias Current VSHDN = 5V, VSHDNA = 0V, VSHDNB = 0V VSHDN = 0V, VSHDNA = 0V, VSHDNB = 0V 8 0.1 15 1 μA μA SHDNA Pin Bias Current VSHDN = 0V, VSHDNA = 5V, VSHDNB = 0V VSHDN = 0V, VSHDNA = 0V, VSHDNB = 0V 8 0.1 15 1 μA μA SHDNB Pin Bias Current VSHDN = 0V, VSHDNA = 0V, VSHDNB = 5V VSHDN= 0V, VSHDNA = 0V, VSHDNB = 0V 8 0.1 15 1 μA μA 3572fa 2 LT3572 ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 5V, VSHDNA= VSHDNB = VSHDN = 5V, unless otherwise noted. PARAMETER CONDITIONS MIN PWMA Pin Threshold TYP 0.3 PWMB Pin Threshold 0.3 MAX UNITS 1.5 V 1.5 V PGOOD Rising Threshold (Note 3) ● 1.12 1.16 1.19 V PGOOD Falling Threshold (Note 4) ● 1.01 1.04 1.065 V 1 3 kΩ 500 2.25 575 2.6 kHz MHz PGOOD Resistance ● Switching Frequency RT = 75.0kΩ RT = 13.0kΩ ● ● 425 1.9 Maximum Duty Cycle RT = 75.0kΩ RT = 13.0kΩ ● ● 95 85 Synchronization Frequency SYNC Pin Thresholds (Note 5) % % 575 2500 0.3 1.5 SS Current 4.5 ● FB Pin Voltage 1.195 kHz V μA 1.225 1.255 V 0.01 0.05 %/V 50 200 nA 1.3 1.7 A FB Pin Voltage Line Regulation VIN = 2.5V to 10V FB Pin Bias Current VFB = 1.225V (Note 6) SW Current Limit (Note 7) SW VCESAT ISW = 800mA 310 450 mV SW Leakage Current SW = 40V 0.2 5 μA OUTx Rise Time C = 2.2nF, VOUT = 30V (Note 8) 120 ns OUTx Fall Time C = 2.2nF, VOUT = 30V (Note 8) 120 ns Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LT3572 is guaranteed to meet specified performance from 0°C to 70°C operating junction temperature. Specifications over the –40°C to 85°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. 0.9 Note 3: Rising threshold voltage on FB pin that pulls PGOOD low. Note 4: Falling threshold voltage on FB pin that causes a high impedance on PGOOD. Note 5: Minimum pulse width is 100ns. Maximum off pulse width is 100ns. Note 6: Current flows into the pin. Note 7: Current limit guaranteed by design and/or correlation to static test. Note 8: OUTx refers to OUTA, OUTA, OUTB, OUTB. 3572fa 3 LT3572 TYPICAL PERFORMANCE CHARACTERISTICS Feedback Pin Voltage vs Temperature Oscillator Frequency vs Temperature 1.25 2.5 SS Pin Current vs Temperature 8 RT = 13k 7 1.23 1.22 1.21 SS PIN CURRENT (μA) 2.0 FREQUENCY (MHz) FEEDBACK VOLTAGE (V) 1.24 1.5 RT = 35k 1.0 6 5 4 3 2 0.5 1 0 0 –50 –25 25 50 75 100 125 150 TEMPERATURE (°C) 0 3572 G01 1.6 VSHDN = 5V 9 SHDN PIN CURRENT (μA) 3.5 QUIESCENT CURRENT (mA) SW Current Limit vs Temperature 10 2.5 2.0 1.5 1.0 1.4 8 7 6 5 VSHDN = 2.5V 4 3 0.5 1.0 0.8 0.6 0.2 1 25 50 75 100 125 150 TEMPERATURE (°C) 1.2 0.4 2 0 25 50 75 100 125 150 TEMPERATURE (°C) 3572 G03 SHDN Pin Current vs Temperature Quiescent Current vs Temperature 3.0 0 3572 G02 4.0 0 –50 –25 0 –50 –25 25 50 75 100 125 150 TEMPERATURE (°C) PEAK CURRENT (A) 1.20 –50 –25 0 –50 –25 3572 G04 0 25 50 75 100 125 150 TEMPERATURE (°C) 0 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) 3572 G06 3572 G05 SW Saturation Voltage vs Temperature Start-Up SWITCH SATURATION VOLTAGE (V) 0.50 0.45 IIN 200mA/DIV 0.40 ISW = 800mA 0.35 VOUT 20V/DIV 0.30 VOUTA 20V/DIV 0.25 ISW = 400mA 0.20 PGOOD 5V/DIV 0.15 0.10 200μs/DIV 0.05 0 –50 –25 0 3572 G08 25 50 75 100 125 150 TEMPERATURE (°C) 3572 G07 3572fa 4 LT3572 PIN FUNCTIONS SW (Pin 1): Switch Node. This pin connects to the collector of an internal NPN power switch. VIN (Pin 2): Input Supply Pin. This pin must be locally bypassed with a capacitor. SYNC (Pin 3): Synchronization Pin. This pin is used to synchronize the internal oscillator to an external signal. The synchronizing range is 15% above the free running frequency set by the RT pin up to 2.5MHz. If not used, this pin must be tied to GND. SHDNB (Pin 12): Shutdown Pin. Tie to 1.5V or more to enable OUTB and OUTB. Pull low to place OUTB and OUTB in a high impedance state. FB (Pin 13): Feedback Pin. The LT3572 regulates this pin to 1.225V. Connect the feedback resistors to this pin to set the output voltage for the switching regulator. SS (Pin 14): Soft-Start Pin. Place a soft-start capacitor here. A capacitor on the soft-start pin slowly ramps the current limit of the part from 0A to 1.3A. RT (Pin 4): Frequency Set Pin. Place a resistor to GND to set the internal frequency. The range of oscillation is 500kHz to 2.25MHz. PGOOD (Pin 15): This pin is an open-drain output that pulls low when the FB pin is within 95% of its regulation value. GND (Pins 5, 9, 20): Ground. OUTB (Pin 16): The Output Driver. This node switches between VOUT and GND and is inverted from OUTB. PWMB (Pin 6): Logic Input for the Driver. A high signal on this input sets OUTB high and OUTB low. PWMA (Pin 7): Logic Input for the Driver. A high signal on this input sets OUTA high and OUTA low. VOUT (Pin 8): Output for the Switching Regulator and the Input Supply for the Drivers. SHDN (Pin 10): Shutdown Pin. Tie to 1.5V or more to enable the switcher. Pull low to disable the switcher. SHDNA (Pin 11): Shutdown Pin. Tie to 1.5V or more to enable OUTA and OUTA. Pull low to place OUTA and OUTA in a high impedance state. OUTB (Pin 17): The Output Driver. This node switches between VOUT and GND. OUTA (Pin 18): The Output Driver. This node switches between VOUT and GND . OUTA (Pin 19): The Output Driver. This node switches between VOUT and GND and is inverted from OUTA. Exposed Pad (Pin 21): Ground. The Exposed Pad of the package provides both electrical contact to ground and good thermal contact to the printed circuit board. The Exposed Pad must be soldered to the circuit board for proper operation. 3572fa 5 LT3572 BLOCK DIAGRAM 8 7 VOUT 10 PWMA 11 SHDN 12 SHDNA SHDNB VIN START-UP/ INTERNAL BIAS A6 2 Q2 18 L1 OUTA SW A4 + Q3 S Q1 Q A2 1 R – 19 R4 D1 Q4 + OUTA A3 Q5 R5 – GND 5 GND 9 GND 20 + Q6 17 OUTB OSCILLATOR VOUT GND 21 R1 A1 FB – RC A5 Q7 1.225V CC SS Q10 C1 13 R2 14 C2 – Q8 16 OUTB 95%/85% A7 + Q9 PWMB 6 RT 4 SYNC 3 PGOOD 15 R3 3572 F01 Figure 1. Block Diagram 3572fa 6 LT3572 OPERATION Switching Regulator The LT3572 uses a constant frequency, current mode, control scheme to provide excellent line and load regulation for the output drivers. Operation can be best understood by referring to the Block Diagram in Figure 1. A pulse from the oscillator sets the RS flip-flop, A4, and turns on the internal NPN bipolar power switch, Q1. Current in Q1 and the external inductor, L1, begins to increase. When this current exceeds a level determined by the voltage at the output of the error amplifier A1, comparator A2 resets A4, turning Q1 off. The current in L1 flows through the external Schottky diode D1 and begins to decrease. The cycle begins again at the next pulse from the oscillator. In this way, the voltage at the output of the error amplifier controls the current through the indictor to the output. The soft-start capacitor, C2, clamps the output of the error amplifier causing the current limit to slowly increase. This helps reduce overshoot on the output and helps minimize inrush current on the input. Output Drivers The function of the driver section is to level shift the input of the PWM pins to the voltage of the VOUT pin. The drivers operate in an H-bridge fashion, where the OUTA and OUTB pins are the same polarity as the PWMA and PWMB pins respectively and the OUTA and OUTB are inverted from PWMA and PWMB respectively. The OUT pins will be high impedance until the FB pin is within 95% of its regulated voltage. The OUT pins will follow PWMA and PWMB as long as FB stays within 85% of the regulated voltage. If FB drops below 85%, the OUT pins will go high impedance. 3572fa 7 LT3572 APPLICATIONS INFORMATION Duty Cycle 10000 DC = SWITCHING FREQUENCY (kHz) The typical maximum duty cycle of the LT3572 is 95% at 1MHz. This maximum duty cycle reduces as the switching frequency is increased. The duty cycle for a given application is given by: VOUT + VD – VIN VOUT + VD – VCESAT where VD is the diode forward drop, typically 0.5V and VCESAT is, in the worst case, 310mV at 0.8A. The LT3572 can be used at higher duty cycles, but must be operated in the discontinuous mode so that the actual duty cycle is reduced. FB Resistor Network The output voltage is programmed with a resistor divider between the output and the FB pin. Choose the resistors according to: ⎛ V ⎞ R1 = R2 ⎜ OUT – 1⎟ ⎝ 1.225V ⎠ Shutdown Pins When held below 0.3V, SHDNA and SHDNB prevent the drivers from switching and keep the outputs in a high impedance state. If SHDN is held below 0.3V then the switching regulator is prevented from turning on. When any one of these pins are pulled above 1.5V the internal circuitry is turned on and the respective output is allowed to operate. When the LT3572 is not in use all three pins should be pulled low. Oscillator The LT3572 can operate at switching frequencies from 500kHz up to 2.25MHz by changing the value of the resistor R3 on the RT pin. Figure 2 shows a graph of RT vs Switching Frequency. The oscillator can be synchronized with an external clock applied to the SYNC pin. When synchronizing the oscillator, the free running frequency must be set approximately 1000 100 100 10 RT RESISTANCE (kΩ) 3572 F02 Figure 2. RT Resistance vs Switching Frequency 15% lower than the desired synchronized frequency. If the sync function is not used the SYNC pin must be tied to ground. PGOOD The part has a power good feature that detects when the output boost converter is up and in regulation. When the part is turned off or not in regulation the PGOOD pin is in a high impedance state. When the part is within 95% of regulation the PGOOD pin is pulled low signaling that the output is valid. If the output then falls below 85% of regulation the PGOOD pin is put back in a high impedance state. Whenever the output is not in regulation the output pins in the driver aren’t allowed to switch and are placed in a high impedance state. The PGOOD pin is an open drain of an NMOS devices with an impedance of 1kΩ and should be tied to VIN through a resistor. Soft-Start The soft-start feature limits the inrush current drawn from the supply upon start-up. An internal current source with a nominal 4.5μA current source charges an external capacitor C2. The voltage on the soft-start pin is used to control the output of the error amplifier, which limits the maximum peak current through the inductor and the inrush current drawn from the supply during start-up. 3572fa 8 LT3572 APPLICATIONS INFORMATION 1A without saturating, and ensure that the inductor has a low DCR (copper-wire resistance) to minimize I2R power losses. Table 1 lists several inductor manufacturers. PWM The LT3572 can PWM the output drivers at a very high frequency. The limitation on the frequency is determined by the internal rise in die temperature that occurs when driving the motor. The power delivered to the piezo motor is propotional to VOUT2, the capacitance of the motor, and the PWM frequency. When any of these are increased the power dissipated in the part increases causing the internal die temperature to increase. Driving two 2.2nF capacitors with VOUT at 30V, the maximum PWM frequency should be less than 80 kHz. The LT3572 can run at a higher frequency but either VOUT needs to be reduced or the capacitance needs to be lowered. A piezo motor has an associated capacitance that cannot be reduced so the output voltage must be lowered. Since the power is proportional to VOUT2 a reduction of VOUT to 25V from 30V will allow the LT3572 to run at a maxim frequency of 115 kHz. If a different motor is used the maximum PWM frequency will need to be adjusted inversely to the equivolent capacitance of the motor. Table 1. Inductor Manufacturers Sumida (847) 956-0666 www.sumida.com TDK (847) 803-6100 www.tdk.com Murata (714) 852-2001 www.murata.com FDK (408) 432-8331 www.tdk.co.jp Capacitor Selection The small size of ceramic capacitors makes them ideal for LT3572 applications. Only X5R or X7R types should be used because they retain their capacitance over wider voltage and temperature ranges than other types such as Y5V or Z5U. A 4.7μF to 15μF output capacitor is sufficient for stable transient response, however, more output capacitance can help limit the voltage droop on VOUT during transients. Ceramic capacitors also make a good choice for the input decoupling capacitor, which should be placed as close as possible to the LT3572. A 1μF to 4.7μF input capacitor is sufficient for most applications. Table 2 shows a list Inductor Selection A 10μH inductor is recommended for most LT3572 applications. Choose an inductor that will handle at least OUTA OUTB OUTA D1 OUTB 16 17 18 19 20 C1 L1 SW 1 15 PGOOD VIN 2 14 SS SYNC 3 13 FB RT 4 12 SHDNB GND 5 11 C2 C3 GND R2 R1 SHDNA PWMB 10 9 8 7 6 CFF SHDN PWMA R4 VOUT 3572 BD LAYOUT 3572fa 9 LT3572 APPLICATIONS INFORMATION of several ceramic capacitor manufacturers. Consult the manufacturers for detailed information on their entire selection of ceramic parts. used. These diodes are rated to handle an average forward current of 0.5A. For higher efficiency, use a diode with better thermal characteristics such as the On Semiconductor MBRM140 (a 40V diode). Table 2. Ceramic Capacitor Manufacturers Taiyo Yuden (408) 573-4150 www.t-yuden.com AVX (803) 448-9411 www.avxcorp.com Murata (714) 852-2001 www.murata.com Layout Hints As with all switching regulators, careful attention must be paid to the PCB board layout and component placement. To maximize efficiency, switch rise and fall times are made as short as possible. Note the vias under the Exposed Pad. These should connect to a local ground plane for better thermal performance. Diode Selection A Schottky diode is recommended for use with the LT3572. The Philips PMEG 3005 is a good choice. If the switch voltage exceeds 30V, a PMEG 4005 (a 40V diode) can be TYPICAL APPLICATION L1 12μH VIN 3V TO 5V 2 C3 4.7μF 10 11 R4 100k 12 7 6 3 15 4 R3 34k 14 VIN SHDN SHDNA SHDNB PWMA PWMB SYNC PGOOD D1 1 8 SW VOUT FB OUTA LT3572 OUTA RT SS C2 10nF OUTB GND OUTB VOUT 30V 50mA C4 20pF R1 576k C1 10μF 13 18 R2 24.9k 19 3572 TA02 17 16 5, 9, 20, 21 3572fa 10 LT3572 PACKAGE DESCRIPTION UF Package 20-Lead Plastic QFN (4mm × 4mm) (Reference LTC DWG # 05-08-1710 Rev A) 0.70 p0.05 4.50 p 0.05 3.10 p 0.05 2.00 REF 2.45 p 0.05 2.45 p 0.05 PACKAGE OUTLINE 0.25 p0.05 0.50 BSC RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 0.75 p 0.05 4.00 p 0.10 R = 0.05 TYP R = 0.115 TYP 19 20 0.40 p 0.10 PIN 1 TOP MARK (NOTE 6) 1 2.45 p 0.10 4.00 p 0.10 PIN 1 NOTCH R = 0.20 TYP OR 0.35 s 45o CHAMFER BOTTOM VIEW—EXPOSED PAD 2 2.00 REF 2.45 p 0.10 (UF20) QFN 01-07 REV A 0.200 REF 0.00 – 0.05 0.25 p 0.05 0.50 BSC NOTE: 1. DRAWING IS PROPOSED TO BE MADE A JEDEC PACKAGE OUTLINE MO-220 VARIATION (WGGD-1)—TO BE APPROVED 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 3572fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 11 LT3572 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT1160 Half-/Full-Bridge N-Channel MOSFET Driver VIN: 10V to 15V, VOUT(MAX) = 60V, 24-Lead SO Package LT3469 Piezo Microactuator Driver with Boost Regulator VIN: 2.5V to 16V, VOUT = 35V Maximum, 40mA Current Limit for Piezo Microactuator LT3479 3A, Full Featured DC/DC Converter with Soft-Start and Inrush Current Protection VIN: 2.5V to 24V, VOUT(MAX) = 40V, IQ = Analog/PWM, ISD < 1μA, DFN, TSSOP Packages LT3580 42V, 2A, 2.5MHz High Efficiency Step-Up DC/DC Converter VIN: 2.5V to 32V, VOUT(MAX) = 40V, IQ = 1mA, ISD < 1μA, 3mm × 3mm DFN8 and MS8E Packages 3572fa 12 Linear Technology Corporation LT 0408 REV A • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2007