LT6402-12
300MHz Low Distortion, Low
Noise Differential Amplifier/
ADC Driver (AV = 12dB)
DESCRIPTION
FEATURES
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300 MHz –3dB Bandwidth
Fixed Gain of 12dB
Low Distortion:
43dBm OIP3, –82dBc HD3 (20MHz, 2VP-P)
Low Noise:
15dB NF, en = 2.6nV/√Hz (20MHz)
Differential Inputs and Outputs
Additional Filtered Outputs
Adjustable Output Common Mode Voltage
DC- or AC-Coupled Operation
Minimal Support Circuitry Required
Small 0.75mm Profile 16-Lead 3mm × 3mm QFN
Package
APPLICATIONS
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The LT®6402-12 is a low distortion, low noise differential
amplifier/ADC driver for use in applications from DC to
300MHz. The LT6402-12 has been designed for ease of
use, with minimal support circuitry required. Exceptionally
low input-referred noise and low distortion (with either
single-ended or differential inputs) make the LT6402-12
an excellent solution for driving high speed 12-bit and
14-bit ADCs. In addition to the normal unfiltered outputs
(+OUT and –OUT), the LT6402-12 has a built-in 75MHz
differential low pass filter and an additional pair of filtered
outputs (+OUTFILTERED, –OUTFILTERED) to reduce
external filtering components when driving high speed
ADCs. The output common mode voltage is easily set via
the VOCM pin, eliminating an output transformer or ACcoupling capacitors in many applications.
The LT6402-12 is designed to meet the demanding requirements of communications transceiver applications. It can
be used as a differential ADC driver, a general-purpose
differential gain block, or in other applications requiring
differential drive. The LT6402-12 can be used in data
acquisition systems required to function at frequencies
down to DC.
Differential ADC Driver for:
Imaging
Communications
Differential Driver/Receiver
Single Ended to Differential Conversion
Differential to Single Ended Conversion
Level Shifting
IF Sampling Receivers
SAW Filter Interfacing/Buffering
The LT6402-12 operates on a 5V supply and consumes 30mA.
It comes in a compact 16-lead 3mm × 3mm QFN package
and operates over a –40°C to 85°C temperature range.
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
Distortion vs Frequency, Differential Input, No RLOAD
–40
5V
0.1μF
0.1μF
–INB
–INA
VCC
VOCM
+OUT
0.1μF
LT6402-12
–OUT
0.1μF
IF IN
10Ω
10Ω
VCM
AIN+
LTC®2249
AIN–
VEE
–60
–70
–80
HD3
–90
+INB
+INA
FILTERED OUTPUTS
VOUT = 2VP-P
–50
DISTORTION (dBc)
n
HD2
64026 TA01a
–100
1
10
FREQUENCY (MHz)
100
640212 TA01b
640212fa
1
LT6402-12
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
–INB
–INA
+INA
+INB
TOP VIEW
Total Supply Voltage (VCCA/VCCB/VCCC to
VEEA/VEEB/VEEC) ...................................................5.5V
Input Current (+INA, –INA, +INB, –INB,
VOCM, ENABLE)................................................±10mA
Output Current (Continuous)
+OUT, –OUT ...................................................±100mA
+OUTFILTERED, –OUTFILTERED ......................±30mA
Output Short-Circuit Duration (Note 2) ............ Indefinite
Operating Temperature Range (Note 3).... –40°C to 85°C
Specified Temperature Range (Note 4) .... –40°C to 85°C
Storage Temperature Range................... –65°C to 125°C
Junction Temperature ........................................... 125°C
16 15 14 13
VCCC 1
12 VEEC
VOCM 2
11 ENABLE
17
VCCA 3
10 VCCB
VEEA 4
6
7
8
+OUT
+OUTFILTERED
–OUTFILTERED
–OUT
9
5
VEEB
UD PACKAGE
16-LEAD (3mm × 3mm) PLASTIC QFN
TJMAX = 125°C, θJA = 68°C/W, θJC = 4.2°C/W
EXPOSED PAD IS VEE (PIN 17)
MUST BE SOLDERED TO THE PCB
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT6402CUD-12#PBF
LT6402CUD-12#TRPBF
LCBB
16-Lead (3mm × 3mm) Plastic QFN
–40°C to 85°C
LT6402IUD-12#PBF
LT6402IUD-12#TRPBF
LCBB
16-Lead (3mm × 3mm) Plastic QFN
–40°C to 85°C
LEAD BASED FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT6402CUD-12
LT6402CUD-12#TR
LCBB
16-Lead (3mm × 3mm) Plastic QFN
–40°C to 85°C
LT6402IUD-12
LT6402IUD-12#TR
LCBB
16-Lead (3mm × 3mm) Plastic QFN
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
DC ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCCA = VCCB = VCCC = 5V, VEEA = VEEB = VEEC = 0V, ENABLE = 0.8V, +INA
shorted to +INB (+IN), –INA shorted to –INB (–IN), VOCM = 2.2V, Input common mode voltage = 2.2V, no RLOAD unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
11.6
12
12.4
dB
0.25
0.35
0.5
V
V
Input/Output Characteristics (+INA, +INB, –INA, –INB, +OUT, –OUT, +OUTFILTERED, –OUTFILTERED)
Differential (+OUT, –OUT), VIN = ±400mV Differential
l
VSWINGMIN
Single-Ended +OUT, –OUT, +OUTFILTERED,
–OUTFILTERED, VIN = ±1.2V Differential
l
VSWINGMAX
Single-Ended +OUT, –OUT, +OUTFILTERED,
–OUTFILTERED, VIN = ±1.2V Differential
l
3.4
3.3
3.6
l
6.1
5.6
7
VP-P
VP-P
l
±30
±35
mA
l
–6.5
–10
1
GDIFF
Gain
VSWINGDIFF
Output Voltage Swing
IOUT
Output Current Drive
VOS
Input Offset Voltage
TCVOS
Input Offset Voltage Drift
Differential (+OUT, –OUT), VIN = ±1.2V Differential
TMIN to TMAX
l
2.5
V
V
6.5
10
mV
mV
μV/°C
640212fa
2
LT6402-12
DC ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCCA = VCCB = VCCC = 5V, VEEA = VEEB = VEEC = 0V, ENABLE = 0.8V, +INA
shorted to +INB (+IN), –INA shorted to –INB (–IN), VOCM = 2.2V, Input common mode voltage = 2.2V, no RLOAD unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
IVRMIN
Input Voltage Range, MIN
Single-Ended
l
IVRMAX
Input Voltage Range, MAX
Single-Ended
l
4.3
l
77
RINDIFF
Input Resistance
CINDIFF
Input Capacitance
CMRR
Common Mode Rejection Ratio
ROUTDIFF
COUTDIFF
MIN
TYP
MAX
0.5
UNITS
V
V
100
122
Ω
1
pF
65
dB
Output Resistance
0.3
Ω
Output Capacitance
0.8
pF
Input Common Mode 0.5V to 4.3V
l
42
Common Mode Voltage Control (VOCM Pin)
Differential (+OUT, –OUT), VOCM = 1.2V to 3.6V
Differential (+OUT, –OUT), VOCM = 1.4V to 3.4V
GCM
Common Mode Gain
VOCMMIN
Output Common Mode Voltage
Adjustment Range, MIN
VOCMMAX
Output Common Mode Voltage
Adjustment Range, MAX
Single-Ended
VOSCM
Output Common Mode Offset
Voltage
Measured from VOCM to Average of +OUT and –OUT
IBIASCM
VOCM Input Bias Current
l
RINCM
VOCM Input Resistance
l
CINCM
VOCM Input Capacitance
l
0.9
0.9
1
l
l
1.1
1.1
V/V
V/V
1.2
1.4
V
V
3.6
3.4
–30
0.8
V
V
4
30
mV
5
15
μA
3
MΩ
1
pF
ENABLE Pin
VIL
ENABLE Input Low Voltage
l
VIH
ENABLE Input High Voltage
l
IIL
ENABLE Input Low Current
ENABLE = 0.8V
l
IIH
ENABLE Input High Current
ENABLE = 2V
l
0.8
2
V
V
0.5
μA
1
3
μA
Power Supply
l
4
5
5.5
V
ENABLE = 0.8V
l
24
30
37
mA
Supply Current (Disabled)
ENABLE = 2V
l
250
500
μA
Power Supply Rejection Ratio
4V to 5.5V
l
VS
Operating Range
IS
Supply Current
ISDISABLED
PSRR
55
90
dB
640212fa
3
LT6402-12
AC ELECTRICAL CHARACTERISSTICSTA = 25°C, VCCA = VCCB = VCCC = 5V, VEEA = VEEB = VEEC = 0V,
⎯E⎯N⎯A⎯B⎯L⎯E = 0.8V, +INA shorted to +INB (+IN), –INA shorted to –INB (–IN), VOCM = 2.2V, Input common mode voltage = 2.2V, no RLOAD
unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
200
300
MHz
30
MHz
Input/Output Characteristics
–3dBBW
–3dB Bandwidth
50mVP-P Differential (+OUT, –OUT)
0.1dBBW
Bandwidth for 0.1dB Flatness
50mVP-P Differential (+OUT, –OUT)
0.5dBBW
Bandwidth for 0.5dB Flatness
50mVP-P Differential (+OUT, –OUT)
80
MHz
SR
Slew Rate
3.2VP-P Differential (+OUT, –OUT)
400
V/μs
ts1%
1% Settling
1% Settling for a 1VP-P Differential Step
(+OUT, –OUT)
10
ns
tON
Turn-On Time
200
ns
tOFF
Turn-Off Time
1.5
μs
Common Mode Voltage Control (VOCM Pin)
–3dBBWCM
Common Mode Small-Signal –3dB
Bandwidth
0.1VP-P at VOCM, Measured Single-Ended at +OUT
and –OUT
200
MHz
SRCM
Common Mode Slew Rate
1.3V to 3.4V Step at VOCM
250
V/μs
2VP-P Differential (+OUTFILTERED, –OUTFILTERED)
–85
dBc
2VP-P Differential (+OUT, –OUT)
–83
dBc
Noise/Harmonic Performance Input/Output Characteristics
10MHz Signal
Second/Third Harmonic Distortion
Third-Order IMD
2VP-P Differential Composite (+OUTFILTERED,
–OUTFILTERED), f1 = 9.5MHz, f2 = 10.5MHz
–91.5
dBc
OIP310M
Output Third-Order Intercept
Differential (+OUTFILTERED, –OUTFILTERED),
f1 = 9.5MHz, f2 = 10.5MHz (Note 5)
47.5
dBm
NF
Noise Figure
Measured Using DC954A Demo Board
15.4
dB
en10M
Input Referred Noise Voltage Density
2.7
nV/√Hz
1dB Compression Point
RL = 100Ω (Note 5)
20.5
dBm
Second/Third Harmonic Distortion
2VP-P Differential (+OUTFILTERED, –OUTFILTERED)
–82
dBc
2VP-P Differential (+OUT, –OUT)
–79
dBc
2VP-P Differential Composite (+OUTFILTERED,
–OUTFILTERED), f1 = 19.5MHz, f2 = 20.5MHz
–87
dBc
2VP-P Differential Composite (+OUT, –OUT),
RL = 400Ω, f1 = 19.5MHz, f2 = 20.5MHz
–80
dBc
Output Third-Order Intercept
Differential (+OUTFILTERED, –OUTFILTERED),
f1 = 19.5MHz, f2 = 20.5MHz (Note 5)
43
dBm
NF
Noise Figure
Measured Using DC954A Demo Board
en20M
Input Referred Noise Voltage Density
20MHz Signal
Third-Order IMD
OIP320M
1dB Compression Point
RL = 100Ω (Note 5)
15
dB
2.6
nV/√Hz
17
dBm
640212fa
4
LT6402-12
AC ELECTRICAL CHARACTERISTICS
TA = 25°C, VCCA = VCCB = VCCC = 5V,VEEA = VEEB = VEEC = 0V,
⎯E⎯N⎯A⎯B⎯L⎯E = 0.8V, +INA shorted to +INB (+IN), –INA shorted to –INB (–IN), VOCM = 2.2V, Input common mode voltage = 2.2V, no RLOAD
unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Second/Third Harmonic Distortion
2VP-P Differential (+OUTFILTERED, –OUTFILTERED)
–82
dBc
2VP-P Differential (+OUT, –OUT)
–73
dBc
2VP-P Differential Composite (+OUTFILTERED,
–OUTFILTERED), f1 = 24.5MHz, f2 = 25.5MHz
–83
dBc
2VP-P Differential Composite (+OUT, –OUT),
RL = 400Ω, f1 = 24.5MHz, f2 = 25.5MHz
–74
dBc
40
dBm
25MHz Signal
Third-Order IMD
OIP325M
Output Third-Order Intercept
Differential (+OUTFILTERED, –OUTFILTERED),
f1 = 24.5MHz, f2 = 25.5MHz (Note 5)
NF
Noise Figure
Measured Using DC954A Demo Board
en25M
Input Referred Noise Voltage Density
RL = 100Ω (Note 5)
1dB Compression Point
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: As long as output current and junction temperature are kept below
the Absolute Maximum Ratings, no damage to the part will occur.
Note 3: The LT6402 is guaranteed functional over the operating
temperature range of –40°C to 85°C.
15.1
dB
2.6
nV/√Hz
13.5
dBm
Note 4: The LT6402C is guaranteed to meet specified performance from
0°C to 70°C. It is designed, characterized and expected to meet specified
performance from –40°C and 85°C but is not tested or QA sampled
at these temperatures. The LT6402I is guaranteed to meet specified
performance from –40°C to 85°C.
Note 5: Since the LT6402-12 is a feedback amplifier with low output
impedance, a resistive load is not required when driving an ADC.
Therefore, typical output power is very small. In order to compare the
LT6402-12 with typical gm amplifiers that require 50Ω output loading, the
LT6402-12 output voltage swing driving an ADC is converted to OIP3 and
P1dB as if it were driving a 50Ω load.
TYPICAL PERFORMANCE CHARACTERISTICS
Frequency Response vs CLOAD,
RLOAD = 400Ω
Frequency Response,
RLOAD = 400Ω
18
12
UNFILTERED OUTPUTS
15
FILTERED OUTPUTS
3
0
–3
–6 VIN = 50mVP-P
UNFILTERED: RLOAD = 400Ω
–9 FILTERED: RLOAD = 300Ω
–12 (EXTERNAL) + 100Ω
(INTERNAL, FILTERED OUTPUTS)
–15
10
100
1
FREQUENCY (MHz)
9
15
6
12
9
6
3
0
–3
–6
–9
0pF
1.6pF
5pF
10pF
0
–3
640212 G01
FILTERED OUTPUTS
6
3
1000
UNFILTERED OUTPUTS
12
18
GAIN (dB)
GAIN (dB)
9
18
24
VIN = 50VP-P
21 UNFILTERED OUTPUTS
GAIN (dB)
15
Frequency Response,
RLOAD = 100Ω
–6
VIN = 50mVP-P
UNFILTERED: RLOAD = 100Ω
FILTERED: RLOAD = 100Ω
(INTERNAL, FILTERED OUTPUTS)
–12
–15
–18
1
10
100
FREQUENCY (MHz)
1000
640212 G02
1
10
100
FREQUENCY (MHz)
1000
640212 G03
640212fa
5
LT6402-12
TYPICAL PERFORMANCE CHARACTERISTICS
Third Order Intermodulation
Distortion vs Frequency,
Differential Input, No RLOAD
Third Order Intermodulation
Distortion vs Frequency,
Differential Input, RLOAD = 400Ω
–60
–65
UNFILTERED
OUTPUTS
–85
FILTERED
OUTPUTS
–95
–70
–75
UNFILTERED
OUTPUTS
–80
–85
15
20
25
FREQUENCY (MHz)
30
35
5
10
25
20
15
FREQUENCY (MHz)
64026 G04
–40
49
2 TONES
37 2V COMPOSITE
P-P
1MHz TONE SPACING
35
5
10
20
15
35
30
25
FREQUENCY (MHz)
–45
FILTERED OUTPUTS
VOUT = 2VP-P
41
UNFILTERED OUTPUTS
–60
–70
–80
HD3
39
30
–100
35
10
FREQUENCY (MHz)
1
Output 1dB Compression
vs Frequency
25
OUTPUT 1dB COMPRESSION (dBm)
–75
–80
HD3
HD2
–80
HD3
–85
–90
–90
9
10
640212 G10
100
10
FREQUENCY (MHz)
640212 G09
UNFILTERED OUTPUTS
UNFILTERED OUTPUTS
HD2
2 3 4 5 6 7 8
OUTPUT AMPLITUDE (dBm)
1
–70
DISTORTION (dBc)
DISTORTION (dBc)
HD2
–95
100
Distortion vs Output Amplitude,
20MHz Differential Input, No RLOAD
–75
1
HD3
640212 G08
FILTERED OUTPUTS
0
–75
HD2
Distortion vs Output Amplitude,
20MHz Differential Input, No RLOAD
–95
–65
–85
–90
640212 G07
–85
UNFILTERED OUTPUTS
VOUT = 2VP-P
–55
DISTORTION (dBc)
DISTORTION (dBc)
OUTPUT IP3 (dBm)
43
35
Distortion vs Frequency,
Differential Input, No RLOAD
–50
FILTERED OUTPUTS
45
30
640212 G06
47
–70
FILTERED OUTPUTS
41
Distortion vs Frequency,
Differential Input, No RLOAD
51
25
FREQUENCY (MHz)
43
640212 G05
Output Third Order Intercept vs
Frequency, Differential Input,
RLOAD = 400Ω
2 TONES
37 2V COMPOSITE
P-P
1MHz TONE SPACING
35
5
10
20
15
45
39
FILTERED
OUTPUTS
–95
10
UNFILTERED OUTPUTS
47
–90
5
49
OUTPUT IP3 (dBm)
THIRD ORDER IMD (dBc)
THIRD ORDER IMD (dBc)
–75
–90
51
2 TONES
2VP-P COMPOSITE
–65 1MHz TONE SPACING
2 TONES
2VP-P COMPOSITE
–70 1MHz TONE SPACING
–80
Output Third Order Intercept vs
Frequency, Differential Input,
No RLOAD
20
15
100Ω LOAD
400Ω LOAD
10
5
0
–5
–10
–15
0
1
2 3 4 5 6 7 8
OUTPUT AMPLITUDE (dBm)
9
10
640212 G11
1
10
100
FREQUENCY (MHz)
1000
640212 G12
640212fa
6
LT6402-12
TYPICAL PERFORMANCE CHARACTERISTICS
Input Referred Noise Voltage
vs Frequency
Noise Figure vs Frequency
INPUT REFERRED NOISE VOLTAGE (nV/√Hz)
MEASURED USING
DC954 DEMO BOARD
20
15
10
5
0
0
10
–20
–30
8
6
4
100
FREQUENCY (MHz)
–70
–90
–100
10
1000
100
FREQUENCY (MHz)
–110
1000
1
Differential Input Impedance
vs Frequency
300
Input Reflection Coefficient
vs Frequency
0
100
INPUT REFLECTION COEFFICIENT (S11)
UNFILTERED OUTPUTS
250
150
IMPEDANCE
MAGNITUDE
100
50
IMPEDANCE
PHASE
0
10
–50
–100
1
10
100
FREQUENCY (MHz)
MEASURED USING
–5 DC954 DEMO BOARD
–10
–15
–20
–25
–30
–35
–40
1
1000
10
100
FREQUENCY (MHz)
640212 G16
1
1000
MEASURED USING
–5 DC954 DEMO BOARD
2.260
100
PSRR
90
PSRR, CMRR (dB)
–10
–20
–25
Small-Signal Transient Response
2.280
UNFILTERED OUTPUTS
110
80
CMRR
70
60
50
40
30
–30
1000
640212 G18
PSRR, CMRR vs Frequency
120
0
–15
10
100
FREQUENCY (MHz)
64206 G17
Output Reflection Coefficient
vs Frequency
1000
640212 G15
Differential Output Impedance
vs Frequency
200
10
100
FREQUENCY (MHz)
640212 G14
OUTPUT IMPEDANCE (Ω)
INPUT IMPEDANCE (MAGNITUDE Ω, PHASE DEGREES)
–50
–60
2
640212 G13
OUTPUT REFLECTION COEFFICIENT (S22)
–40
–80
0
10
UNFILTERED OUTPUTS
–10
OUTPUT VOLTAGE (V)
NOISE FIGURE (dB)
25
Reverse Isolation vs Frequency
12
ISOLATION (dB)
30
2.240
2.220
2.200
2.180
2.160
20
–35
2.140
10
0
–40
1
10
100
FREQUENCY (MHz)
1000
640212 G19
1
10
100
FREQUENCY (MHz)
1000
640212 G20
2.120
TIME (5ns/DIV)
640212 G21
640212fa
7
LT6402-12
TYPICAL PERFORMANCE CHARACTERISTICS
Large-Signal Transient Response
3.7
Distortion vs Output Common
Mode Voltage, LT6402-12 Driving
an LTC2249 14-Bit ADC
Overdrive Recovery Time
–70
4.0
RLOAD = 100Ω PER OUTPUT
FILTERED OUTPUTS
NO RLOAD
–75 VOUT = 20MHz 2VP-P
3.5
+OUT
2.7
2.2
3.0
DISTORTION (dBc)
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
3.2
2.5
2.0
RLOAD = 100Ω
PER OUTPUT
1.5
–80
HD3
–85
HD2
–90
1.0
1.7
–100
0
1.2
10MHz 8192 Point FFT, LT6402-12
Driving an LTC2249 14-Bit ADC
4.0
4.0
RLOAD = 100Ω
3.5 PER OUTPUT
RLOAD = 100Ω PER OUTPUT
3.5
VOLTAGE (V)
2.5
2.0
–OUT
1.5
2.5
+OUT
2.0
–OUT
1.5
1.0
1.0
AMPLITUDE (dBFS)
3.0
3.0
ENABLE
0.5
ENABLE
0
0
TIME (125ns/DIV)
TIME (250ns/DIV)
640212 G25
640212 G28
640212 G27
20MHz 2-Tone 32768 Point FFT,
LT6402-12 Driving an LTC2249
14-Bit ADC
25MHz 8192 Point FFT, LT6402-12
Driving an LTC2249 14-Bit ADC
AMPLITUDE (dBFS)
20MHz 8192 Point FFT, LT6402-12
Driving an LTC2249 14-Bit ADC
0
–10 8192 POINT FFT
f = 20MHz, –1dBFS
–20 IN
FILTERED OUTPUTS
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
–130
–140
0 2 4 6 8 10 12 14 16 18 20
FREQUENCY (MHz)
0
–10 8192 POINT FFT
f = 10MHz, –1dBFS
–20 IN
FILTERED OUTPUTS
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
–130
–140
0 2 4 6 8 10 12 14 16 18 20
FREQUENCY (MHz)
640212 G26
0
–10 8192 POINT FFT
f = 25MHz, –1dBFS
–20 IN
FILTERED OUTPUTS
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
–130
–140
0 2 4 6 8 10 12 14 16 18 20
FREQUENCY (MHz)
640212 G29
AMPLITUDE (dBFS)
VOLTAGE (V)
640212 G24
Turn-On Time
Turn-Off Time
+OUT
2.2
2.4
2.0
1.2
1.4 1.6 1.8
OUTPUT COMMON MODE VOLTAGE (V)
640212 G23
640212 G22
AMPLITUDE (dBFS)
1
TIME (25ns/DIV)
TIME (10ns/DIV)
0.5
–95
–OUT
0.5
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
–130
–140
32768 POINT FFT
TONE 1 AT 19.5MHz, –7dBFS
TONE 2 AT 20.5MHz, –7dBFS
FILTERED OUTPUTS
0
2.5
5
7.5 10 12.5 15 17.5 20 22.5
FREQUENCY (MHz)
640212 G30
640212fa
8
LT6402-12
PIN FUNCTIONS
VOCM (Pin 2): This pin sets the output common mode
voltage. Without additional biasing, both inputs bias to
this voltage as well. This input is high impedance.
VCCA, VCCB, VCCC (Pins 3, 10, 1): Positive Power Supply
(Normally Tied to 5V). All three pins must be tied to the
same voltage. Bypass each pin with 1000pF and 0.1μF
capacitors as close to the package as possible. Split
supplies are possible as long as the voltage between VCC
and VEE is 5V.
VEEA, VEEB, VEEC (Pins 4, 9, 12): Negative Power Supply
(Normally Tied to Ground). All three pins must be tied to
the same voltage. Split supplies are possible as long as
the voltage between VCC and VEE is 5V. If these pins are
not tied to ground, bypass each pin with 1000pF and 0.1μF
capacitors as close to the package as possible.
+OUT, –OUT (Pins 5, 8): Outputs (Unfiltered). These pins
are high bandwidth, low-impedance outputs. The DC
output voltage at these pins is set to the voltage applied
at VOCM.
+OUTFILTERED, –OUTFILTERED (Pins 6, 7): Filtered
Outputs. These pins add a series 50Ω resistor from the
unfiltered outputs and three 14pF capacitors. Each output
has 14pF to VEE, plus an additional 14pF between each pin
(See the Block Diagram). This filter has a –3dB bandwidth
of 75MHz.
ENABLE (Pin 11): This pin is a TTL logic input referenced
to the VEEC pin. If low, the LT6402-12 is enabled and draws
typically 30mA of supply current. If high, the LT6402-12
is disabled and draws typically 250μA.
+INA, +INB (Pins 15, 16): Positive Inputs. These pins are
normally tied together. These inputs may be DC- or ACcoupled. If the inputs are AC-coupled, they will self-bias
to the voltage applied to the VOCM pin.
–INA, –INB (Pins 14, 13): Negative Inputs. These pins are
normally tied together. These inputs may be DC- or ACcoupled. If the inputs are AC-coupled, they will self-bias
to the voltage applied to the VOCM pin.
Exposed Pad (Pin 17): Tie the pad to VEEC (Pin 12). If split
supplies are used, DO NOT tie the pad to ground.
640212fa
9
LT6402-12
BLOCK DIAGRAM
200Ω
–INA
VCCA
100Ω
14pF
–
14
–INB
VEEA
+OUT
5
A
100Ω
+
13
+OUTFILTERED
50Ω
6
VEEA
VCCC
200Ω
VOCM
+
2
C
14pF
–
VEEC
200Ω
+INA
7
+
16
+INB
–OUTFILTERED
50Ω
VCCB
100Ω
–OUT
8
B
100Ω
–
15
14pF
VEEB
VEEB
200Ω
BIAS
3
10
VCCA
1
VCCB
11
VCCC
ENABLE
4
9
VEEA
64026 BD
12
VEEB
VEEC
APPLICATIONS INFORMATION
Circuit Description
The LT6402-12 is a low noise, low distortion differential
amplifier/ADC driver with:
• –3dB bandwidth
DC to 300MHz
• Fixed gain independent of RLOAD
4V/V (12dB)
• Differential input impedance
100Ω
• Low output impedance
• Built-in, user adjustable output filtering
• Requires minimal support circuitry
Referring to the block diagram, the LT6402-12 uses a
closed-loop topology which incorporates 3 internal amplifiers. Two of the amplifiers (A and B) are identical and
drive the differential outputs. The third amplifier is used
to set the output common mode voltage. Gain and input
impedance are set by the 200Ω resistors in the internal
feedback network. Output impedance is low, determined
by the inherent output impedance of amplifiers A and B,
and further reduced by internal feedback.
The LT6402-12 also includes built-in single-pole output
filtering. The user has the choice of using the unfiltered
outputs, the filtered outputs (75MHz –3dB lowpass), or
modifying the filtered outputs to alter frequency response
by adding additional components. Many lowpass and
bandpass filters are easily implemented with just one or
two additional components.
640212fa
10
LT6402-12
APPLICATIONS INFORMATION
The LT6402-12 has been designed to minimize the need
for external support components such as transformers or
AC-coupling capacitors. As an ADC driver, the LT6402-12
requires no external components except for power-supply
bypass capacitors. This allows DC-coupled operation for
applications that have frequency ranges including DC. At
the outputs, the common mode voltage is set via the VOCM
pin, allowing the LT6402-12 to drive ADCs directly. No
output AC-coupling capacitors or transformers are needed.
At the inputs, signals can be differential or single-ended
with virtually no difference in performance. Furthermore,
DC levels at the inputs can be set independently of the
output common mode voltage. These input characteristics
often eliminate the need for an input transformer and/or
AC-coupling capacitors.
impedance ratio transformer can also be used to better
match impedances.
Input Impedance and Matching Networks
Driving ADCs
Calculation of the input impedance of the LT6402-12 is
not straightforward from examination of the block diagram
because of the internal feedback network. In addition, the
input impedance when driven differentially is different than
when driven single-ended.
The LT6402-12 has been specifically designed to interface
directly with high speed Analog to Digital Converters
(ADCs). In general, these ADCs have differential inputs, with
an input impedance of 1kΩ or higher. In addition, there is
generally some form of lowpass or bandpass filtering just
LT6402-12
DIFFERENTIAL
SINGLE-ENDED
100Ω
75Ω
For single-ended 50Ω applications, a 150Ω shunt matching resistor to ground will result in the proper input
termination (Figure 1). For differential inputs there are
several termination options. If the input source is 50Ω
differential, then the input matching can be accomplished
by either a 67Ω shunt resistor across the inputs (Figure 3),
or equivalent 33Ω shunt resistors on each of the inputs
to ground (Figure 2). If additional AC gain is desired, an
13
14
–INB
–INA
0.1μF
IF IN
16
150Ω
+INB
+INA
The LT6402-12’s performance with single-ended inputs
is comparable to its performance with differential inputs.
This excellent single-ended performance is largely due
to the internal topology of the LT6402-12. Referring to
the block diagram, if the +INA and +INB pins are driven
with a single-ended signal (while –INA and –INB are tied
to AC ground), then the +OUT and –OUT pins are driven
differentially without any voltage swing needed from
amplifier C. Single-ended to differential conversion using
more conventional topologies suffers from performance
limitations due to the common mode amplifier.
13
IF IN–
14
8
+OUT
16
Figure 1. Input Termination for Single-Ended
50Ω Input Impedance
+INB
+OUT
+INA
5
640212 F02
Figure 2. Input Termination for Differential 50Ω Input Impedance
14
IF IN+
–INB
–INA
100Ω
–OUT
8
LT6402-12
15
ZIN = 50Ω
SINGLE-ENDED
8
–OUT
49.9Ω
IF IN–
640212 F01
–INA
LT6402-12
15
IF IN+
ZIN = 50Ω
DIFFERENTIAL
5
–INB
49.9Ω
ZIN = 50Ω
DIFFERENTIAL
13
–OUT
LT6402-12
15
Single-Ended to Differential Operation
16
+INB
+INA
+OUT
5
640212 F03
Figure 3. Alternate Input Termination for Differential
50Ω Input Impedance
640212fa
11
LT6402-12
APPLICATIONS INFORMATION
prior to the ADC to limit input noise at the ADC, thereby
improving system signal to noise ratio. Both the unfiltered
and filtered outputs of the LT6402-12 can easily drive the
high impedance inputs of these differential ADCs. If the
filtered outputs are used, then cutoff frequency and the
type of filter can be tailored for the specific application if
needed.
Wideband Applications
(Using the +OUT and –OUT Pins)
In applications where the full bandwidth of the LT6402-12
is desired, the unfiltered output pins (+OUT and –OUT)
should be used. They have a low output impedance;
therefore, gain is unaffected by output load. Capacitance
in excess of 5pF placed directly on the unfiltered outputs
results in additional peaking and reduced performance.
When driving an ADC directly, a small series resistance
is recommended between the LT6402-12’s outputs and
the ADC inputs (Figure 4). This resistance helps eliminate
any resonances associated with bond wire inductances of
either the ADC inputs or the LT6402-12’s outputs. A value
between 10Ω and 25Ω gives excellent results.
between the two filtered outputs. This resistor/capacitor combination creates filtered outputs that look like a
series 50Ω resistor with a 42pF capacitor shunting each
filtered output to AC ground, giving a –3dB bandwidth of
75MHz.
The filter cutoff frequency is easily modified with just a
few external components. To increase the cutoff frequency,
simply add 2 equal value resistors, one between +OUT and
+OUTFILTERED and the other between –OUT and –OUTFILTERED (Figure 6). These resistors are in parallel with the
internal 50Ω resistor, lowering the overall resistance and
increasing filter bandwidth. To double the filter bandwidth,
for example, add two external 50Ω resistors to lower the
series resistance to 25Ω. The 42pF of capacitance remains
unchanged, so filter bandwidth doubles.
To decrease filter bandwidth, add two external capacitors,
one from +OUTFILTERED to ground, and the other from
–OUTFILTERED to ground. A single differential capacitor
connected between +OUTFILTERED and –OUTFILTERED
LT6402-12
VEE
50Ω
–OUT
8
14pF
7 –OUTFILTERED
10Ω TO 25Ω
FILTERED OUTPUT
(75MHz)
14pF
50Ω
LT6402-12
6 +OUTFILTERED
ADC
14pF
10Ω TO 25Ω
+OUT
8 –OUT
VEE
5
640212 F04
5 +OUT
640212 F05
Figure 4. Adding Small Series R at LT6402-12 Output
Filtered Applications
(Using the +OUTFILTERED and –OUTFILTERED Pins)
Filtering at the output of the LT6402-12 is often desired
to provide either anti-aliasing or improved signal to noise
ratio. To simplify this filtering, the LT6402-12 includes an
additional pair of differential outputs (+OUTFILTERED and
–OUTFILTERED) which incorporate an internal lowpass
filter network with a –3dB bandwidth of 75MHz (Figure 5).
These pins each have an output impedance of 50Ω. Internal capacitances are 14pF to VEE on each filtered output,
plus an additional 14pF capacitor connected differentially
Figure 5. LT6402-12 Internal Filter Topology –3dB BW ≈75MHz
LT6402-12
8 –OUT
VEE
50Ω
50Ω
14pF
7 –OUTFILTERED
FILTERED OUTPUT
(150MHz)
14pF
50Ω
6 +OUTFILTERED
14pF
50Ω
VEE
5 +OUT
640212 F06
Figure 6. LT6402-12 Internal Filter Topology Modified
for 2x Filter Bandwidth (2 External Resistors)
640212fa
12
LT6402-12
APPLICATIONS INFORMATION
can also be used, but since it is being driven differentially
it will appear at each filtered output as a single-ended
capacitance of twice the value. To halve the filter bandwidth, for example, two 42pF capacitors could be added
(one from each filtered output to ground). Alternatively
one 21pF capacitor could be added between the filtered
outputs, again halving the filter bandwidth. Combinations
of capacitors could be used as well; a three capacitor
solution of 14pF from each filtered output to ground plus
a 14pF capacitor between the filtered outputs would also
halve the filter bandwidth (Figure 7).
Bandpass filtering is also easily implemented with just a
few external components. An additional 560pF and 62nH,
each added differentially between +OUTFILTERED and
–OUTFILTERED creates a bandpass filter with a 26MHz
center frequency, –3dB points of 23MHz and 30MHz, and
1.6dB of insertion loss (Figure 8).
LT6402-12
VEE
50Ω
8 –OUT
14pF
7 –OUTFILTERED
14pF
14pF
50Ω
6 +OUTFILTERED
14pF
FILTERED OUTPUT
(37.5MHz)
14pF
14pF
VEE
5 +OUT
Output Common Mode Adjustment
The LT6402-12’s output common mode voltage is set by the
VOCM pin. It is a high-impedance input, capable of setting
the output common mode voltage anywhere in a range
from 1.1V to 3.6V. Bandwidth of the VOCM pin is typically
200MHz, so for applications where the VOCM pin is tied to
a DC bias voltage, a 0.1μF capacitor at this pin is recommended. For best distortion performance, the voltage at
the VOCM pin should be between 1.2V and 2.6V.
When interfacing with most ADCs, there is generally a
VOCM output pin that is at about half of the supply voltage
of the ADC. For 5V ADCs such as the LTC17XX family, this
VOCM output pin should be connected directly (with the
addition of a 0.1μF capacitor) to the input VOCM pin of the
LT6402-12. For 3V ADCs such as the LTC22XX families,
the LT6402-12 will function properly using the 1.65V from
the ADC’s VCM reference pin, but improved Spurious Free
Dynamic Range (SFDR) and distortion performance can
be achieved by level-shifting the LTC22XX’s VCM reference
voltage up to at least 1.8V. This can be accomplished as
shown in Figure 9 by using a resistor divider between the
LTC22XX’s VCM output pin and VCC and then bypassing
the LT6402-12’s VOCM pin with a 0.1μF capacitor. For a
common mode voltage above 1.9V, AC coupling capacitors
are recommended between the LT6402-12 and LTC22XX
ADCs because of the input voltage range constraints of
the ADC.
640212 F07
3V
Figure 7. LT6402-12 Internal Filter Topology Modified
for 1/2x Filter Bandwidth (3 External Capacitors)
11k
1.9V
0.1μF
LT6402-12
VEE
50Ω
8 –OUT
13
14
14pF
–INA
VOCM
31 1.5V
6
LT6402-12
15
FILTERED OUTPUT
50Ω
6 +OUTFILTERED
IF IN
16
–OUTFILTERED
+INB
4.02k
2
+OUTFILTERED
0.1μF
7 –OUTFILTERED
14pF
–INB
10Ω
1
LTC22xx
10Ω
7
VCM
AIN+
2
AIN–
+INA
640212 F09
150Ω
14pF
VEE
5 +OUT
640212 F08
Figure 9. Level Shifting 3V ADC VCM Voltage for
Improved SFDR
Figure 8. LT6402-12 Output Filter Modified for Bandpass
Filtering (1 External Inductor, 1 External Capacitor)
640212fa
13
LT6402-12
APPLICATIONS INFORMATION
Large Output Voltage Swings
The LT6402-12 has been designed to provide the 3.2VPP output swing needed by the LTC1748 family of 14-bit
low-noise ADCs. This additional output swing improves
system SNR by up to 4dB.
Input Bias Voltage and Bias Current
The input pins of the LT6402-12 are internally biased to
the voltage applied to the VOCM pin. No external biasing
resistors are needed, even for AC-coupled operation. The
input bias current is determined by the voltage difference
between the input common mode voltage and the VOCM
pin (which sets the output common mode voltage). For
example, if the inputs are tied to 2.5V with the VOCM pin
at 2.2V, then a total input bias current of 2mA will flow
into the LT6402-12’s +INA and +INB pins. Furthermore,
an additional input bias current totaling 2mA will flow into
the –INA and –INB inputs.
Application (Demo) Boards
The DC954A Demo Board has been created for stand-alone
evaluation of the LT6402-12 with either single-ended or
differential input and output signals. As shown, it accepts
a single-ended input and produces a single-ended output
so that the LT6402-12 can be evaluated using standard
laboratory test equipment. For more information on this
Demo Board, please refer to the layout and schematic
diagrams found later in this data sheet.
There are also additional demo boards available that
combine the LT6402-12 with a variety of different Linear
Technology ADCs. Please contact the factory for more
information on these demo boards.
TYPICAL APPLICATION
Top Silkscreen
640212fa
14
LT6402-12
PACKAGE DESCRIPTION
UD Package
16-Lead Plastic QFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1691)
0.70 ±0.05
3.50 ± 0.05
1.45 ± 0.05
2.10 ± 0.05 (4 SIDES)
PACKAGE OUTLINE
0.25 ±0.05
0.50 BSC
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
3.00 ± 0.10
(4 SIDES)
BOTTOM VIEW—EXPOSED PAD
PIN 1 NOTCH R = 0.20 TYP
OR 0.25 × 45° CHAMFER
R = 0.115
TYP
0.75 ± 0.05
15
16
PIN 1
TOP MARK
(NOTE 6)
0.40 ± 0.10
1
1.45 ± 0.10
(4-SIDES)
2
(UD16) QFN 0904
0.200 REF
0.00 – 0.05
NOTE:
1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WEED-2)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
0.25 ± 0.05
0.50 BSC
640212fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LT6402-12
TYPICAL APPLICATION
Demo Circuit DC954A Schematic (AC Test Circuit)
R18
0Ω
R17
0Ω
VCC
VCC
GND
VCC
1
SW1
TP1
ENABLE
2
3
R16
0Ω
2
C17
1000pF
1
2
C18
0.01μF
1
1
1
J1
–IN
T1
5 1:1 Z-RATIO
4 M/A-COM
ETC1-1T
14
2
VEEC
C1
0.1μF
R5
0Ω
16
2
R3
49.9Ω
ENABLE
9
VCCB VEEB
–INB
–OUT
–INA
–OUTFILTERED
+INB
+OUTFILTERED
+INA
VCCC
1
VCC
C10 2
0.01μF
1
10
VOCM
VCCA
+OUT
VEEA
2
3
4
2
C12
1000pF
C9 2
1000pF
1
1
C4
0.1μF
R10
8 24.9Ω
7
LT6402-12
15
3
VCC
11
0dB
2
1
R1
[1]
13
C21
0.1μF
1
•
•
0dB
R6
0Ω
2
1
J2
+IN
12
C2
0.1μF
6
5
1
R8
[1]
L1
[1]
R7
[1]
1
C11
[1]
2
T2
3 4:1 Z-RATIO 4
2
C8
[1]
1
R15
[1]
+10.8dB
+6dB
1
2
R11
75Ω
1
2
C16
[1]
2
J4
–OUT
2
1
C3
0.1μF
R9
24.9Ω
R14
0Ω
R12
75Ω
2
VCC
2
1
MINI5
0dB
CIRCUITS
TCM 4-19
C22
0.1μF
1
•
R4
49.9Ω
•
R2
0Ω
J5
+OUT
R13
[1]
C13
0.01μF
R19
14k
J3
J6
TEST IN
1
T3
1:4
5
1
TP2
VCC
1
2
•
•
MINICIRCUITS
TCM 4-19
C5
0.1μF
C19, 0.1μF
1
4
C7
0.01μF
R21
[1]
2
C6
0.1μF
2
R22
[1]
J7
TEST OUT
4
2
1
2
1
3
1
T4
4:1
3
C20, 0.1μF
2
•
2
R20
11k
•
VOCM
MINI5
CIRCUITS
TCM 4-19
640212 TA02
VCC
1
2
1
TP3
GND
C14
4.7μF
2
1
C15
1μF
NOTES: UNLESS OTHERWISE SPECIFIED,
[1] DO NOT STUFF.
1
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT1993-2
800MHz Differential Amplifier/ADC Driver
AV = 2V/V, NF = 12.3dB, OIP3 = 38dBm at 70MHz
LT1993-4
900MHz Differential Amplifier/ADC Driver
AV = 4V/V, NF = 14.5dB, OIP3 = 40dBm at 70MHz
LT1993-10
700MHz Differential Amplifier/ADC Driver
AV = 10V/V, NF = 12.7dB, OIP3 = 40dBm at 70MHz
LT5514
Ultralow Distortion IF Amplifier/ADC Driver
Digitally Controlled Gain Output IP3 47dBm at 100MHz
LT6402-6
300MHz Differential Amplifier/ADC Driver
AV = 6dB, en = 3.8nV/√Hz at 20MHz, 150mW
LT6402-20
300MHz Differential Amplifier/ADC Driver
AV = 20dB, en = 1.9nV/√Hz at 20MHz, 150mW
LT6411
650MHz Differential ADC Driver/Dual Selectable Gain Amplifier
3300V/μs Slew Rate, 16mA Current Consumption, Selectable Gain:
AV = –1, +1, +2
LT6600-5
Very Low Noise Differential Amplifier and 5MHz Lowpass Filter
82dB S/N with 3V Supply, SO-8 Package
LT6600-10
Very Low Noise Differential Amplifier and 10MHz Lowpass Filter
82dB S/N with 3V Supply, SO-8 Package
LT6600-20
Very Low Noise Differential Amplifier and 20MHz Lowpass Filter
76dB S/N with 3V Supply, SO-8 Package
640212fa
16
Linear Technology Corporation
LT 1007 REV A • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
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