LTC1261LIS8#TRPBF

LTC1261L Switched Capacitor Regulated Voltage Inverter FEATURES DESCRIPTION Regulated Negative Voltage from a Single Positive Supply n REG Pin Indicates Output is in Regulation n Adjustable or Fixed Output Voltages n Output Regulation: ±4.5% n Supply Current: 650µA Typ n Shutdown Mode Drops Supply Current to 5µA n Up to 20mA Output Current n Requires Only Three or Four External Capacitors n Available in MS8 and SO-8 Packages The LTC®1261L is a switched-capacitor voltage inverter designed to provide a regulated negative voltage from a single positive supply. The LTC1261L operates from a single 2.7V to 5.25V supply and provides an adjustable output voltage from –1.23V to – 5V. The LTC1261L-4/ LTC1261L-4.5 needs a single 4.5V to 5.25V supply and provides a fixed output voltage of –4V to –4.5V respectively. Three external capacitors are required: a 0.1µF flying capacitor and an input and output bypass capacitors. An optional compensation capacitor at ADJ (COMP) can be used to reduce the output voltage ripple. APPLICATIONS Each version of the LTC1261L will supply up to 20mA output current with guaranteed output regulation of ±4.5%. The LTC1261L includes an open-drain REG output that pulls low when the output is within 5% of the set value. Quiescent current is typically 650µA when operating and 5µA in shutdown. n n n n n GaAs FET Bias Generators Negative Supply Generators Battery-Powered Systems Single Supply Applications The LTC1261L is available in 8-pin MSOP and SO packages. L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. TYPICAL APPLICATION Waveforms for –4V Generator with Power Valid –4V Generator with Power Valid 0V 5V 1 5V 2 C1 1µF C2 0.1µF VCC SHDN 8 OUT 10k 7 C1 + REG LTC1261L-4 3 6 OUT C1 – 4 GND COMP –4V POWER VALID 5 C3* 100pF + C4 3.3µF VOUT = –4V AT 10mA SHDN POWER VALID *OPTIONAL 5V 0V 5V 0V 1261L TA01 0.1ms/DIV 1261L TA02 1261lfa 1 LTC1261L ABSOLUTE MAXIMUM RATINGS (Note 1) Supply Voltage (Note 2)............................................5.5V Output Voltage (Note 3).............................0.3V to – 5.3V Total Voltage, VCC to VOUT (Note 2).........................10.8V SHDN Pin.......................................–0.3V to (VCC + 0.3V) REG Pin......................................................... –0.3V to 6V ADJ Pin..............................(VOUT – 0.3V) to (VCC + 0.3V) Output Short-Circuit Duration.......................... Indefinite Commercial Temperature Range (Note 4)..... 0°C to 70°C Industrial Temperature Range (Note 4).... –40°C to 85°C Storage Temperature Range.................... –65°C to 150°C Lead Temperature (Soldering, 10 sec)................... 300°C PIN CONFIGURATION TOP VIEW TOP VIEW VCC C1+ C1– GND 1 2 3 4 8 7 6 5 SHDN REG OUT ADJ (COMP) MS8 PACKAGE 8-LEAD PLASTIC MSOP VCC 1 8 SHDN C1+ 2 7 REG C1– 3 6 OUT GND 4 5 ADJ (COMP) S8 PACKAGE 8-LEAD PLASTIC SO TJMAX = 150°C, θJA = 200°C/W TJMAX = 150°C, θJA = 135°C/W ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC1261LCMS8#PBF LTC1261LCMS8#TRPBF LTFM 8-Lead Plastic MSOP 0°C to 70°C LTC1261LIMS8#PBF LTC1261LIMS8#TRPBF LTFM 8-Lead Plastic MSOP –40°C to 85°C LTC1261LCMS8-4#PBF LTC1261LCMS8-4#TRPBF LTFN 8-Lead Plastic MSOP 0°C to 70°C LTC1261LIMS8-4#PBF LTC1261LIMS8-4#TRPBF LTFN 8-Lead Plastic MSOP –40°C to 85°C LTC1261LCMS8-4.5#PBF LTC1261LCMS8-4.5#TRPBF LTFP 8-Lead Plastic MSOP 0°C to 70°C LTC1261LIMS8-4.5#PBF LTC1261LIMS8-4.5#TRPBF LTFP 8-Lead Plastic MSOP –40°C to 85°C LTC1261LCS8#PBF LTC1261LCS8#TRPBF 1261L 8-Lead Plastic SO 0°C to 70°C LTC1261LIS8#PBF LTC1261LIS8#TRPBF 1261L 8-Lead Plastic SO –40°C to 85°C LTC1261LCS8-4#PBF LTC1261LCS8-4#TRPBF 1261L4 8-Lead Plastic SO 0°C to 70°C LTC1261LIS8-4#PBF LTC1261LIS8-4#TRPBF 1261L4 8-Lead Plastic SO –40°C to 85°C LTC1261LCS8-4.5#PBF LTC1261LCS8-4.5#TRPBF 261L45 8-Lead Plastic SO 0°C to 70°C LTC1261LIS8-4.5#PBF LTC1261LIS8-4.5#TRPBF 261L45 8-Lead Plastic SO –40°C to 85°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for information on nonstandard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ 1261lfa 2 LTC1261L ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C, C1 = 0.1µF, COUT = 3.3µF unless otherwise noted. (Notes 2, 4) SYMBOL PARAMETER VCC CONDITIONS MIN Supply Voltage LTC1261LCMS8/LTC1261LCS8 LTC1261LCMS8-4/LTC1261LCS8-4 (Note 5) LTC1261LCMS8-4.5/LTC1261LCS8-4.5 (Note 5) l l l 2.7 4.35 4.75 VREF Reference Voltage ICC Supply Current VCC = 5.25V, No Load, SHDN Floating VCC = 5.25V, No Load, VSHDN = VCC fOSC Internal Oscillator Frequency VCC = 5V, VOUT = –4V VOL REG Output Low Voltage IREG = 1mA, VCC = 5V, VOUT = –4V l IREG REG Sink Current VREG = 0.8V, VCC = 3.3V VREG = 0.8V, VCC = 5V l l IADJ Adjust Pin Current VADJ = 1.23V l VIH SHDN Input High Voltage VCC = 5V l VIL SHDN Input Low Voltage VCC = 5V l IIN SHDN Input Current VSHDN = VCC l tON Turn-On Time VCC = 5V, IOUT = 10mA, –1.5V ≤ VOUT ≤ –4V (LTC1261L) VCC = 5V, IOUT = 5mA, VOUT = –4.5V (LTC1261L) VCC = 5V, IOUT = 10mA, VOUT = –4V (LTC1261L-4) VCC = 5V, IOUT = 5mA, VOUT = –4.5V (LTC1261L-4.5) l l l l VOUT Output Regulation (LTC1261L) 2.70V ≤ VCC ≤ 5.25V, 0mA ≤ IOUT ≤ 10mA 3.25V ≤ VCC ≤ 5.25V, 0mA ≤ IOUT ≤ 20mA l –1.552 l –1.552 2.70V ≤ VCC ≤ 5.25V, 0mA ≤ IOUT ≤ 5mA 2.95V ≤ VCC ≤ 5.25V, 0mA ≤ IOUT ≤ 10mA 3.50V ≤ VCC ≤ 5.25V, 0mA ≤ IOUT ≤ 20mA ISC TYP MAX UNITS 5.25 5.25 5.25 V V V 1500 20 µA µA 1.23 650 5 l l V 650 0.1 4 5 kHz 0.8 8 12 ±0.01 V mA mA ±1 2 µA V 0.8 V 2.5 25 µA 250 250 250 250 1500 1500 1500 1500 µs µs µs µs –1.5 –1.5 –1.448 –1.448 V V l –2.070 l –2.070 l –2.070 –2.0 –2.0 –2.0 –1.930 –1.930 –1.91 V V V 2.95V ≤ VCC ≤ 5.25V, 0mA ≤ IOUT ≤ 5mA 3.30V ≤ VCC ≤ 5.25V, 0mA ≤ IOUT ≤ 10mA 3.85V ≤ VCC ≤ 5.25V, 0mA ≤ IOUT ≤ 20mA l –2.587 l –2.587 l –2.587 –2.5 –2.5 –2.5 –2.413 –2.413 –2.41 V V V 3.40V ≤ VCC ≤ 5.25V, 0mA ≤ IOUT ≤ 5mA 3.70V ≤ VCC ≤ 5.25V, 0mA ≤ IOUT ≤ 10mA 4.25V ≤ VCC ≤ 5.25V, 0mA ≤ IOUT ≤ 20mA l –3.105 l –3.105 l –3.105 –3.0 –3.0 –3.0 –2.895 –2.895 –2.885 V V V 3.85V ≤ VCC ≤ 5.25V, 0mA ≤ IOUT ≤ 5mA 4.10V ≤ VCC ≤ 5.25V, 0mA ≤ IOUT ≤ 10mA 4.60V ≤ VCC ≤ 5.25V, 0mA ≤ IOUT ≤ 20mA l –3.622 l –3.622 l –3.622 –3.5 –3.5 –3.5 –3.378 –3.378 –3.365 V V V Output Regulation (LTC1261L/LTC1261L-4) 4.35V ≤ VCC ≤ 5.25V, 0mA ≤ IOUT ≤ 5mA 4.60V ≤ VCC ≤ 5.25V, 0mA ≤ IOUT ≤ 10mA 5.10V ≤ VCC ≤ 5.25V, 0mA ≤ IOUT ≤ 20mA l –4.140 l –4.140 l –4.140 –4.0 –4.0 –4.0 –3.860 –3.860 –3.83 V V V Output Regulation (LTC1261L/LTC1261L-4.5) 4.75V ≤ VCC ≤ 5.25V, 0mA ≤ IOUT ≤ 5mA 5.05V ≤ VCC ≤ 5.25V, 0mA ≤ IOUT ≤ 10mA l –4.657 l –4.657 –4.5 –4.5 –4.343 –4.343 V V Output Short-Circuit Current VOUT = 0V, VCC = 5.25V l 100 220 Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to ground unless otherwise specified. Note 3: The output should never be set to exceed VCC – 10.8V. mA Note 4: The LTC1261LC is guaranteed to meet specifications from 0°C to 70°C and is designed, characterized and expected to meet industrial temperature limits, but is not tested at –40°C and 85°C. The LTC1261LI is guaranteed to meet specifications from –40°C and 85°C. Note 5: The LTC1261L-4 and LTC1261L-4.5 will operate with less than the minimum VCC specified in the electrical characteristics table, but they are not guaranteed to meet the ±4.5% VOUT specification. 1261lfa 3 LTC1261L TYPICAL PERFORMANCE CHARACTERISTICS Output Voltage vs Output Current 0 Output Voltage vs Output Current – 3.0 TA = 25°C VOUT = – 2V – 0.25 – 3.2 – 3.4 VCC = 2.7V –1.00 VCC = 4.5V – 3.5 – 3.6 –1.25 – 3.7 – 3.8 –1.50 VCC = 5V – 3.9 –1.75 VCC = 3V – 2.00 10 15 25 20 OUTPUT CURRENT (mA) – 4.2 30 –2.00 TA = 85°C –2.05 0 10 15 20 25 OUTPUT CURRENT (mA) 5 TA = – 40°C TA = 25°C – 4.00 TA = 85°C – 4.05 – 4.10 4.6 4.7 4.8 4.9 5.0 5.1 SUPPLY VOLTAGE (V) 5.2 80 5.2 70 4.8 4.4 IOUT = 20mA 4.0 3.6 3.2 IOUT = 5mA 2.8 IOUT = 10mA –5 –4 –3 –2 –1 OUTPUT VOLTAGE (V) 1261L G04 3.5 3.0 2.5 2.0 1.5 TA = 85°C 1.0 TA = 25°C 0.5 3.0 3.5 4.0 4.5 SUPPLY VOLTAGE (V) 5.0 1261L G07 30 20 10 VOUT = – 3V 0 TA = – 40°C 4.5 4.6 4.7 4.8 4.9 5.0 5.1 SUPPLY VOLTAGE (V) 5.2 5.3 1261L G08 VOUT = – 4V 1261L G06 Reference Voltage vs Temperature REFERENCE VOLTAGE (V) SUPPLY CURRENT (mA) 0.5 TA = – 40°C 40 1.25 4.0 TA = 85°C 0 2.5 0 VOUT = – 4.5V 4.5 IOUT = 0 1.0 VOUT = – 2V 50 0 2.7 3.0 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 SUPPLY VOLTAGE (V) 5.0 TA = 25°C 60 Supply Current vs Supply Voltage VOUT = – 2V IOUT = 0 5.0 TA = 25°C 1261L G05 Supply Current vs Supply Voltage 1.5 3.5 4.0 4.5 SUPPLY VOLTAGE (V) 1261L G03 5.6 2.0 5.3 2.0 3.0 Maximum Output Current vs Supply Voltage 2.4 – 4.15 4.5 –2.10 2.5 Minimum Required VCC vs VOUT and IOUT VOUT = – 4V – 3.95 30 1261L G02 POSITIVE SUPPLY VOLTAGE (V) OUTPUT VOLTAGE (V) TA = 25°C TA = – 40°C MAXIMUM OUTPUT CURRENT (mA) 5 0 – 3.90 SUPPLY CURRENT (mA) –1.95 – 4.1 Output Voltage vs Supply Voltage 2.5 VOUT = – 2V – 4.0 1261L G01 3.0 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) – 3.3 – 0.75 – 3.85 Output Voltage vs Supply Voltage –1.90 TA = 25°C VOUT = – 4V – 3.1 – 0.50 – 2.25 (See Test Circuits) VCC = 5V ADJ = 0V 1.24 1.23 1.22 1.21 – 55 –35 –15 5 25 45 65 85 105 125 TEMPERATURE (°C) 1261L G09 1261lfa 4 LTC1261L TYPICAL PERFORMANCE CHARACTERISTICS Oscillator Frequency vs Temperature 0.6 675 650 625 600 575 0.5 VOUT = – 4V 0.4 0.3 VOUT = – 2V 0.2 0.1 550 525 –40 –25 –10 160 TA = 25°C IOUT = 10mA SHORT-CIRCUIT CURRENT (mA) 700 0.7 TA = 25°C VOUT = – 4V VCC = 5V START-UP TIME (ms) OSCILLATOR FREQUENCY (kHz) 725 5 20 35 50 65 TEMPERATURE (°C) Output Short-Circuit Current vs Temperature Start-Up Time vs Supply Voltage 80 95 0 140 120 100 3.0 3.5 4.5 4.0 SUPPLY VOLTAGE (V) 1261L G10 5.0 1261L G11 VCC = 5V 80 60 VCC = 3V 40 20 2.5 VCC = 5.25V VCC = 2.7V 0 – 40 – 25 –10 5 20 35 50 65 TEMPERATURE (°C) 80 95 1261L G12 PIN FUNCTIONS VCC (Pin 1): Power Supply. This requires an input voltage between 2.7V and 5.25V. VCC must be bypassed to ground with at least a 1µF capacitor placed in close proximity to the chip. See the Applications Information section for details. C1+ (Pin 2): C1 Positive Input. Connect a 0.1µF capacitor between C1+ and C1–. C1– (Pin 3): C1 Negative Input. Connect a 0.1µF capacitor from C1+ to C1–. GND (Pin 4): Ground. Connect to a low impedance ground. A ground plane will help to minimize regulation errors. ADJ (COMP for Fixed Versions) (Pin 5): Output Adjust/ Compensation Pin. For adjustable parts this pin is used to set the output voltage. The output voltage is divided down with an external resistor divider and fed back to this pin to set the regulated output voltage. Typically the resistor string should draw ≥10µA from the output to minimize errors due to the bias current at the adjust pin. Fixed output voltage parts have the internal resistor string connected to this pin inside the package. The pin can be used to trim the output voltage if desired. It can also be used as an optional feedback compensation pin to reduce output ripple on both the adjustable and fixed output voltage parts. See the Applications Information section for more information on compensation and output ripple. OUT (Pin 6): Negative Voltage Output. This pin must be bypassed to ground with a 1µF or larger capacitor. The value of the output capacitor and its ESR have a strong effect on output ripple. See the Applications Information section for more details. REG (Pin 7): This is an open-drain output that pulls low when the output voltage is within 5% of the set value. It will sink 5mA to ground with a 5V supply. The external circuitry must provide a pull-up or REG will not swing high. The voltage at REG may exceed VCC and can be pulled up to 6V above ground without damage. SHDN (Pin 8): Shutdown. When this pin is at ground the LTC1261L operates normally. An internal 5µA pull-down keeps SHDN low if it is left floating. When SHDN is pulled high, the LTC1261L enters shutdown mode. In shutdown, the charge pump is disabled, the output collapses to 0V and the quiescent current drops to 5µA typically. 1261lfa 5 LTC1261L TEST CIRCUITS Adjustable Output Fixed Output 5V 1 + 10µF 0.1µF VCC SHDN 8 VCC 2 7 REG C1 + LTC1261L-X 3 6 OUT C1 – 4 GND COMP 5 1 VCC SHDN 8 2 VOUT = – 4V (LTC1261L-4) VOUT = – 4.5V (LTC1261L-4.5) + 3.3µF 1261L TCO1 0.1µF 7 REG C1 + LTC1261L 3 6 OUT C1 – 4 GND ADJ 5 VOUT + 3.3µF 1261L TCO2 APPLICATIONS INFORMATION The LTC1261L uses an inverting charge pump to generate a regulated negative output voltage that is either equal to or less than the supply voltage. The LTC1261L needs only three external capacitors and is available in the MSOP and SO-8 packages THEORY OF OPERATION A block diagram of the LTC1261L is shown in Figure 1. The heart of the LTC1261L is the charge pump core shown in the dashed box. It generates a negative output voltage by first charging the flying capacitor (C1) between VCC and ground. It then connects the top of the flying capacitor to ground, forcing the bottom of the flying capacitor to a negative voltage. The charge on the flying capacitor is transferred to the output bypass capacitor, leaving it charged to the negative output voltage. This process is driven by the internal 650kHz clock. Figure 1 shows the charge pump configuration. With the clock low, C1 is charged to VCC by S1 and S3. At the next rising clock edge, S1 and S3 are open and S2 and S4 closed. S2 connects C1+ to ground, C1– is connected to the output by S4. The charge in C1 is transferred to COUT, setting it to a negative voltage. The output voltage is monitored by COMP1 which compares a divided replica of the output at ADJ (COMP for fixed output voltage parts) to the internal reference. At the beginning of a cycle the clock is low, forcing the output of the AND gate low and charging the flying capacitor. The next rising clock edge sets the RS latch, setting the charge pump to transfer charge from the flying capacitor to the output capacitor. As long as the output is below the set point, COMP1 stays low, the latch stays set and the charge pump runs at the full 50% duty cycle of the clock gated through the AND gate. As the output approaches the set voltage, COMP1 will trip whenever the divided signal exceeds the internal 1.23V reference relative to OUT. This resets the RS latch and truncates the clock pulses, reducing the amount of charge transferred to the output capacitor and regulating the output voltage. If the output exceeds the set point, COMP1 stays high, inhibiting the RS latch and disabling the charge pump. COMP2 also monitors the divided signal at ADJ but it is connected to a 1.17V reference, 5% below the main reference voltage. When the divided output exceeds this lower reference voltage indicating that the output is within 5% of the set value, COMP2 goes high turning on the REG output transistor. This is an open-drain N-channel device capable of sinking 4mA with a 3.3V VCC and 5mA with a 5V VCC. When in the “off” state (divided output is more than 5% below VREF) the drain can be pulled above VCC without damage up to a maximum of 6V above ground. Note that the REG output only indicates if the magnitude of the output is below the magnitude of the set point by 5% (i.e., VOUT > –4.75V for a –5V set point). If the magnitude of the output is forced higher than the magnitude of the set point (i.e., to –5.25V when the output is set for –5V) the REG output will stay low. 1261lfa 6 LTC1261L APPLICATIONS INFORMATION VCC CLK 650kHz S1 OUT C1+ S C1 Q S2 R + R2 COUT S4 C1– R1 INTERNALLY CONNECTED FOR FIXED OUTPUT VOLTAGE PARTS S3 ADJ (COMP) + COMP1 REG + – COMP2 60mV – VREF = 1.23V 1261L F01 1.17V VOUT Figure 1. Block Diagram OUTPUT RIPPLE Output ripple in the LTC1261L is present from two sources; voltage droop at the output capacitor between clocks and frequency response of the regulation loop. Voltage droop is easy to calculate. With a typical clock frequency of 650kHz, the charge on the output capacitor is refreshed once every 1.54µs. With a 15mA load and a 3.3µF output capacitor, the output will droop by:  ∆t   1.54µs  ILOAD  = 7mV = 15mA    3.3µF   COUT  This can be a significant ripple component when the output is heavily loaded, especially if the output capacitor is small. If absolute minimum output ripple is required, a 10µF or greater output capacitor should be used. Regulation loop frequency response is the other major contributor to output ripple. The LTC1261L regulates the output voltage by limiting the amount of charge transferred to the output capacitor on a cycle-by-cycle basis. The output voltage is sensed at the ADJ pin (COMP for fixed output voltage versions) through an internal or external resistor divider from the OUT pin to ground. As the flying capacitor is first connected to the output, the output voltage begins to change quite rapidly. As soon as it exceeds the set point COMP1 trips, switching the state of the charge pump and stopping the charge transfer. Because the RC time constant of the capacitors and the switches is quite short, the ADJ pin must have a wide AC bandwidth to be able to respond to the output in time. External parasitic capacitance at the ADJ pin can reduce the bandwidth to the point where the comparator cannot respond by the time the clock pulse finishes. When this happens the comparator will allow a few complete pulses through, then overcorrect and disable the charge pump until the output drops below the set point. Under these conditions the output will remain in regulation but the output ripple will increase as the comparator “hunts” for the correct value. To prevent this from happening, an external capacitor can be connected from ADJ (or COMP for fixed output voltage parts) to ground to compensate for external parasitics and 1261lfa 7 LTC1261L APPLICATIONS INFORMATION increase the regulation loop bandwidth (Figure 2). This sounds counter intuitive until we remember that the internal reference is generated with respect to OUT, not ground. The feedback loop actually sees ground as its “output,” thus the compensation capacitor should be connected across the “top” of the resistor divider, from ADJ (or COMP) to ground. By the same token, avoid adding capacitance between ADJ (or COMP) and VOUT. This will slow down the feedback loop and increase output ripple. A 100pF capacitor from ADJ or COMP to ground will compensate the loop properly under most conditions for fixed voltage versions of the LTC1261L. For the adjustable LTC1261L, the capacitor value will be dependent upon the values of the external resistors in the divider network. 5V 1µF VCC 2 0.1µF C1 + OUT 10Ω 6 VOUT = – 4V LTC1261L-4 3 C1– COMP 5 GND + 3.3µF + 3.3µF 100pF 4 1261L F03 Figure 3. Output Filter Cuts Ripple Below 3mV CAPACITOR SELECTION Capacitor Sizing TO CHARGE PUMP RESISTORS ARE INTERNAL FOR FIXED OUTPUT VOLTAGE PARTS COMP1 CC 100pF R1 REF + 1.23V – R2 ADJ/COMP VOUT 1261L F02 Figure 2. Regulator Loop Compensation OUTPUT FILTERING If extremely low output ripple (