LTC1446/LTC1446L
Dual 12-Bit Rail-to-Rail
Micropower DACs in SO-8
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DESCRIPTIO
FEATURES
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Dual DACs with 12-Bit Resolution
SO-8 Package
Rail-to-Rail Output Amplifiers
Internal Reference
Maximum DNL Error: 0.5LSB
3V Operation (LTC1446L): ICC = 650µA Typ
5V Operation (LTC1446): ICC = 1000µA Typ
Settling Time: 14µs to ±0.5LSB
Power-On Reset Clears DACs to 0V
3-Wire Cascadable Serial Interface with 500kHz
Update Rate
Schmitt Trigger On Input Allows Direct
Optocoupler Interface
Low Cost
The LTC ®1446/LTC1446L are dual 12-bit digital-to-analog
converters (DACs) available in an SO-8 package. They are
complete with a rail-to-rail voltage output amplifier, an
internal reference and an easy-to-use 3-wire cascadable
serial interface.
The LTC1446 has an internal reference and a full-scale
output of 4.095V. It operates from a single 4.5V to 5.5V
supply.
The LTC1446L has an internal reference and a full-scale
output of 2.5V. It operates from a single 2.7V to 5.5V
supply.
The low power supply current makes the LTC1446 family
ideal for battery-powered applications. These DACs are
available in space saving 8-pin SO and PDIP packages and
require no external components for operation.
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APPLICATIO S
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Digital Calibration
Industrial Process Control
Automatic Test Equipment
Cellular Telephones
, LTC and LT are registered trademarks of Linear Technology Corporation.
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TYPICAL APPLICATION
Functional Block Diagram: Dual 12-Bit Rail-to-Rail DAC
7
LTC1446: 5V
LTC1446L: 3V TO 5V
VCC
Differential Nonlinearity vs Input Code
2 DIN
+
24-BIT
SHIFT
REG
AND
DAC
LATCH
RAIL-TO-RAIL
VOLTAGE
OUTPUT
+
12-BIT
DAC A
VOUT A 5
DNL ERROR (LSB)
–
1 CLK
3 CS/LD
0.4
0.3
12-BIT
DAC B
µP
0.5
VOUT B 8
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
–
–0.5
4 DOUT
0
POWER-ON
RESET
512 1024 1536 2048 2560 3072 3584 4095
CODE
1446/46L G13
GND
6
1446/1446L TA01
1
LTC1446/LTC1446L
W W
W
AXI U
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ABSOLUTE
RATI GS (Note 1)
VCC to GND ................................................ –0.5 to 7.5V
Logic Inputs to GND ................................... –0.5 to 7.5V
Operating Temperature Range
LTC1446C/LTC1446LC ............................ 0°C to 70°C
LTC1446I/LTC1446LI ..........................–40°C to 85°C
VOUT A /VOUT B ................................. –0.5V to VCC + 0.5V
Maximum Junction Temperature .......................... 125°C
Storage Temperature Range ..................–65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
W
U
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PACKAGE/ORDER INFORMATION
ORDER PART
NUMBER
TOP VIEW
CLK 1
8
VOUT B
DIN 2
7
VCC
CS/LD 3
6
GND
DOUT 4
5
VOUT A
LTC1446CN8
LTC1446IN8
LTC1446LCN8
LTC1446LIN8
ORDER PART
NUMBER
TOP VIEW
CLK 1
8
VOUT B
DIN 2
7
VCC
CS/LD 3
6
GND
DOUT 4
5
VOUT A
N8 PACKAGE
8-LEAD PDIP
S8 PACKAGE
8-LEAD PLASTIC SO
TJMAX = 125°C, θJA = 100°C/W
TJMAX = 125°C, θJA = 150°C/W
LTC1446CS8
LTC1446IS8
LTC1446LCS8
LTC1446LIS8
S8 PART MARKING
1446
1446L
1446I 1446LI
Consult factory for Military grade parts.
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range. VCC = 4.5V to 5.5V (LTC1446), 2.7V to 5.5V (LTC1446L), VOUT A and VOUT B unloaded, TA = TMIN to TMAX, unless
otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
●
±0.2
±0.5
LSB
●
±2.0
±2.5
4.5
5.0
LSB
LSB
3
18
mV
±2
±18
DAC
Resolution
●
DNL
Differential Nonlinearity
Guaranteed Monotonic (Note 2)
INL
Integral Nonlinearity
TA = 25°C
ZSE
Zero-Scale Error
●
VOS
Offset Error
●
VOS TC
Offset Error Tempco
VFS
Full-Scale Voltage
VFS TC
12
0
Bits
±15
LTC1446, TA = 25°C
LTC1446
LTC1446L, TA = 25°C
LTC1446L
●
●
4.065
4.045
2.470
2.460
4.095
4.095
2.500
2.500
4.125
4.145
2.530
2.540
±0.1
Full-Scale Voltage Tempco
mV
µV/°C
V
V
V
V
LSB/°C
Power Supply (LTC1446)
VCC
Positive Supply Voltage
For Specified Performance
●
ICC
Supply Current
4.5V ≤ VCC ≤ 5.5V (Note 5)
●
4.5
5.5
V
1000
1500
µA
5.5
V
650
1000
µA
Power Supply (LTC1446L)
VCC
Positive Supply Voltage
For Specified Performance
●
ICC
Supply Current
2.7V ≤ VCC ≤ 5.5V (Note 5)
●
2
2.7
LTC1446/LTC1446L
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating temperature range. VCC = 4.5V to 5.5V (LTC1446), 2.7V to 5.5V
(LTC1446L), VOUT A and VOUT B unloaded, TA = TMIN to TMAX, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Op Amp DC Performance
Short-Circuit Current Low
VOUT Shorted to GND
●
55
120
mA
Short-Circuit Current High
VOUT Shorted to VCC
●
70
120
mA
Output Impedance to GND
Input Code = 0
●
40
160
Ω
Voltage Output Slew Rate
(Note 3)
●
Voltage Output Settling Time
(Notes 3, 4) to ±0.5LSB
AC Performance
0.5
1
V/µs
14
µs
The ● denotes the specifications which apply over the full operating temperature range.VCC = 5V (LTC1446), VCC = 3V (LTC1446L),
TA = TMIN to TMAX, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
LTC1446
TYP MAX
MIN
LTC1446L
TYP MAX
UNITS
Digital I/O
VIH
Digital Input High Voltage
VIL
Digital Input Low Voltage
VOH
Digital Output High Voltage
VOL
ILEAK
CIN
●
2.4
2
0.8
●
VCC – 1.0
V
0.6
V
IOUT = – 1mA
●
VCC – 0.7
V
Digital Output Low Voltage
IOUT = 1mA
●
0.4
0.4
V
Digital Input Leakage
VIN = GND to VCC
●
±10
±10
µA
Digital Input Capacitance
Guaranteed by Design
●
10
10
pF
Switching
t1
DIN Valid to CLK Setup
●
t2
DIN Valid to CLK Hold
●
0
0
ns
t3
CLK High Time
●
40
60
ns
t4
CLK Low Time
●
40
60
ns
t5
CS/LD Pulse Width
●
50
80
ns
t6
LSB CLK to CS/LD
●
40
60
ns
t7
CS/LD Low to CLK
●
20
t8
DOUT Output Delay
t9
CLK Low to CS/LD Low
CLOAD = 15pF
40
ns
30
150
●
●
60
20
ns
220
30
ns
ns
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 4: DAC switched between all 1s and the code corresponding to VOS
for the part.
Note 2: Nonlinearity is defined from the first code that is greater than or
equal to the maximum offset specification to code 4095 (full scale).
Note 5: Digital inputs at 0V or VCC.
Note 3: Load is 5kΩ in parallel with 100pF.
3
LTC1446/LTC1446L
U W
TYPICAL PERFORMANCE CHARACTERISTICS
LTC1446 Differential Nonlinearity
(DNL)
LTC1446 Integral Nonlinearity (INL)
0.5
LTC1446L Differential Nonlinearity
0.5
3
0.4
0.4
2
0.1
0
–0.1
–0.2
–0.3
0.3
DNL ERROR (LSB)
0.2
INL ERROR (LSB)
DNL ERROR (LSB)
0.3
1
0
–1
0.2
0.1
0
–0.1
–0.2
–0.3
–2
–0.4
–0.4
–0.5
0
–0.5
–3
512 1024 1536 2048 2560 3072 3584 4095
CODE
512 1024 1536 2048 2560 3072 3584 4095
CODE
0
1446/46L G01
0
512 1024 1536 2048 2560 3072 3584 4095
CODE
1446/46L G03
1446/46L G02
LTC1446L Min Supply Headroom for
Full Output Swing vs Load Current
LTC1446 Min Supply Headroom for
Full Output Swing vs Load Current
LTC1446L Integral Nonlinearity
0.8
3
1.2
∆VOUT < 1LSB
CODE: ALL 1's
VOUT = 4.095V
2
∆VOUT < 1LSB
CODE: ALL 1's
VOUT = 2.5V
1.0
0
–1
0.8
VCC – VOUT
VCC – VOUT (V)
INL ERROR (LSB)
0.6
1
0.4
0.6
0.4
0.2
–2
0.2
–3
0
0
512 1024 1536 2048 2560 3072 3584 4095
CODE
10
5
LOAD CURRENT (mA)
0
1446/46L G04
0
15
0
5
10
LOAD CURRENT (mA)
LTC1446/46L • TPC05
LTC1446 Min Output Voltage vs
Output Sink Current
LTC1446/46L • TPC06
LTC1446 Full-Scale Voltage
vs Temperature
600
15
LTC1446 Supply Current
vs Logic Input Voltage
3.0
4.11
500
2.6
400
125°C
25°C
300
–55°C
200
4.10
SUPPLY CURRENT (mA)
FULL-SCALE VOLTAGE (V)
OUTPUT PULL-DOWN VOLTAGE (mV)
CODE: ALL 0'S
4.09
4.08
100
0
1.8
1.4
1.0
0
5
10
OUTPUT SINK CURRENT (mA)
15
LTC1446/46L • TPC07
4
2.2
4.07
–55
–25
5
35
65
TEMPERATURE (°C)
95
125
1446/46L G09
0.6
0
1
2
3
4
LOGIC INPUT VOLTAGE (V)
5
1446/46L G09
LTC1446/LTC1446L
U W
TYPICAL PERFORMANCE CHARACTERISTICS
LTC1446 Supply Current vs
Temperature
LTC1446L Supply Current
vs Temperature
970
700
1.1
960
690
1.0
0.9
0.8
0.7
0.6
0.5
0.5
950
VCC = 5.5V
940
930
VCC = 5V
920
910
1.0
1.5
2.0
2.5
3.0
SUPPLY CURRENT (µA)
1.2
SUPPLY CURRENT (µA)
SUPPLY CURRENT (mA)
LTC1446L Supply Current vs Logic
Input Voltage
LOGIC INPUT VOLTAGE (V)
5 25 45 65 85 105 125
TEMPERATURE (°C)
1446/46L G10
VCC = 3.3V
670
660
VCC = 3V
650
640
VCC = 2.7V
630
VCC = 4.5V
900
–55 –35 –15
680
620
– 55 – 35 –15
5 25 45 65 85 105 125
TEMPERATURE (°C)
1446/46L G11
1446/46L G12
Large Signal Transient Response
VOUT
(2V/DIV)
CS/LD
(5V/DIV)
TIME (10µs/DIV)
1446L G13
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PIN FUNCTIONS
CLK: The Serial Interface Clock.
DIN: The Serial Interface Data.
CS/LD: The Serial Interface Enable and Load Control.
When CS/LD is low the CLK signal is enabled, so the data
can be clocked in. When CS/LD is pulled high data is
loaded from the shift register into the DAC registers,
updating the DAC outputs.
DOUT: The output of the shift register which becomes valid
on the rising edge of the serial clock.
GND: Ground.
VOUT A,VOUT B: Buffered DAC Outputs.
VCC: Positive Supply Input.
4.5V ≤ VCC ≤ 5.5V (LTC1446), 2.7V ≤ VCC ≤ 5.5V
(LTC1446L). Requires a 0.1µF bypass capacitor to
ground.
5
LTC1446/LTC1446L
W
BLOCK DIAGRAM
REFERENCE
12-BIT
DAC B
LD
CLK 1
+
DAC B
REGISTER
24-BIT
SHIFT
REGISTER
DIN 2
LD
CS/LD 3
8
VOUT B
7
VCC
6
GND
5
VOUT A
–
DAC A
REGISTER
12-BIT
DAC A
+
DOUT 4
–
POWER-ON
RESET
1446BD
WU
W
TI I G DIAGRA
t4
t3
t1
t2
t6
t7
CLK
t9
DIN
B0-B
PREVIOUS WORD
B11-A
MSB
B0-A
LSB
B11-B
MSB
B0-B
LSB
t5
t8
CS/LD
DOUT
B11-A
PREVIOUS WORD
B10-A
PREVIOUS WORD
B0-A
PREVIOUS WORD
B11-B
PREV WORD
B10-B
PREV WORD
B0-B
PREV WORD
B11-A
CURRENT WORD
1446 TD
6
LTC1446/LTC1446L
U
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DEFI ITIO S
Nominal LSBs:
Resolution (n)
Resolution is defined as the number of digital input bits,
n. It defines the number of DAC output states (2n) that
divide the full-scale range. The resolution does not imply
linearity.
LTC1446 LSB = 4.095V/4095 = 1mV
LTC1446L LSB = 2.5V/4095 = 0.610mV
Zero Scale Error (ZSE)
This is the output of the DAC when all bits are set to one.
The output voltage when the DAC is loaded with all zeros.
Since this is a single supply part this value cannot be less
than 0V.
Voltage Offset Error (VOS)
Integral Nonlinearity (INL)
The theoretical voltage at the output when the DAC is
loaded with all zeros. The output amplifier can have a true
negative offset, but because the part is operated from a
single supply, the output cannot go below zero. If the
offset is negative, the output will remain near 0V resulting
in the transfer curve shown in Figure 1.
End-point INL is the maximum deviation from a straight
line passing through the end points of the DAC transfer
curve. Because the part operates from a single supply and
the output cannot go below 0, the linearity is measured
between full scale and the code corresponding to the
maximum offset specification. The INL error at a given
input code is calculated as follows :
Full-Scale Voltage (VFS)
OUTPUT
VOLTAGE
NEGATIVE
OFFSET
0V
INL = [VOUT – VOS – (VFS – VOS)(Code/4095)]/LSB
VOUT = the output voltage of the DAC measured at the given
input code
DAC CODE
1446/46L F01
Differential Nonlinearity (DNL)
Figure 1. Effect of Negative Offset
The offset of the part is measured at the code that corresponds to the maximum offset specification:
VOS = VOUT – [(Code)(VFS)/(2n – 1)]
Least Significant Bit (LSB)
One LSB is the ideal voltage difference between two
successive codes.
DNL is the difference between the measured change and
the ideal 1LSB change between any two adjacent codes.
The DNL error between any two codes is calculated as
follows:
DNL = (∆VOUT – LSB)/LSB
∆VOUT = The measured voltage difference between two
adjacent codes
LSB = (VFS – VOS)/(2n – 1) = (VFS – VOS)/4095
7
LTC1446/LTC1446L
U
OPERATIO
Serial Interface
Voltage Output
The data on the DIN input is loaded into the shift register
on the rising edge of the clock. Data is loaded as one 24bit word where the first 12 bits are for DAC A and the
second 12 are for DAC B. For each 12-bit segment the MSB
is loaded first. Data from the shift register is loaded into the
DAC register when CS/LD is pulled high. The clock is
disabled internally when CS/LD is high. Note: CLK must be
low before CS/LD is pulled low to avoid an extra internal
clock pulse.
The LTC1446/LTC1446L include an internal voltage reference which is connected to each DAC. The LTC1446 has a
full scale of 4.095V making 1LSB equal to 1mV. The
LTC1446L has a full scale of 2.5V making 1LSB equal to
0.61mV.
The buffered output of the 24-bit shift register is available
on the DOUT pin which swings from GND to VCC.
Multiple LTC1446/LTC1446L’s may be daisy-chained together by connecting the DOUT pin to the DIN pin of the next
chip, while the clock and CS/LD signals remain common
to all chips in the daisy chain. The serial data is clocked to
all of the chips, then the CS/LD signal is pulled high to
update all of them simultaneously.
8
The LTC1446/LTC1446L rail-to-rail buffered outputs can
source or sink 5mA when operating with a 5V supply while
pulling to within 300mV of the positive supply voltage or
ground. The outputs swing to within a few millivolts of
either supply rail when unloaded and have an equivalent
output resistance of 40Ω when driving a load to the rails.
The buffer amplifiers can drive 1000pF without going into
oscillation. The output noise spectral density is
600nV/√Hz at 1kHz.
LTC1446/LTC1446L
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TYPICAL APPLICATIONS N
This circuit shows how to use an LTC1446 and an
LT ®1077 to make a wide bipolar output swing 12-bit DAC
with an offset that can be digitally programmed. VOUT A,
which can be set by loading the appropriate digital code
for DAC A, sets the offset. As this value changes, the
transfer curve for the output moves up and down as
illustrated in the graph below.
A Wide Swing, Bipolar Output DAC with Digitally Controlled Offset
5V
0.1µF
CLK
VOUT B
15V
50k
VCC
DIN
+
LTC1446
µP
CS/LD
DOUT
LT1077
100k
GND
VOUT =
2 (VOUT B – VOUT A)
–
VOUT A
–15V
100k
50k
8.190
VOUT
A
4.094
B
0
DIN
C
–4.096
–8.190
A: VOUT A ≅ 0V
B: VOUT A ≅ 2.048V
C: VOUT A ≅ 4.095V
1446/46L F02
9
LTC1446/LTC1446L
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TYPICAL APPLICATIONS N
the REF + pin on the LTC1296. The LTC1296 has a Shutdown pin that goes low in shutdown mode. This will turn
off the PNP transistor supplying power to the LTC1446.
The resistor and capacitor on the LTC1446 outputs act as
a lowpass filter for noise.
This circuit shows how to use one LTC1446 to make an
autoranging ADC. The microprocessor sets the reference
span and the Common pin for the analog input by loading
the appropriate digital code into the LTC1446. VOUT A
controls the Common pin for the analog inputs to the
LTC1296 and VOUT B controls the reference span by setting
An Autoranging 8-Channel ADC with Shutdown
22µF
+
5V
VCC
CH0
CS
DOUT
µP
CLK
8 ANALOG
INPUT CHANNELS
LTC1296
DIN
CH7
COM
SSO
REF +
REF –
74HC04
50k
50k
5V
0.1µF
2N3906
CLK
VOUT B
DIN
VCC
100Ω
0.1µF
CS/LD
LTC1446
GND
100Ω
DOUT
VOUT A
1446/46L F03
0.1µF
10
LTC1446/LTC1446L
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PACKAGE DESCRIPTION
Dimensions in inches (millimeters) unless otherwise noted.
N8 Package
8-Lead PDIP (Narrow 0.300)
(LTC DWG# 05-08-1510)
0.400*
(10.160)
MAX
8
7
6
5
1
2
3
4
0.255 ± 0.015*
(6.477 ± 0.381)
0.300 – 0.325
(7.620 – 8.255)
0.065
(1.651)
TYP
0.009 – 0.015
(0.229 – 0.381)
(
0.130 ± 0.005
(3.302 ± 0.127)
0.045 – 0.065
(1.143 – 1.651)
0.125
(3.175)
MIN
0.005
(0.127)
MIN
+0.025
0.325 –0.015
+0.635
8.255
–0.381
)
0.018 ± 0.003
(0.457 ± 0.076)
0.100 ± 0.010
(2.540 ± 0.254)
0.015
(0.380)
MIN
N8 0695
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 – 0.197*
(4.801 – 5.004)
8
7
6
5
0.150 – 0.157**
(3.810 – 3.988)
0.228 – 0.244
(5.791 – 6.197)
1
0.010 – 0.020
× 45°
(0.254 – 0.508)
0.008 – 0.010
(0.203 – 0.254)
2
3
4
0.053 – 0.069
(1.346 – 1.752)
0.004 – 0.010
(0.101 – 0.254)
0°– 8° TYP
0.016 – 0.050
0.406 – 1.270
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
0.014 – 0.019
(0.355 – 0.483)
0.050
(1.270)
BSC
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
SO8 0695
11
LTC1446/LTC1446L
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC1257
Single 12-Bit VOUT DAC, Full Scale: 2.048V, VCC: 4.75V to 15.75V, 5V to 15V Single Supply, Complete VOUT DAC in SO-8 Package
Reference Can Be Overdriven up to 12V, i.e., FS Max = 12V
LTC1451
Single Rail-to-Rail Output 12-Bit DAC,
Full Scale: 4.095V, VCC: 4.5V to 5.5V Internal 2.048V Reference
Brought Out to Pin
LTC1452
Single Rail-to-Rail 12-Bit VOUT Mulitplying DAC, VCC: 2.7V to 5.5V Low Power, Mulitplying VOUT DAC with Rail-to-Rail Buffer
Amplifier in SO-8 Package
LTC1453
Single Rail-to-Rail 12-Bit VOUT DAC,
Full Scale: 2.5V, VCC: 2.7V to 5.5V
Low Power, Complete VOUT DAC in SO-8 Package
3V, Low Power, Complete VOUT DAC in SO-8 Package
LTC1454/LTC1454L Dual 12-Bit VOUT DACs in a 16-Lead SO Package
with Added Functionality
LTC1454: VCC = 4.5V to 5.5V, VOUT = 0V to 4.095V
LTC1454L: VCC = 2.7V to 5.5V, VOUT = 0V to 2.5V
LTC1456
Low Power, Complete VOUT DAC in SO-8 Package
with Clear Pin
Single Rail-to-Rail Output 12-Bit DAC with Clear Pin
Full Scale: 4.095V, VCC: 4.5V to 5.5V
LTC1458/LTC1458L Quad 12-Bit VOUT DACs in 28-Lead SW and SSOP Packages
LTC1458: VCC = 4.5V to 5.5V, VOUT = 0V to 4.095V
LTC1458L: VCC = 2.7V to 5.5V, VOUT = 0V to 2.5V
LTC1654
Dual 14-Bit DAC in SSOP
Variable Speed, Variable Gain, 1LSB DNL
LTC1661
Dual 10-Bit VOUT DAC in MSOP
Low Cost, 0.75LSB DNL
LTC1662
Dual 10-Bit VOUT DAC in MSOP
Ultra Low Power = 1.5µA Supply Current
12
Linear Technology Corporation
1446lfa LT/LCG 0700 2K REV A • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507 ● TELEX: 499-3977
LINEAR TECHNOLOGY CORPORATION 1996
工商网监
湘ICP备2023018690号
